BU91796BMUF-M [ROHM]
BU91796BMUF-M是占空比为1/4的车载领域通用LCD驱动器，最多可显示80段的LCD。支持工作温度达+105℃，且满足车载应用所要求的AEC-Q100 Grade2标准。Wettable Flank QFN封装有助于小型电路板应用和安装状态的目视检查，有助于提高安装可靠性。;
| 型号： | BU91796BMUF-M |
| 厂家： | 
ROHM |
| 描述： | BU91796BMUF-M是占空比为1/4的车载领域通用LCD驱动器，最多可显示80段的LCD。支持工作温度达+105℃，且满足车载应用所要求的AEC-Q100 Grade2标准。Wettable Flank QFN封装有助于小型电路板应用和安装状态的目视检查，有助于提高安装可靠性。 驱动 CD 驱动器 |
| 文件： | 总27页 (文件大小：1643K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Low Duty LCD Segment Driver
for Automotive Application
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
General Description
Key Specifications
Supply Voltage Range:
BU91796BMUF-M is a 1/4 duty general-purpose LCD
driver that can be used for automotive applications and
can drive up to 80 LCD Segments.
It can support operating temperature of up to +105 °C
and qualified for AEC-Q100 Grade2, as required for
automotive applications.
■
+2.5 V to +6.0 V
■
Operating Temperature Range: -40 °C to +105 °C
■
■
■
■
Max Segments:
Display Duty:
Bias:
80 Segments
1/4
1/3
Interface:
2 Wire Serial Interface
Wettable flank QFN package is suitable for small
footprint
applications
and
provides
significant
Special Characteristics
advantages in inspectability and solder joint reliability.
■
■
ESD (HBM):
Latch-up Current:
±2000 V
±100 mA
Features
AEC-Q100 Qualified(Note 1)
Package
Integrated RAM for Display Data (DDRAM):
20 x 4 bit (Max 80 Segment)
W (Typ) x D (Typ) x H (Max)
5.0 mm x 5.0 mm x 1.0 mm
VQFN32FBV050
LCD Drive Output:
4 Common Output, Max 20 Segment Output
Integrated Buffer AMP for LCD Driving
Integrated Oscillator Circuit
No External Components
Low Power Consumption Design
Enlarged View
(Note 1) Grade 2
Applications
Instrument Clusters
Climate Controls
Car Audios / Radios
Metering
VQFN32FBV050
Wettable Flank Package
White Goods
Healthcare Products
Battery Operated Applications
etc.
Typical Application Circuit
VDD
C > 0.1µF
VDD
VLCD
COM0
COM1
COM2
COM3
SDA
SCL
MCU
Segment
LCD
SEG0
SEG1
:
:
:
:
:
:
OSCIN
TEST1
TEST2
Insert Capacitors
between VDD and VSS
VSS
SEG19
Internal Clock Mode
〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Block Diagram / Pin Configuration / Pin Description
COM0
COM3
……
SEG0
SEG19
……
VDD
LCD voltage generator
EXP-PAD
EXP-PAD
Common
Driver
Segment
Driver
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
COM2
COM3
VLCD
VDD
SEG13
SEG12
SEG11
SEG10
SEG9
＋
－
LCD
BIAS
SELECTOR
Common Blink Timing
Counter
＋
－
DDRAM
Generator
EXP-PAD
VLCD
VSS
TEST1
TEST2
OSCIN
SEG8
Command
Data Decoder
Command
Register
SEG7
OSCIN
OSCILLATOR
SEG6
Power On Reset
Serial Interface
IF FILTER
EXP-PAD
EXP-PAD
VSS
TEST1
TEST2
SCL
SDA
Figure 1. Block Diagram
Figure 2. Pin Configuration (TOP VIEW)
Table 1. Pin Description
Function
Handling
when unused
Pin Name
SCL
Pin No.
1
I/O
I
Serial clock pin
-
SDA
2
I/O Serial data input-output pin
-
SEG0 to SEG19
3 to 22
O
O
-
SEGMENT output for LCD driving
OPEN
COM0 to COM3 23 to 26
COMMON output for LCD driving
Power supply for LCD driving
Power supply
OPEN
VLCD
VDD
27
28
29
30
-
-
-
-
VSS
-
Ground
Test input (ROHM use only)
Must be connected to VSS
TEST1
I
VSS
POR enable setting
VDD: POR disenable(Note 1)
VSS: POR enable
TEST2
OSCIN
31
32
-
I
I
-
VSS
VSS
External clock input
External clock and Internal oscillator can be selected by command
Must be connected to VSS when using internal clock mode.
Connect to GND or leave OPEN the central EXP-PAD.
The central EXP-PAD and the corner EXP-PAD are shorted inside OPEN/VSS
the package.
EXP-PAD
(Note 1) This function is guaranteed by design, not tested in production process. Software Reset is necessary to initialize IC in case of TEST2 = VDD.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Absolute Maximum Ratings (Ta = 25 °C, VSS = 0 V)
Parameter
Power Supply Voltage1
Power Supply Voltage2
Power Dissipation
Symbol
VDD
VLCD
Pd
Ratings
Unit
V
Remarks
-0.5 to +7.0
Power Supply
LCD Drive Voltage
-0.5 to VDD
0.70(Note 1)
V
W
V
Input Voltage Range
VIN
-0.5 to VDD + 0.5
Maximum Junction
Temperature
Tjmax
Tstg
125
°C
°C
Storage Temperature Range
-55 to +125
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with power dissipation taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
(Note 1) Delete by 7.0mW/°C when operating above Ta = 25°C (when mounted in ROHM’s standard board).
Recommended Operating Conditions (VSS = 0 V)
Ratings
Parameter
Symbol
Unit
Remarks
Min
-40
2.5
0
Typ
Max
+105
Operational Temperature
Power Supply Voltage1
Power Supply Voltage2
Topr
VDD
-
-
-
°C
V
6.0
Power Supply
LCD Drive Voltage, VDD - VLCD 2.4 V
VLCD
VDD - 2.4
V
Electrical Characteristics
DC Characteristics (VDD = 2.5 V to 6.0 V, VLCD = 0 V, VSS = 0 V, Ta = -40 °C to +105 °C, unless otherwise specified)
Limits
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
“H” Level Input Voltage
“L” Level Input Voltage
“H” Level Input Current
“L” Level Input Current
VIH
VIL
IIH
0.7VDD
-
-
VDD
V
V
SDA,SCL,OSCIN
SDA,SCL,OSCIN
VSS
0.3VDD
-
-1
0
-
-
1
µA SDA,SCL,OSCIN(Note 2) ,TEST2
IIL
-
-
µA SDA,SCL,OSCIN,TEST2
SDA “L” Level Output Voltage VOL_SDA
-
0.4
V
kΩ
kΩ
V
ILOAD = 3 mA
SEG
RON
RON
3
3
-
-
LCD Driver On
Resistance
ILOAD = ±10 µA
COM
-
-
VDD - 2.4
5
VLCD Supply Voltage
Standby Current
VLCD
IDD1
0
-
VDD - VLCD 2.4 V
-
µA Display off, Oscillation off
VDD = 3.3 V, VLCD = 0 V, Ta = 25 °C
Power save mode1,
Power Consumption
IDD2
-
12.5
30
µA
FR(Note 3) = 71 Hz
1/3 bias, Frame inverse
(Note 2) For external clock mode only.
(Note 3) Frame Rate
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Electrical Characteristics – continued
Oscillation Characteristics (VDD = 2.5 V to 6.0 V, VLCD = 0 V, VSS = 0 V, Ta = -40 °C to +105 °C, unless otherwise specified)
Limits
Parameter
Symbol
fCLK1
Unit
Hz
Conditions
FR = 80 Hz setting,
Min
56
Typ
80
Max
112
Frame Frequency1
VDD = 2.5 V to 6.0 V, Ta = -40 °C to +105 °C
Frame Frequency2
Frame Frequency3
fCLK2
fCLK3
70
80
90
Hz
Hz
FR = 80 Hz setting, VDD = 3.3 V, Ta = 25 °C
77.5
87.5
97.5
FR = 80 Hz setting, VDD = 5.0 V, Ta = 25 °C
FR = 80 Hz setting, VDD = 5.0 V,
Ta = -40 °C to +105 °C
Frame Frequency4
fCLK4
67.5
87.5
108
Hz
External Clock Rise Time
External Clock Fall Time
External Frequency
tR
tF
-
-
-
0.3
0.3
300
70
µs
µs
-
External clock mode (OSCIN)(Note 1)
fEXCLK
15
-
kHz
%
External Clock Duty
tDTY
30
50
(Note 1) <Frame frequency calculation at external clock mode>
DISCTL 80 Hz setting: Frame frequency [Hz] = external clock [Hz] / 512
DISCTL 71 Hz setting: Frame frequency [Hz] = external clock [Hz] / 576
DISCTL 64 Hz setting: Frame frequency [Hz] = external clock [Hz] / 648
DISCTL 53 Hz setting: Frame frequency [Hz] = external clock [Hz] / 768
[Reference Data]
110
100
VDD = 6.0 V
VDD = 5.0 V
90
80
70
60
50
VDD = 3.3 V
VDD = 2.7 V
-40 -20
0
20 40 60 80 100
Temperature [°C]
Figure 3. Frame Frequency Typical Temperature Characteristics
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Electrical Characteristics - continued
MPU Interface Characteristics (VDD = 2.5 V to 6.0 V, VLCD = 0 V, VSS = 0 V, Ta = -40 °C to +105 °C, unless otherwise
specified)
Limits
Parameter
Symbol
Unit
Conditions
Min
-
Typ
Max
Input Rise Time
tR
tF
-
-
-
-
-
-
-
-
-
-
-
0.3
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
Input Fall Time
-
0.3
SCL Cycle Time
tSCYC
tSHW
tSLW
2.5
0.6
1.3
100
100
1.3
0.6
0.6
0.6
-
-
-
-
-
-
-
-
-
“H” SCL Pulse Width
“L” SCL Pulse Width
SDA Setup Time
tSDS
SDA Hold Time
tSDH
Buss Free Time
tBUF
START Condition Hold Time
START Condition Setup Time
STOP Condition Setup Time
tHD;STA
tSU;STA
tSU;STO
SDA
tBUF
tSLW
tF
tSCYC
SCL
tHD; STA
tR
tSDH
tSHW
tSDS
SDAI
tSU; STA
tSU; STO
Figure 4. Interface Timing
I/O Equivalence Circuit
VDD
VDD
VLCD
VSS
VSS
SCL
SDA
VSS
VDD
VSS
VDD
TEST1
VSS
TEST2
VSS
VDD
VDD
OSCIN
VSS
SEG0 to SEG19
COM0 to COM3
VSS
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Application Example
VDD
VDD
VLCD
COM 0
COM 1
COM
COM
2
3
SDA
SCL
Segment
LCD
MCU
SEG0
SEG1
:
:
:
:
:
:
OSCIN
TEST1
TEST2
VSS
19
SEG
Internal Clock Mode
VDD
VDD
VLCD
COM0
COM1
COM2
COM3
SDA
SCL
Segment
LCD
MCU
SEG0
SEG1
:
:
:
OSCIN
TEST1
TEST2
VSS
:
:
:
SEG19
External Clock Mode
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions
Command / Data Transfer Method
BU91796BMUF-M is controlled by 2 wire serial interface signal (SDA, SCL).
SDA
SCL
START condition
STOP condition
Figure 5. 2 wire serial interface Command/Data Transfer Format
It is necessary to generate START and STOP condition when sending Command or Display Data through this 2 wire
serial interface.
Slave Address
A
Display Data
A P
Command
S
0
1
1
1
1
1
0 0 A C
Command or Data judgement bit
Acknowledge
STOP condition
START condition
Figure 6. Interface Protcol
Slave Address = “01111100”: Write Mode
The following procedure shows how to transfer Command and Display Data.
(1) Generate “START condition”.
(2) Issue Slave Address.
(3) Transfer Command and Display Data.
(4) Generate “STOP condition”
Acknowledge (ACK)
Data format is comprised of 8 bits, acknowledge bit is returned after sending 8-bit data.
After the transfer of 8-bit data (Slave Address, Command, Display Data), release the SDA line at the falling edge of the 8th
clock. The SDA line is then pulled “Low” until the falling edge of the 9th clock SCL.
(Output cannot be pulled “High” because of open drain NMOS).
If acknowledge function is not required, keep SDA line at “Low” level from 8th falling edge to 9th falling edge of SCL.
SDA
1to7
1to7
8
9
1to7
8
9
8
9
SCL
S
P
ACK
DATA
DATA
SLAVE ADDRESS
ACK
ACK
START
STOP
condition
condition
Figure 7. Acknowledge Timing
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BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions - continued
Command Transfer Method
Issue Slave Address (“01111100”) after generating “START condition”.
The 1st byte after Slave Address always becomes command input.
MSB (“command or data judge bit”) of command decide to next data is Command or Display Data.
When set “command or data judge bit” = ‘1’, next byte will be command.
When set “command or data judge bit” = ‘0’, next byte data is Display Data.
A
1 Command
A
1
Command
S Slave Address A 1 Command
A
0 Command
A
Display Data …
P
It cannot accept input command once it enters into Display Data transfer state.
In order to input command again it is necessary to generate “START condition”.
If “START condition” or “STOP condition” is sent in the middle of command transmission, command will be cancelled.
If Slave Address is continuously sent following “START condition”, it remains in command input state.
“Slave Address” must be sent right after the “START condition”.
When Slave Address cannot be recognized in the first data transmission, no Acknowledge bit is generated and next
transmission will be invalid. When data is invalid status, if “START condition” is transmitted again, it will return to valid
status.
Consider the MPU interface characteristic such as Input rise time and Setup/Hold time when transferring command and
data (Refer to MPU Interface Characteristics).
Write Display Data and Transfer Method
BU91796BMUF-M has Display Data RAM (DDRAM) of 20 x 4 = 80 bit.
The relationship between data input and Display Data, DDRAM Data and address are as follows;
Command
0000000
Slave Address
01111100
S
A
0
A
a
b
c
d
e
f
g
h
A
i
j
k
l
m
n
o
p
A
… P
Display Data
8-bit data is stored in DDRAM. ADSET command specifies the address to be written, and address is automatically
incremented in every 4-bit data.
Data can be continuously written in DDRAM by transmitting data continuously.
When RAM data is written successively, after writing RAM data to 13h (SEG19), the address is returned to 00h (SEG0) by
the auto-increment function.
DDRAM address
00h
a
01h
02h
03h
m
n
04h
05h
06h
07h
…
11h
12h
13h
0
1
2
3
e
f
i
j
COM0
COM1
COM2
COM3
b
BIT
c
g
k
o
d
h
l
p
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG17 SEG18 SEG19
Display Data is written to DDRAM every 4-bit data.
No need to wait for ACK bit to complete data transfer.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions - continued
Oscillator
The clock signals for internal circuit and panel display can be generated from internal oscillator or external clock.
If internal clock mode is used, OSCIN must be connected to VSS level.
When using external clock mode, input clock from OSCIN pin after ICSET command setting.
Clock
OSCIN
OSCIN
VSS
VSS
Figure 8. Internal Clock Mode
Figure 9. External Clock Mode
LCD Driver Bias Circuit
BU91796BMUF-M generates LCD driving voltage with on-chip Buffer AMP.
And it can drive LCD at low power consumption.
Line or frame inversion can be set by DISCTL command.
Refer to the “LCD Driving Waveform” for each LCD bias setting.
Blink Timing Generator
BU91796BMUF-M has Blink function.
Blink mode is asserted by BLKCTL command.
The Blink frequency varies depending on frame frequency characteristics at internal clock mode.
Refer to “Oscillation Characteristics” for frame frequency.
Reset Initialize Condition
Initial condition after executing Software Reset is as follows.
-Display is OFF.
-DDRAM address is initialized (DDRAM Data is not initialized).
Refer to “Detailed Command Description” for initial value of registers.
Command / Function List
Description List of Command / Function
No.
Command
Function
1
Set IC Operation (ICSET)
Software reset, internal/external clock setting
2
3
4
5
6
Display Control (DISCTL)
Address Set (ADSET)
Mode Set (MODESET)
Blink Control (BLKCTL)
All Pixel Control (APCTL)
Frame frequency, Power save mode setting
DDRAM address setting (00h to 13h)
Display on/off setting, 1/3bias setting
Blink off/0.5 Hz/1.0 Hz/2.0 Hz blink setting
All pixels on/off during DISPON
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BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions - continued
Detailed Command Description
D7 (MSB) is a command or data judgment bit.
Refer to “Command / Data Transfer Method”.
C: 0: Next byte is RAM write data.
1: Next byte is command.
Set IC Operation (ICSET)
MSB
D7
LSB
D0
D6
1
D5
1
D4
0
D3
1
D2
*
D1
P1
C
P0
(*: Don’t care)
Set software reset execution.
Setup
No operation
P1
0
Software Reset Execute
1
When “Software Reset” is executed, BU91796BMUF-M is reset to initial condition.
(Refer to “Reset Initialize Condition”)
Do not set Software Reset (P1) with P0 at the same time.
Set clock mode
Setup
Internal oscillator
External clock
P0
0
Reset initialize condition
○
1
-
Internal clock mode: OSCIN must be connected to VSS level.
External clock mode: Input external clock from OSCIN pin.
<Frame frequency Calculation at external clock mode>
DISCTL 80 Hz setting: Frame frequency [Hz] = external clock [Hz] / 512
DISCTL 71 Hz setting: Frame frequency [Hz] = external clock [Hz] / 576
DISCTL 64 Hz setting: Frame frequency [Hz] = external clock [Hz] / 648
DISCTL 53 Hz setting: Frame frequency [Hz] = external clock [Hz] / 768
Command
ICSET
OSCIN_EN
Internal clock mode
(Internal signal)
External clock mode
Internal oscillation
(Internal signal)
External clock
(OSCIN)
Figure 10. OSC MODE Switch Timing
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BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions - continued
Display Control (DISCTL)
MSB
D7
C
LSB
D0
P0
D6
0
D5
1
D4
P4
D3
P3
D2
P2
D1
P1
Set Power save mode FR.
Setup
P4
P3
Reset initialize condition
Normal mode (80 Hz)
0
0
1
1
0
1
0
1
○
-
Power save mode 1 (71 Hz)
Power save mode 2 (64 Hz)
Power save mode 3 (53 Hz)
-
-
Power consumption is reduced in the following order:
Normal mode > Power save mode1 > Power save mode 2 > Power save mode 3.
Set LCD drive waveform.
Setup
Line inversion
Frame inversion
P2
0
Reset initialize condition
○
1
-
Power consumption is reduced in the following order:
Line inversion > Frame inversion
Typically, when driving large capacitance LCD, Line inversion will increase the influence of crosstalk.
Regarding driving waveform, refer to “LCD Driving Waveform”.
Set Power save mode SR(Note 1)
Setup
.
P1
0
P0
0
Reset initialize condition
Power save mode 1
Power save mode 2
Normal mode
-
-
0
1
1
0
○
-
High power mode
1
1
(Note 1) Slew Rate
Power consumption is increased in the following order:
Power save mode 1 < Power save mode 2 < Normal mode < High power mode
Use VDD - VLCD ≥ 3.0 V in High power mode condition.
(Reference current consumption data)
Setup
Current consumption
Power save mode 1
Power save mode 2
Normal mode
×0.5
×0.67
×1.0
High power mode
×1.8
The data above is for reference only. Actual consumption depends on Panel load.
Address Set (ADSET)
MSB
D7
LSB
D0
D6
0
D5
0
D4
P4
D3
P3
D2
P2
D1
P1
C
P0
The range of address can be set from 00000 to 10011(bin).
Do not set out of range address, otherwise address will be set 00000.
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BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Functional Descriptions - continued
Mode Set (MODESET)
MSB
D7
LSB
D0
D6
1
D5
0
D4
*
D3
P3
D2
0
D1
*
C
*
(*: Don’t care)
Set display off and on.
Setup
P3
0
Reset initialize condition
Display off (DISPOFF)
Display on (DISPON)
○
1
-
Display off: Regardless of DDRAM Data, all SEGMENT and COMMON output will be stopped after writing the OFF
level of 1 frame. Display off mode will be disabled after Display on command.
Display on: SEGMENT and COMMON output will be active and start to read the Display Data from DDRAM.
Set 1/3 bias level
Setup
P2
0
Reset initialize condition
1/3 Bias
Prohibit
○
1
-
Refer to “LCD Driving Waveform”.
Blink Control (BLKCTL)
MSB
LSB
D7
D6
1
D5
1
D4
1
D3
0
D2
*
D1
P1
D0
C
P0
(*: Don’t care)
Set blink mode.
Blink mode (Hz)
P1
0
P0
Reset initialize condition
OFF
0.5
0
1
0
1
○
-
0
1.0
1
-
2.0
1
-
The Blink frequency varies depending on frame frequency characteristics at internal clock mode.
Refer to “Oscillation Characteristics” for frame frequency.
All Pixel Control (APCTL)
MSB
D7
C
LSB
D0
P0
D6
1
D5
1
D4
1
D3
1
D2
1
D1
P1
All display dot set ON, OFF
Setup
P1
0
Reset initialize condition
Normal
○
All pixel on (APON)
1
-
Setup
Normal
P0
0
Reset initialize condition
○
All pixel off (APOFF)
1
-
All pixels on: All pixels are ON regardless of DDRAM Data.
All pixels off: All pixels are OFF regardless of DDRAM Data.
This command is valid in Display on status. The data of DDRAM is not changed by this command.
If set both P1 and P0 = ”1”, APOFF will be selected.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
LCD Driving Waveform
(1/3bias)
Line Inversion
Frame Inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
COM1
COM2
COM3
stateA
COM0
COM1
COM2
COM3
stateA
stateB
stateB
1frame
1frame
VDD
VDD
COM0
COM1
COM2
COM0
COM1
COM2
COM3
SEGn
VLCD
VDD
VLCD
VDD
VLCD
VDD
VLCD
VDD
VLCD
VDD
VLCD
VDD
COM3
SEGn
VLCD
VDD
VLCD
VDD
VLCD
VDD
VLCD
VDD
SEGn+1
SEGn+1
SEGn+2
VLCD
VDD
VLCD
VDD
SEGn+2
VLCD
VDD
VLCD
VDD
SEGn+3
stateA
SEGn+3
stateA
VLCD
VLCD
(COM0-SEGn)
(COM0-SEGn)
(VDD-VLCD)
(VDD-VLCD)
2/3 (VDD-VLCD)
2/3 (VDD-VLCD)
1/3 (VDD-VLCD)
0
1/3 (VDD-VLCD)
0
-1/3 (VDD-VLCD)
-2/3 (VDD-VLCD)
- (VDD-VLCD)
-1/3 (VDD-VLCD)
-2/3 (VDD-VLCD)
- (VDD-VLCD)
stateB
(COM1-SEGn)
stateB
(COM1-SEGn)
(VDD-VLCD)
(VDD-VLCD)
2/3 (VDD-VLCD)
2/3 (VDD-VLCD)
1/3 (VDD-VLCD)
0
1/3 (VDD-VLCD)
0
-1/3 (VDD-VLCD)
-2/3 (VDD-VLCD)
-(VDD-VLCD)
-1/3 (VDD-VLCD)
-2/3 (VDD-VLCD)
- (VDD-VLCD)
Figure 11. LCD Waveform at Line Inversion (1/3bias)
Figure 12. LCD Waveform at Frame Inversion (1/3bias)
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Example of Display Data
If LCD layout pattern is like Figure 13 and Figure 14, and display pattern is like Figure 15, Display Data will be shown as
below.
COM0
COM1
COM2
COM3
Figure 13. Example COM Line Pattern
SEG1 SEG3
SEG2
SEG5 SEG7
SEG4 SEG6 SEG8
SEG9
SEG10
Figure 14. Example SEG Line Pattern
Figure 15. Example Display Pattern
<DDRAM Data mapping in Figure 15 display pattern>
S
E
G
0
S
E
G
1
S
E
G
2
S
E
G
3
S
E
G
4
S
E
G
5
S
E
G
6
S
E
G
7
S
E
G
8
S
E
G
9
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
S
E
G
10 11 12 13 14 15 16 17 18 19
COM0 D0
COM1 D1
COM2 D2
COM3 D3
Address
0
0
0
0
1
0
0
0
1
1
0
1
0
1
1
1
1
1
0
0
1
0
1
0
1
0
0
0
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Initialize Sequence
Follow the Power-on sequence below to initialize condition.
Power on
↓
STOP condition
↓
START condition
↓
Issue Slave Address
↓
Execute Software Reset by sending ICSET command.
After Power-on and before sending initialize sequence, each register value, DDRAM address and DDRAM Data are
random.
Start Sequence
Start Sequence Example1
No.
Input
D7 D6 D5 D4 D3 D2 D1 D0
Descriptions
VDD = 0 V→5 V
1
Power on
(tR: Min 1ms to Max 500 ms)
Initialize BU91796BMUF-M
STOP condition
↓
2
3
4
5
6
7
Wait min100µs
↓
STOP
↓
START
START condition
↓
Slave Address
0
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
0
*
0
1
0
0
0
0
Issue Slave Address
Software Reset
↓
ICSET
↓
BLKCTL
↓
Blink off
80 Hz, Frame inversion,
Power save mode1
8
DISCTL
1
0
1
0
0
1
0
0
↓
ICSET
↓
9
1
0
1
0
1
0
0
0
1
0
*
0
0
1
0
External clock input
DDRAM address set
10
11
ADSET
↓
0
Display Data
Display Data
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
address
address
00h to 01h
02h to 03h
Display Data
*
*
*
*
*
*
*
*
address
12h to 13h
↓
12
13
14
15
16
STOP
STOP condition
START condition
Issue Slave Address
Display on
↓
START
↓
Slave Address
0
1
1
1
1
0
1
*
1
1
1
0
0
*
0
*
↓
MODESET
↓
STOP
STOP condition
(*: Don’t care)
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Start Sequence – continued
Start Sequence Example2
Initialize
Initialize Sequence
DISPON Sequence
RAM Write Sequence
DISPOFF Sequence
DISPON
RAM Write
DISPOFF
BU91796BMUF-M is initialized with Initialize Sequence, starts to display with “DISPON Sequence”, updates Display Data
with “RAM Write Sequence” and stops the display with “DISPOFF Sequence”.
Execute “DISPON Sequence” in order to restart display.
Initialize Sequence
DATA
Input
Description
D7 D6 D5 D4 D3 D2 D1 D0
Power on
Wait 100µs
STOP
START
0
1
1
0
*
1
1
1
0
*
1
1
0
0
*
1
0
0
0
*
1
1
0
0
*
1
0
0
0
*
0
1
0
0
*
0
0
0
0
*
Slave Address
ICSET
-
Execute Software Reset
Display off
RAM address set
Display Data
MODESET
ADSET
Display Data
…
STOP
DISPON Sequence
DATA
Input
Description
D7 D6 D5 D4 D3 D2 D1 D0
START
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
Slave Address
ICSET
-
Execute internal OSC mode
Set Display Control
Set BLKCTL
DISCTL
BLKCTL
APCTL
MODESET
Set APCTL
Display on
STOP
RAM Write Sequence
DATA
D7 D6 D5 D4 D3 D2 D1 D0
Input
Description
START
Slave Address
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
1
0
1
0
0
1
0
0
1
-
Execute internal OSC mode
Set Display Control
ICSET
DISCTL
BLKCTL
Set BLKCTL
1
1
1
1
1
1
1
1
0
1
1
0
0
1
1
0
1
0
0
0
0
0
0
0
Set APCTL
APCTL
MODESET
Display on
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
ADSET
RAM address set
Display Data
Display Data
…
STOP
DISPOFF Sequence
DATA
Input
Description
D7 D6 D5 D4 D3 D2 D1 D0
START
0
1
1
1
1
1
1
1
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
Slave Address
ICSET
-
Execute internal OSC mode
MODESET
STOP
Display off
Abnormal operation may occur in BU91796BMUF-M due to the effect of noise or other external factor.
To avoid this phenomenon, it is highly recommended to input command according to sequence described above
during initialization, display on/off and refresh of RAM data.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Cautions in Power ON/OFF
To prevent incorrect display, malfunction and abnormal current, follow Power On/Off sequence shown in waveform below.
VDD must be turned on before VLCD during power up sequence.
VDD must be turned off after VLCD during power down sequence.
Set VDD - 2.4 V ≥ VLCD, t1 > 0 ns and t2 > 0 ns.
Do not send the data while power supply is rising up or falling down to prevent from the occurrence of disturbances on
transmission and reception.
t1
t2
VLCD
VDD
10%
10%
VDD min
VDD min
Figure 16. Power ON/OFF Waveform
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Caution in POR Circuit Use
BU91796BMUF-M has “POR” (Power-On Reset) circuit and Software Reset function.
Keep the following recommended Power-On conditions in order to power up properly.
Set power up conditions to meet the recommended tR, tF, tOFF, and VBOT specification below in order to ensure POR
operation.
Set pin TEST2 = ”VSS” to enable POR circuit.
tF
VDD
tR
Recommended condition of tR, tF, tOFF, VBOT (Ta = +25 °C)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
tR
1 ms
to 500 ms to 500 ms
tF
tOFF
VBOT
1 ms
Less than
0.1 V
tOFF
Min 20 ms
VBOT
(Note 1) This function is guaranteed by design, not tested in production process.
Figure 17. Power ON/OFF Waveform
When it is difficult to keep above conditions, it is possibility to cause unintentional display due to no IC initialization.
Execute the IC initialization as quickly as possible after Power-On to reduce such an affect.
See the IC initialization flow as below.
Setting TEST2 = "VDD" disables the POR circuit, in such case, execute the following sequence.
Note however that it cannot accept command while power supply is OFF.
Note also that software reset is not a complete alternative to POR function when power supply is OFF.
1. Generate STOP Condition
VDD
SDA
SCL
STOP condition
Figure 18. STOP Condition
2. Generate START Condition.
VDD
SDA
SCL
START condition
Figure 19. START Condition
3. Issue Slave Address
4. Execute Software Reset (ICSET) Command
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Display off Operation in External Clock Mode
After receiving MODESET (Display off), BU91796BMUF-M enters to DISPOFF sequence synchronized with frame then
Segment and Common ports output VSS level after 1frame of OFF data write.
Therefore, in external clock mode, it is necessary to input the external clock based on each frame frequency setting after
sending MODESET (Display off).
For the required number of clock, refer to Power save mode FR of DISCTL.
Input the external clock as below.
DISCTL 80 Hz setting (Frame frequency [Hz] = external clock [Hz] / 512) , it needs 1024 clk or more.
DISCTL 71 Hz setting (Frame frequency [Hz] = external clock [Hz] / 576) , it needs 1152 clk or more.
DISCTL 64 Hz setting (Frame frequency [Hz] = external clock [Hz] / 648) , it needs 1296 clk or more.
DISCTL 53 Hz setting (Frame frequency [Hz] = external clock [Hz] / 768) , it needs 1536 clk or more.
Refer to the timing chart below.
MODESET
Command
OSCIN
To input External clock at
least 2 f rames or more
SEG0 to
VSS
VSS
SEG19
COM0
COM1
VSS
VSS
VSS
COM2
COM3
Display on
Display off
Last Display f rame of
MODESET receiv ing
1 frame of OFF
data write
Figure 20. External Clock Stop Timing
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Note on the Multiple Devices be Connected to 2 Wire Serial Interface
Do not access the other device without power supply (VDD) to the BU91796BMUF-M.
MCU
BU91796BMUF-M
Device1
Figure 21. Example of BUS connection
For slew rate control, a capacitor is connected between gate and drain of a NMOS transistor for SDA output (Refer to “Figure
22”). The gate is in a high-impedance state when the power supply (VDD) is not supplied. In this condition, the gate voltage
(Vg) is pulled up by the current flow through the capacitance as a result of the SDA signal's transition from LOW to HIGH. The
NMOS output transistor turns on and draws some current (Ids) from the SDA pin if the gate voltage (Vg) is higher than the
threshold voltage (Vth).
An external resistor (R) is connected between the power line and SDA line to keep the SDA line as logic HIGH.
But the line cannot be kept as logic HGH if the voltage drop (R*Ids) is large.
Apply power supply (VDD) to BU91796BMUF-M when the multiple devices are on the same bus.
VDD
Z = 1/jωC
SDA
Vg
Internal Circuit
Figure 22. SDA output cell structure
Note in Case that the SDA is stuck at LOW
Normally, BU91796BMUF-M SDA status is controlled by MCU, so it set SDA to VSS level only in ACK timing and in output “0”
case. If the data line (SDA) is stuck at LOW by BU91796BMUF-M unexpectedly, MCU should send one dummy byte with
START and STOP Conditions as shown in Figure 23 (Set SDA level High). BU91796BMUF-M will release from SDA stuck
condition by this sequence.
SDA will be released in this sequence
Stuck at LOW
Normal State
SDA status of BU91796BMUF-M
SDA from MCU
SCL from MCU
Dummy Byte
(9 SCL pulses)
START
Condition
STOP
Condition
Figure 23. Recovery Sequence from SDA Stuck
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
6.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
10. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin
lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have
voltages within the values specified in the electrical characteristics of this IC.
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Ordering Information
B U
9
1
7
9
6
B M U F -
M E 2
Product Rank
M: for Automotive
Package
Part Number
Packaging and forming specification
E2: Embossed tape and reel
MUF: VQFN32FBV050
Marking Diagram
VQFN32FBV050 (TOP VIEW)
Part Number Marking
9 1 7 9 6 B
LOT Number
Pin 1 Mark
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Physical Dimension and Packing Information
Package Name
VQFN32FBV050
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Datasheet
BU91796BMUF-M
MAX 80 Segments (SEG20×COM4)
Revision History
Date
Revision
001
Changes
12. Jun. 2019
New Release
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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