BU95101BR [ROHM]
Drivers for Large LCD Panels; 驾驶大型LCD面板型号: | BU95101BR |
厂家: | ROHM |
描述: | Drivers for Large LCD Panels |
文件: | 总15页 (文件大小:280K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Drivers for Large LCD Panels
6bit RSDSTM
Source Driver
BU95101
No.10043EAT01
●Description
ROHMLCD drivers for large panels are display drivers optimized for large LCDs in a variety of applications, including
desktop PCs, laptops, and TVs. The broad lineup is offered in low amplitude differential transmission interface type
(RSDSTM) featuring low EMI, 6bit gradation precision, and different output configurations (384 and up) for wide compatibility.
●Features
1) 384 output channels
2) 6bit 9pair RSDSTM inputs
3) Dot & n-line inversion available
4) Built-in 2ch repair amplifiers
5) γcorrection is possible
6) Built-in input data reversing function(INV)
7) Output voltage range : AVSS+0.1V ~ AVDD-0.1V
8) High speed data transfer : fCLK(MAX)=85MHz
9) Logic power supply voltage (DVDD) : 2.7 ~ 3.6V
10) Driver power supply voltage (AVDD) : 8.0 ~ 13.5V
11) Package : COF35
●Applications
TFT LCD Panels
●Line up matrix
BU95101
384
BU95303
BU95306
BU95408
Number of outputs
384 / 414 / 420 / 432
600 / 618 / 630 / 642
684 / 690 / 702 / 720
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
1/14
Technical Note
BU95101
●Absolute maximum ratings
Parameter
Symbol
DVDD
AVDD
VI1
Ratings
Unit
V
Logic power supply voltage
Driver power supply voltage
Logic input voltage
-0.3 ~ +4.5
-0.3 ~ +14.0
V
-0.3 ~ DVDD+0.3
-0.3 ~ DVDD+0.3
-0.3 ~ AVDD+0.3
-0.3 ~ AVDD+0.3
-55 ~ +125
V
Logic output voltage
VO1
V
Driver input voltage
VI2
V
Driver output voltage
Storage temperature range
VO2
V
Tstg
℃
●Recommended operating range
Parameter
Symbol
DVDD
AVDD
V1 ~ V10
VO
Ratings
+2.7 ~ +3.6
+8.0 ~ +13.5
0.1 ~ AVDD-0.1
0.1 ~ AVDD-0.1
150
Unit
V
Logic power supply voltage
Driver power supply voltage
γ-correction reference voltage
Driver output voltage
V
V
V
Output load capacitance
Maximum clock frequency
CL
pF
MHz
℃
fCLK(MAX)
Topr
85
Operating temperature range
-20 ~ +75
* AVSS=DVSS=0V
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2010.10 - Rev.A
2/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Electrical characteristics (DC)
(Unless otherwise noted, Ta=-20 ~ +75℃, DVDD=2.7 ~ 3.6V, AVDD=8.0 ~ 13.5V, DVSS=AVSS=0V)
Limits
Parameter
Logic Part
Symbol
Unit
Conditions
Min.
Typ.
Max.
Logic supply current
Input “H” voltage
Input “L” voltage
Input “H” current
Input “L” current
Output “H” voltage
IDDL
V1H
V1L
I1H1
I1L1
VOH
VOL
-
8
-
-
-
-
-
-
12
mA fclk=85MHz,Data=15h-2Ah
V
0.7DVDD
DVDD
R/L,SFTR,INV,SFTL,
POL,STB
0
0.3DVDD
V
-
+1
-
μA VIN=DVDD
μA VIN=DVSS
Dxx, SFTR, POL, INV,
SFTL,CLK,STB,R/L
-1
DVDD-0.5
-
-
V
V
IOH=-1.0mA
IOL=1.0mA
SFTR,SFTL
Output “L” voltage
Driver part
0.5
Driver supply current
IDDA
-
5
10
mA noLoad, fclk=85MHz,Data=15h-2Ah
R
γ
UP
11.2
16.0
16.0
±20
±10
±10
±3
20.8
20.8
±30
±20
±20
±10
kΩ V1 ~ V5
γcorrection resistance
Rγ
LOW
11.2
kΩ V6 ~ V10
-
-
-
-
mV Yout=0.1V ~ 1.2V,Yout=10.8V ~ 11.9V
mV Yout=1.2V ~ 10.8V
*1
Output voltage deviation
VOD1
mV Yout=0.1V ~ 1.2V,Yout=10.8V ~ 11.9V
mV Yout=1.2V ~ 10.8V
Output swing voltage
Deviation
*2
VRMS
Output voltage deviation 2
(between chips)
*3
VOD2
-
-
-
-
-
±7.5
AVDD-0.1
+1
mV
V
Repair input voltage
V1NB
I1BH
I1BL
0.1
-1
Repair input “H” current
Repair input “L” current
μA VIN=AVDD=13.5V
μA VIN=AVSS
IREP1,2
-1
+1
IVOHY
IVOHR
IVOLY
IVOLR
-
-0.8
-2.0
0.8
-0.4
mA Y1 ~ Y384, Vx=8 V, Yout=11V
mA OREP1,2, Vx=8 V, Yout=11V
mA Y1 ~ Y384, Vx=4 V, Yout=1V
mA OREP1,2, Vx=4 V, Yout=1V
Driver output “H” current
-
-0.8
0.4
0.8
-
-
Driver output“L” current
RSDSTMInput part
2.0
RSDSTM
input “H” voltage
RSDSTM
input “L” voltage
RSDSTM
common input voltage
VIHRSDS
VILRSDS
VCMRSDS
100
-
200
-200
-
-
mV
VCMRSDS=+1.2V*4
CLKP/N,DXXP/N
-100
1.4
mV
V
(X=0,1,2)
0.5
VDIFF=200mV*5
*1 VOD1=measured output voltage - averaged output voltage of all outputs
*2
*3
V
V
RMS=measured output swing voltage - averaged output swing voltage of all outputs
OD2=averaged output voltage - target value
*4 VCM RSDS = (VCLKP+VCLKN)/2 or (VDXXP+VDXXN)/2
*5 DIFF = VCLKP- VCLKN or VDXXP-VDXXN
V
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2010.10 - Rev.A
3/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Electrical characteristics (AC)
(Unless otherwise noted, Ta=-20 ~ +75℃, DVDD=2.7 ~ 3.6V, AVDD=8.0 ~ 13.5V, DVSS=AVSS=0V)
Limits
Parameter
Clock pulse width
Symbol
Unit
Conditions
Min.
Typ.
-
Max.
-
tw
th
1/85MHz
ns
Clock pulse "H" period
Clock pulse "L" period
Data setup time
4
4
2
0
2
2
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
tl
ns
tsu1
thd1
tsu2
thd2
tWSFT
tdc
-
ns
Data hold time
-
ns
Start pulse setup time
Start pulse hold time
Start pulse width
-
ns
ns
-
2
10
-
CLK period
ns
Carry output delay time
STB pulse width
CL=15pF
tWSTB
tLDT
1
0
5
4
14
CLK period
CLK period
CLK period
ns
Final data timing
-
Time between STB↑and start pulse↑ tSTB-SFT
-
Time between STB↑and CLK↓
tSTB-CLK
tsp
-
POL/STB setup time
-
ns
*1*3
*2*3
-
-
-
-
6
μs
μs
Output delay time
tdout
10
*1
*2
*3
The value is specified when the drive voltage value reaches the target output voltage level of 90%.
he value is specified when the drive voltage value reaches the target output voltage level of 6-bit accuracy.
Output load condition:
R1=R2=R3=1kΩ, C1=C2=C3=50pF
R1
R2
R3
Output
(Test Probe)
C1
C2
C3
Vcom=AVSS
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2010.10 - Rev.A
4/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Block diagram
・・・・・・・・・・・・・・・・・
AVDD
AVSS
Output Buffer
OREP2
IREP2
・・・・・・・・・・・・・・・・・
OREP1
IREP1
10
V1~V10
D/A Converter
POL
6
6
6 6
6 6 6
・・・・・・・・・・・・・・・・・
Level Shifter
・・・・・・・・・・・・・・・・・
6 6
6 6 6
Data Latch
STB
6 6 6
6
6 6
・・・・・・・・・・・・・・・・・
Data Register
D
D
D
00P/N~D02P/N
10P/N~D12P/N
20P/N~D22P/N
INV
240 bit Bi-directional Shift Register
CLKP/N
SFTL
DVDD
DVSS
SFTR
R/L
Fig.1 Block diagram
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
5/14
Technical Note
BU95101
●Pin configuration
IREP2
OREP2
SFTL
D22P
Y384
Y383
Y382
・
D22N
D21P
・
・
D21N
D20P
D20N
D12P
D12N
D11P
D11N
D10P
D10N
DVDD
R/L
V10
V9
V8
V7
V6
・
・
・
・
・
・
・
BU95101
Top View
AVDD
AVSS
V5
V4
V3
・
・
・
・
V2
V1
DVSS
CLKP
CLKN
STB
POL
INV
D02P
D02N
D01P
D01N
D00P
D00N
SFTR
OREP1
IREP1
・
・
・
・
Y3
Y2
Y1
↓
BUMP
BUMP
IC
Fig.2 Pin configuration (Top View)
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2010.10 - Rev.A
6/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Pin descriptions
Pin Name
In/Out
In
Active
Descriptions
RSDS input terminals of display data
Differential The 3-bit differential input pairs generate the internal 6-bit data through the
comparison between DXXP and DXXN
D00P/N ~ D02P/N
D10P/N ~ D12P/N
20P/N ~ D22P/N
D
.
The RSDS clock input pair generate the internal shift clock through the
comparison between CLKP and CLKN.
CLKP/N
Y1 ~ Y384
R/L
In
Out
In
Differential
-
-
Driver outputs for D/A converted 64 gray scale analog voltage.
The shift direction of internal shift register is controlled by this pin as shown below.
R/L=H : Right shift SFTR→Y1→Y384→SFTL
R/L=L : Left shift SFTL→Y384→Y1→SFTR
SFTR=H:Right shift start pulse input terminal in cascade connection.
SFTR=L:Carry output terminal in cascade connection.
SFTR
SFTL
In/Out
In/Out
In
H
H
SFTL=H:Carry output terminal in cascade connection.
SFTL=L:Left shift start pulse input terminal in cascade connection.
The data in the data register are transferred to the data latch at the rising edge
of STB, then the gray scale voltages are output from the buffer at the falling
edge of STB.
STB
Terminal to specify inverting or non-inverting of display data
INV:H : Input data are inverted in the IC.
INV:L : Input data are not inverted.
INV
In
H
-
Input for the γ-correction reference voltage
The following external reference voltages are input.
V1 ~ V10
In
At the rising edge of STB, the state of POL are transferred to the driver.
POL=H : The reference voltage for odd number outputs are V1 to V5
and those for even number outputs are V6 to V10.
POL
In
-
POL=L : The reference voltage for odd number outputs are V6 to V10
and those for even number outputs are V1 to V5
IREP1,2
OREP1,2
AVDD
In
Out
In
-
-
-
-
-
-
Repair amplifier input
Repair amplifier output
Power supply for driver block
Ground for AVDD
AVSS
In
DVDD
In
Power supply for digital block
Ground for DVDD
DVSS
In
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2010.10 - Rev.A
7/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Relationship between Input Data and Output Terminals
R/L=H (Right Shift)
First
→
…
…
Last
D10P ~ D12N
Y383
Data
D00P ~ D02N
Y1
D10P ~ D12N
Y2
D20P ~ D22N
Y3
D00P ~ D02N
Y382
D20P ~ D22N
Y384
Output
R/L=L (Left Shift)
First
D10P ~ D12N
Y383
→
…
…
Last
D10P ~ D12N
Y2
Data
D00P ~ D02N
Y382
D20P ~ D22N
Y384
D00P ~ D02N
Y1
D20P ~ D22N
Y3
Output
●Relationship between R/L , SFTR , SFTL and Output Direction
R/L pin controls the shift direction of the internal shift resistor as shown below.
Terminal
Right Shift Mode
Left Shift Mode
R/L
“H”
“L”
SFTR
Input
Output
Output
Input
SFTL
Output direction
Y1,Y2,Y3→Y382,Y383,Y384
Y384,Y383,Y382→Y3,Y2,Y1
●Relationship between POL and Output Polarity
POL
Y1
Y2
Y3
Y4
Y5
Y6
“H”
+*1
“L”
-*1
-
+
-
+
-
+
-
+
-
+
・
・
・
・
・
・
Y379
Y380
Y381
Y382
Y383
Y384
+
-
-
+
-
+
-
+
-
+
-
+
*1 +: The reference voltage are V1 ~ V5
-: The reference voltage are V6 ~ V10
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
8/14
Technical Note
BU95101
●Relationship between Input Data and Output Voltage
The LCD driver output voltages are determined by the input data and 10γ-corrected power supply.
0.1V≦V10≦V9≦V8≦V7≦V6≦0.5AVDD
0.5 AVDD≦V5≦V4≦V3≦V2≦V1≦AVDD -0.1V
Vout
AVDD
V1
V2
V3
V4
V5
VCOM
V6
V7
V8
V9
V10
AVSS
00H
08H
10H
18H
20H
28H
30H
38H
3FH
Input Data
Fig.3 Input data - γcorrection curve
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
9/14
Technical Note
BU95101
●γcorrection Power Supply Circuit
10 external γ-corrected power supply is connected to ladder resistors inside IC.
IC Internal Circuit
V1
RS0
V2
RS1
V3
RS2
V4
RS3
V5
External
γ-corrected
power supply
V6
RS4
V7
RS5
V8
RS6
V9
RS7
V10
Fig.4 γcorrection power supply circuit
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2010.10 - Rev.A
10/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●RSDSTM data timing
thd2
tsu2
thd1
tsu1
thd1
tsu1
CLKP/N
SFTR
D00P/N
Y1
(0)
Y1
(1)
Y7
(0)
Y7
(1)
Y4
(0)
Y4
(1)
Y1
(2)
Y1
(3)
Y4
(2)
Y4
(3)
Y7
(2)
Y7
(3)
D01P/N
Y4
(4)
Y4
(5)
Y7
(4)
Y7
(5)
Y1
(4)
Y1
(5)
D02P/N
Y5
(0)
Y2
(0)
Y2
(1)
Y5
(1)
Y8
(0)
Y8
(1)
D10P/N
D11P/N
D12P/N
Y8
(2)
Y2
(2)
Y2
(3)
Y5
(2)
Y5
(3)
Y8
(3)
Y2
Y8
(4)
Y8
(5)
Y2
(5)
Y5
(4)
Y5
(5)
(4)
Y6
(0)
Y3
(0)
Y9
(0)
Y9
(1)
Y3
(1)
Y6
(1)
D20P/N
Y9
(2)
Y9
(3)
Y3
(3)
Y3
(2)
Y6
(2)
Y6
(3)
D21P/N
Y3
(4)
Y3
(5)
Y6
(4)
Y6
(5)
Y9
(4)
Y9
(5)
D22P/N
Fig.5 RSDS data timing
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
11/14
Technical Note
BU95101
●Timing chart
Fig.6 Timing chart
12/14
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2010.10 - Rev.A
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Power Supply Sequence
Maintain the following power supply order to prevent the device from being destroyed.
Turn on power order : DVDD → Input signal → AVDD, V1 ~ V10
Turn off power order : AVDD, V1 ~ V10 → Input signal → DVDD
AVDD
V1~V10
DVDD
Input signal
DVSS, AVSS
t
●Notes for use
1) When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may
flow instantaneously.
Therefore, give special consideration to power coupling capacitance, power wiring, width of GNDwiring, and routing of
connections.
2) For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal
powering sequence and delays.
Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of
wiring.
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2010.10 - Rev.A
13/14
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BU95101
●Ordering part number
B
U
9
5
1
0
1
-
S
R
Part No.
Part No.
Reel packing specification
SR: A pattern side is an inner arrow.
The output side is the right side.
SL: A pattern side is an inner arrow.
The output side is the left side.
BR: A pattern side is an outside arrow.
The output side is the right side.
BL: A pattern side is an outside arrow.
The output side is the left side.
COF35
<Tape dimensions>
<Packing specifications>
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
14/14
Notice
N o t e s
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consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
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