KS86C6404Q-XX [SAMSUNG]
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| 型号： | KS86C6404Q-XX |
| 厂家： | 
SAMSUNG |
| 描述： | 暂无描述 微控制器 |
| 文件： | 总28页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
KS86C6404/C6408/P6408
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.
A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible
programming environment for applications with varied memory and I/O requirements. Timer/counters with
selectable operating modes are included to support real-time operations. Many SAM87RI microcontrollers have
an external interface that provides access to external memory and other peripheral devices.
KS86C6404/C6408/P6408 MICROCONTROLLER
The KS86C6404/C6408/P6408 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process.
It is built around the powerful SAM87RI CPU core.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The KS86C6404 has 4 K bytes of program
memory on-chip and KS86C6408 has 8 K bytes.
Using the SAM87RI design approach, the following peripherals were integrated with the SAM87RI core:
— Five configurable I/O ports (32 pins)
— 20 bit-programmable pins for external interrupts
— 8-bit timer/counter with three operating modes
— Low speed USB function
The KS86C6404/C6408/P6408 is a versatile microcontroller that can be used in a wide range of low speed USB
support general purpose applications. It is especially suitable for use as a keyboard controller and is available in
a 42-pin SDIP and a 44-pin QFP package.
OTP
The KS86C6404/C6408 microcontroller is also available in OTP (One Time Programmable) version,
KS86P6408. KS86P6408 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM instead of
masked ROM. The KS86P6408 is comparable to KS86C6404/C6408, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
KS86C6404/C6408/P6408
FEATURES
CPU
•
SAM87RI CPU core
Timer/Counter
•
One 8-bit basic timer for watchdog function and
programmable oscillation stabilization interval
generation function
Memory
•
•
4/8-Kbyte internal program memory (ROM)
208-byte RAM
•
One 8-bit timer/counter with Compare/Overflow
Instruction Set
USB Serial Bus
•
•
41 instructions
•
Compatible to USB low speed (1.5 Mbps) device
1.0 specification.
IDLE and STOP instructions added for power-
down modes
•
•
1 Control endpoint and 2 Data endpoint
Serial bus interface engine (SIE)
Instruction Execution Time
1.0 ms at 6 MHz fOSC
— Packet decoding/generation
•
— CRC generation and checking
— NRZI encoding/decoding and bit-stuffing
8 bytes each receive/transmit USB buffer
Interrupts
•
25 interrupt sources with one vector, each
•
source has its pending bit
Operating Temperature Range
•
One level, one vector interrupt structure
° °
– 40 C to + 85 C
•
Oscillation Circuit
Operating Voltage Range
4.0 V to 5.25 V
•
•
6 MHz crystal/ceramic oscillator
External clock source (6 MHz)
•
Package Types
General I/O
•
•
42-pin SDIP
44-pin QFP
•
Bit programmable five I/O ports (34 pins total)
— (D+/PS2, D-/PS2 Included)
1-2
KS86C6404/C6408/P6408
PRODUCT OVERVIEW
BLOCK DIAGRAM
P1.0-P1.7
P0.0-P0.7/INT2
Port 0
P2.0-P2.7 / INT0
Port 2
Port 1
SAM87RI BUS
P3.0
X
IN
P3.1
P3.2
P3.3/CLO
OSC
I/O Port And
Interrupt Control
Port 3
X
OUT
P4.0 / INT1
P4.1 / INT1
P4.2 / INT1
P4.3 / INT1
Basic
Timer
Port 4
USB
SAM87RI CPU
D+/PS2
D-/PS2
3.3 V
OUT
TIMER 0
16 bytes
USB
Buffer
208-Byte
Register
4/8-KB ROM
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
KS86C6404/C6408/P6408
PIN ASSIGNMENTS
P3.1
P3.0
P3.2
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P3.3/CLO
D+/PS2
D-/PS2
3.3 VOUT
NC
2
INT0 / P2.0
3
INT0 / P2.1
INT0 / P2.2
INT0 / P2.3
INT0 / P2.4
INT0 / P2.5
INT0 / P2.6
INT0 / P2.7
4
5
6
P0.0 / INT
P0.1 / INT
P0.2 / INT
P0.3 / INT
P0.4 / INT
P0.5 / INT
P0.6 / INT
P0.7 / INT
P1.0
7
8
9
KS86C6404
KS86C6408
10
11
12
13
14
15
16
17
18
19
20
21
VDD
VSS
42-SDIP
(Top View)
XOUT
X
IN
TEST
INT1 / P4.0
P1.1
INT1 / P4.1
P1.2
RESET
P1.3
INT1 / P4.2
INT1 / P4.3
P1/7
P1.4
P1.5
P1.6
Figure 1-2. Pin Assignment Diagram (42-Pin SDIP Package)
1-4
KS86C6404/C6408/P6408
PRODUCT OVERVIEW
P1.0
3.3 V
22
21
20
19
18
17
16
15
14
13
12
34
35
36
37
38
39
40
41
42
43
44
OUT
P1.1
D-/PS2
D+/PS2
P3.3/CLO
P3.2
P1.2
P1.3
P1.4
KS86C6404
P1.5
P3.1
KS86C6408
P1.6
P3.0
(Top View)
P1.7
P2.0/INT0
P2.1/INT0
P2.2/INT0
P2.3/INT0
P4.3/INT1
P4.2/INT1
RESET
Figure 1-3. Pin Assignment Diagram (44-Pin QFP Package)
1-5
PRODUCT OVERVIEW
KS86C6404/C6408/P6408
PIN DESCRIPTIONS
Table 1-1. KS86C6404/C6408/P6408 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Number
Pin
Numbers
Share
Pins
P0.0-P0.7
I/O
Bit-programmable I/O port for Schmitt trigger
input or open-drain output. Port0 can be
individually configured as external interrupt
inputs. Pull-up resistors are assignable by
software.
B
36-29
(30-23)
INT2
P1.0-P1.7
P2.0-P2.7
I/O
I/O
Bit-programmable I/O port for Schmitt trigger
input or open-drain output. Pull-up resistors are
assignable by software.
B
B
28-21
(22-15)
–
Bit-programmable I/O port for Schmitt trigger
input or open-drain output. Port2 can be
individually configured as external interrupt
inputs. Pull-up resistors are assignable by
software.
3-10
(41-44, 1-4)
INT0
P3.0-P3.3
P4.0-P4.3
I/O
I/O
Bit-programmable I/O port for Schmitt trigger
input, open-drain or push-pull output. P3.3 can
be used to system clock output(CLO) pin.
C
D
2, 1, 42, 41
(40-37)
P3.3/CLO
INT1
Bit-programmable I/O port for Schmitt trigger
input or open-drain output or push-pull output.
Port4 can be individually configured as external
interrupt inputs. In output mode, pull-up resistors
are assignable by software. But in input mode,
pull-up resistors are fixed.
16, 17, 19, 20
(10, 11, 13,
14)
D+/PS2
D-/PS2
I/O
Programmable port for
USB interface or PS2 interface.
–
40-39 (36-35)
38 (34)
–
3.3 VOUT
–
–
3.3 V output from internal voltage regulator
–
–
–
–
X , X
IN OUT
System clock input and output pin
(crystal/ceramic oscillator, or external clock
source)
14, 13
(8, 7)
INT0
INT1
INT2
I
External interrupt for bit-programmable port0,
port2 and port4 pins when set to input mode.
–
3-10, 16,17,
19, 20, 29-36
(30-23, 41-44,
1-4, 10, 11,
13, 14)
PORT2/
PORT4/
PORT0
RESET
TEST
I
I
RESET signal input pin. Input with internal pull-
up resistor.
A
–
18 (12)
–
–
Test signal input pin (for factory use only;
15 (9)
connected to V
)
SS
VDD
VSS
NC
–
–
–
Power input pin
Ground input pin
No connection
–
–
–
11 (5)
–
–
–
12, (6)
37
(31,32, 33)
NOTE: Pin numbers shown in parenthesis '( )' are for the 44-QFP package; others are for the 42-SDIP package.
1-6
KS86C6404/C6408/P6408
PRODUCT OVERVIEW
PIN CIRCUITS
Table 1-2. Pin Circuit Assignments for the KS86C6404/C6408/P6408
Circuit Number
Circuit Type
KS86C6404/C6408/P6408 Assignments
A
B
C
D
I
RESET signal input
Ports 0, 1, and 2
Port 3
I/O
I/O
I/O
Port 4
VDD
Pull-Up
Resistor
VDD
Pull-Up Enable
PULL-UP
RESISTOR
Output
Disable
I/O
Output
Data
Noise
Filter
IN
VSS
Input
Data
D0
D1
MUX
Mode
Input Data
Output
Input
D0
D1
Figure 1-4. Pin Circuit Type A (RESET)
Figure 1-5. Pin Circuit Type B (Ports 0, 1 and 2)
1-7
PRODUCT OVERVIEW
KS86C6404/C6408/P6408
VDD
Output
Data
Open
Drain
I/O
Output
Disable
VSS
D0
D1
Input
Data
MUX
Mode
Output
Input
Input Data
D0
D1
Figure 1-6. Pin Circuit Type C (Port 3)
1-8
KS86C6404/C6408/P6408
PRODUCT OVERVIEW
DD
V
Pull-Up
Resistor
Pull-Up
Enable
DD
V
Output
Data
Open
Drain
I/O
Output
Disable
VSS
D0
D1
Input
Data
MUX
Mode
Output
Input
Input Data
D0
D1
Figure 1-7. Pin Circuit Type D (Port 4)
1-9
PRODUCT OVERVIEW
APPLICATION CIRCUIT
5V
KS86C6404/C6408/P6408
5V
VDD
0
1
2
3
15
KS86C6404
KS86C6408
KS86P6408
X
IN
XOUT
0
1
2
3
RESET
D+/PS2
D-/PS2
DP
DM
H
7
O
S
T
KEYBOARD
MATRIX
VSS1
:
Port4 can use expend keyboard MATRIX.
NOTE
D+/PS2, D-/PS2 can use PS2 keyboard interface (see PS2CONINT, page 4-25).
Port 4.2, 4.3 can use PS2 mouse interface.
Port 3 can use LED direct drive.
Figure 1-8. Keyboard Application Circuit Diagram
1-10
KS86C6404/C6408/P6408
ELECTRICAL DATA
12 ELECTRICAL DATA
OVERVIEW
In this section, the following KS86C6404/C6408/P6408 electrical characteristics are presented in tables and
graphs:
— Absolute maximum ratings
— D.C. electrical characteristics
— Input/Output capacitance
— A.C. electrical characteristics
— Input timing for external interrupt (Ports 0, 2 and 4) D+/PS2, D-/PS2 : PS2 Mode Only
— Input timing for RESET
— Oscillator characteristics
— Oscillation stabilization time
— Clock timing measurement points at XIN
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a reset
— Stop mode release timing when initiated by an external interrupt
— Characteristic curves
12-1
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-1. Absolute Maximum Ratings
°
(TA = 25 C)
Parameter
Symbol
VDD
VIN
Conditions
–
Rating
Unit
V
Supply Voltage
Input Voltage
– 0.3 to + 6.5
– 0.3 to VDD + 0.3
– 0.3 to VDD + 0.3
– 18
All input ports
V
Output Voltage
Output Current High
VO
All output ports
V
IOH
One I/O pin active
All I/O pins active
One I/O pin active
Total pin current for ports 3
Total pin current for ports 0, 1, 2, 4
–
mA
– 60
Output Current Low
IOL
+ 30
mA
+ 100
+ 100
Operating
Temperature
TA
– 40 to + 85
°
°
C
C
Storage
TSTG
–
– 65 to + 150
Temperature
12-2
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-2. D.C. Electrical Characteristics
(TA = – 40 C to + 85 C, VDD = 4.0 V to 5.25 V)
°
°
Parameter
Symbol
Conditions
fOSC = 6 MHz
Min
Typ
Max
Unit
VDD
Operating Voltage
4.0
5.0
5.25
V
(instruction clock = 1 MHz)
All input pins except VIH2
VIH1
VIH2
VIH3
VIL1
VIL2
VIL2
VOH
0.8 VDD
VDD
VDD
Input High Voltage
Input Low Voltage
–
V
V
V
XIN
VDD – 0.5
0.5VDD
–
RESET
All input pins except VIL2
0.2 VDD
0.4
–
XIN
0.5VDD
–
RESET
IOH = – 200 µA; All output
VDD – 1.0
Output High
Voltage
–
ports except ports 0, 1 and 2,
D+, D–
VOL
IOL
IOL = 1 mA
Output Low Voltage
Output Low Current
–
8
–
0.4
23
V
All output port except D+, D–
VOL = 3V
15
mA
Port 3 only
(3)
VIN = VDD
All inputs except ILIH2
except D+, D–
Input High
Leakage Current
–
–
3
µA
ILIH1
(3)
VIN = VDD
XIN, XOUT, RESET
–
–
–
–
20
µA
µA
ILIH2
(3)
VIN = 0 V
Input Low
– 3
ILIL1
Leakage Current
All inputs except ILIL2
except D+, D–
(3)
VIN = 0 V
–
–
– 20
µA
ILIL2
XIN, XOUT, RESET
12-3
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-2. D.C. Electrical Characteristics (continued)
(TA = – 40 C to + 85 C, VDD = 4.0 V to 5.25 V)
°
°
Parameter
Output High
Symbol
Conditions
VOUT = VDD
Min
Typ
Max
Unit
(1)
–
–
3
µA
ILOH
Leakage Current
All I/O pins and output pins
except D+, D–
ILOL (1)
VOUT = 0 V
Output Low
–
–
– 3
µA
Leakage Current
All I/O pins and output pins
except D+, D–
RL1
VIN = 0 V
Pull-up Resistors
Supply Current (2)
25
50
100
kW
Ports 0, 1, 2, 4.2-3, Reset
RL2
V
IN
= 0 V; P4.0-1
2.4
5.5
IDD1
Normal operation mode
6 MHz CPU clock
–
12
mA
IDD2
IDD3
Idle mode; 6 MHz oscillator
Stop mode
2.2
5
mA
µA
180
300
NOTES:
1. Except X and X
.
IN
OUT
2. Supply current does not include current drawn through internal pull-up resistors or external output current loads.
3. When USB Mode Only in 4.2 V to 5.25 V, D+ and D– satisfy the USB spec 1.0.
12-4
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-3. Input/Output Capacitance
(TA = – 40 C to + 85 C, VDD = 0 V)
°
°
Parameter
Input
Capacitance
Symbol
Conditions
Min
Typ
Max
Unit
CIN
f = 1 MHz; Unmeasured pins
are connected to VSS
–
–
10
pF
COUT
CIO
Output
Capacitance
I/O Capacitance
Table 12-4. A.C. Electrical Characteristics
°
°
(TA = – 40 C to + 85 C, V
= 4.0 V to 5.25 V)
DD
Parameter
Symbol
Conditions
P0, P2 and P4
Min
Typ
Max
Unit
tINTH, tINTL
Interrupt Input
–
200
–
ns
High, Low Width
tRSL
RESET Input
Low Width
RESET
10
–
–
ms
t
t
INTH
INTL
0.8 V
DD
0.2 V
DD
Figure 12-1. Input timing for external interrupt (Ports 0, 2, and 4)
t
RSL
RESET
0.5VDD
Figure 12-2. Input Timing for RESET
12-5
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-5. Oscillator Characteristics
(TA = – 40 C + 85 C, VDD = 4.0 V to 5.25 V)
°
°
Oscillator
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Main crystal Main
Oscillation frequency
–
6.0
–
MHz
X
ceramic (fOSC
)
IN
C1
X
OUT
C2
External clock
Oscillation frequency
–
6.0
–
X
X
IN
OUT
Table 12-6. Oscillation Stabilization Time
(TA = – 40 C + 85 C, VDD = 4.0 V to 5.25 V)
°
°
Oscillator
Test Condition
Min
Typ
Max
Unit
fOSC = 6.0 MHz
Main Crystal
–
–
10
ms
(Oscillation stabilization occurs when VDD is equal to
the minimum oscillator voltage range.)
Main Ceramic
216/
fOSC
t
stop mode release time by a reset
Oscillator
Stabilization Wait
Time
–
–
–
–
WAIT
(note)
t
stop mode release time by an interrupt
WAIT
NOTE: The oscillator stabilization wait time, t
, is determined by the setting in the basic timer control register, BTCON.
WAIT
12-6
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-7. Data Retention Supply Voltage in Stop Mode
°
°
(TA = – 40 C to + 85 C)
Parameter
Symbol
VDDDR
Conditions
Stop mode
Min
Typ
Max
Unit
Data Retention
Supply Voltage
2.0
–
6
V
IDDDR
Stop mode; VDDDR = 2.0 V
Data Retention
Supply Current
–
–
300
µA
1/f
OSC
t
t
XH
XL
X
IN
VDD 0.5V
0.4V
Figure 12-3. Clock Timing Measurement Points at X
IN
12-7
ELECTRICAL DATA
KS86C6404/C6408/P6408
Internal Reset
Operation
Idle Mode
(Basic Timer
Active)
Stop Mode
Data Retention
Mode
VDD
Normal
Operating
Mode
VDDDR
Execution Of
Stop Instruction
RESET
0.5 VDD
0.5 VDD
t
WAIT
Figure 12-4. Stop Mode Release Timing When Initiated by a Reset
Idle Mode
(Basic Timer
Active)
Stop Mode
Data Retention Mode
VDD
Normal
Operating
Mode
VDDDR
Execution Of
Stop Instruction
External
Interrupt
0.8 VDD
0.2 VDD
t
WAIT
Figure 12-5. Stop Mode Release Timing When Initiated by an External Interrupt
12-8
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-8. Low Speed USB Electrical Characteristics
(TA = – 40°C to + 85°C, Voltage Regulator Output V33out = 2.8 V to 3.5 V, typ 3,3 V)
Parameter
Transition Time:
Rise Time
Symbol
Conditions
Min
Max
Unit
Tr
Tf
CL = 50 pF
CL = 350 pF
CL = 50 pF
75
–
–
ns
300
–
Fall Time
75
–
CL = 350 pF
(Tr/Tf) CL = 50 pF
CL = 50 pF
300
120
2.0
3.5
Rise/Fall Time Matching
Trfm
Vcrs
80
1.3
2.8
%
V
Output Signal Crossover Voltage
Voltage Regulator Output Voltage V33OUT
V
with V33OUT to GND 0.1 mF
capacitor
Test
Point
2.8V
90%
90%
Measurement
Points
S/W
CL
R2
10%
10%
D.U.T
R1
Tr
Tf
R1 = 15 K
R2 = 1.5 K
DM: S/W ON
DP: S/W OFF
W
W
CL = 50pF-350pF
Figure 12-6. USB Data Signal Rise and Fall Time
3.3 V
DP
MAX: 2.0 V
MIN: 1.3 V
0 V
Vcrs
DM
Figure 12-7. USB Output Signal Crossover Point Voltage
12-9
ELECTRICAL DATA
KS86C6404/C6408/P6408
NOTES
12-10
KS86C6404/C6408/P6408
MECHANICAL DATA
13 MECHANICAL DATA
OVERVIEW
The KS86C6404/C6408/P6408 is available in a 42-pin SDIP package (Samsung: 42-SDIP-600) and a 44-pin QFP
package (44-QFP-1010B). Package dimensions are shown in Figures 13-1 and 13-2.
#42
#22
0-15
°
40-SDIP-600
#1
#21
39.50 MAX
39.10 ± 0.2
0.50 ± 0.1
1.00 ± 0.1
1.778
(1.77)
Figure 13-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600 )
13-1
MECHANICAL DATA
KS86C6404/C6408/P6408
13.20 ± 0.3
10.00 ± 0.2
0 8°
-
+0.10
- 0.05
0.15
44-QFP-1010B
0.10 MAX
#44
0.05 MIN
2.05 ± 0.10
+0.10
- 0.05
#1
0.35
2.30 MAX
(1.00)
0.80
NOTE: Dimensions are in millimeters.
Figure 13-2. 44-Pin QFP Package Mechanical Data (44-QFP-1010B)
13-2
KS86C6404/C6408/P6408
KS86P6408 OTP
14 KS86P6408 OTP
OVERVIEW
The KS86P6408 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the
KS86C6404/C6408 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is
accessed by serial data format.
The KS86P6408 is fully compatible with the KS86C6404/C6408, both in function and in pin configuration.
Because of its simple programming requirements, the KS86P6408 is ideal for use as an evaluation chip for the
KS86C6404/C6408.
P3.1
P3.0
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P3.2
P3.3/CLO
D+
2
INT0 / P2.0
INT0 / P2.1
INT0 / P2.2
INT0 / P2.3
INT0 / P2.4
INT0 / P2.5
3
4
D-
5
3.3 V
NC
OUT
6
7
P0.0 / INT2
P0.1 / INT2
P0.2 / INT2
P0.3 / INT2
P0.4 / INT2
P0.5 / INT2
P0.6 / INT2
P0.7 / INT2
P1.0
8
/INT0 / P2.6
SDAT
9
/INT0 / P2.7
SCLK
10
11
12
13
14
15
16
17
18
19
20
21
KS86P6408
/VDD
VDD
VSS
/VSS
/XOUT
XOUT
42-SDIP
(Top View)
/XIN
XIN
/TEST
TEST
INT1 / P4.0
INT1 / P4.1
P1.1
P1.2
RESET
/ RESET
P1.3
INT1 / P4.2
INT1 / P4.3
P1/7
P1.4
P1.5
P1.6
Figure 14-1. KS86P6408 Pin Assignments (42-SDIP Package)
14-1
KS86P6408 OTP
KS86C6404/C6408/P6408
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
3.3 V
22
21
20
19
18
17
16
15
14
13
12
34
35
36
37
38
39
40
41
42
43
44
OUT
D-/PS2
D+/PS2
P3.3/CLO
P3.2
KS86P6408
P3.1
(Top View)
P3.0
P2.0/INT0
P2.1/INT0
P2.2/INT0
P2.3/INT0
P4.3/INT1
P4.2/INT1
RESET/ RESET
Figure 14-2. KS86P6408 Pin Assignments (44-QFP Package)
14-2
KS86C6404/C6408/P6408
KS86P6408 OTP
Table 14-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
Pin Name
P2.6
During Programming
I/O
Pin Name
Pin No.
Function
9 (3)
SDAT
I/O
Serial DATa Pin (Output when reading, Input
when writing) Input and Push-pull Output Port
can be assigned
10 (4)
15 (9)
P2.7
SCLK
TEST
I/O
I
Serial CLocK Pin (Input Only Pin)
TEST
Chip Initialization and EPROM Cell Writing
Power Supply Pin (Indicates OTP Mode
Entering) When writing 12.5 V is applied and
when reading.
18 (12)
RESET
RESET
I
0 V: OTP write and test mode
5 V: Operating mode
11(5)/12(6)
VDD / VSS
VDD / VSS
–
Logic Power Supply Pin.
NOTE: ( ) means 44 QFP package.
Table 14-2. Comparison of KS86P6408 and KS86C6404/C6408 Features
Characteristic KS86P6408 KS86C6404/C6408
8-Kbyte EPROM
4.0 V to 5.25 V
= 5 V, VPP (RESET) = 12.5 V
Program Memory
8-Kbyte mask ROM
4.0 V to 5.25 V
Operating Voltage (VDD
)
V
DD
OTP Programming Mode
Pin Configuration
42 SDIP/44 QFP
42 SDIP/44 QFP
EPROM Programmability
User Program 1 time
Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (RESET) pin of the KS86P6408, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 14-3 below.
Table 14-3. Operating Mode Selection Criteria
V
DD
REG/
MEM
R/W
MODE
VPP
(RESET)
ADDRESS
(A15-A0)
5 V
5 V
0
0
0
1
0000H
0000H
0000H
0E3FH
1
0
1
0
EPROM read
12.5 V
12.5 V
12.5 V
EPROM program
EPROM verify
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
14-3
KS86P6408 OTP
KS86C6404/C6408/P6408
START
Address= First Location
V
DD
=5V, V =12.5V
PP
x = 0
Program One 1ms Pulse
Increment X
YES
x = 10
NO
FAIL
FAIL
NO
Verify Byte
Verify 1 Byte
Last Address
Increment Address
V
= V = 5 V
PP
DD
FAIL
Compare All Byte
PASS
Device Failed
Device Passed
Figure 14-3. OTP Programming Algorithm
14-4
KS86C6404/C6408/P6408
KS86P6408 OTP
Table 14-4. D.C. Electrical Characteristics
_
_
(TA = – 40 C to + 85 C, VDD = 4.0 V to 5.25 V)
Parameter
Symbol
Conditions
Normal mode;
Min
Typ
Max
Unit
IDD1
IDD2
IDD3
Supply Current
(note)
–
5.5
12
mA
6 MHz CPU clock
Idle mode;
6 MHz CPU clock
2.2
5
Stop mode
180
300
µA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
14-5
KS86P6408 OTP
KS86C6404/C6408/P6408
NOTES
14-6
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