ENA0976_技术文档

Ordering number : ENA0976

Bi-CMOS IC

LV25200M

Single chip Tuner IC for Car Radio

Overview

LV25200M is a tuner IC for car radio, which incorporates the AM/FM Tuner, PLL, AM/FM Noise Canceller (NC), FM

Stereodecoder (MPX) , Multipath-noise Rejection Circuit (MRC) .

This IC enables development of the low-cost analog tuner for OEM.

Functions

• AM+FM-FE+IF+NC+MPX+MRC+PLL

Features

• World-wide compatible tuners

A single tuner module is enough to supply the world-wide compatible tuners.

FM is compatible with US EURO, Japan bands while AM is compatible with LW, MW, SW, Weather-Band.

With the image cancel mixer incorporated in FM MIX, the external RF AMP can be deleted.

Compatible with RDS. PLL fast locking.

• Self-contained type IF band variable filter incorporated

Detects any neighboring interfering station and varies the IF filter band, enabling superior selectivity characteristic.

• Auto alignment EEPROM necessary

FM RF, VCO, Null-voltage, Mute-on, Mute-ATT, SNC, HCC, Station detector, Gain AGC sensitivity,

CCB bus compatible

• Reduced parts quantity

Parts quantity reduced from our conventional products

• Other functions

AM noise canceller (genuine compatible)

• CCB is a registered trademark of SANYO Electric Co., Ltd.

• CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO

Semiconductor for this format.

Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to

"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,

communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be

intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace

instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety

equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case

of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee

thereof. If you should intend to use our products for applications outside the standard applications of our

customer who is considering such use and/or outside the scope of our intended standard applications, please

consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our

customer shall be solely responsible for the use.

Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate

the performance, characteristics, and functions of the described products in the independent state, and are not

guarantees of the performance, characteristics, and functions of the described products as mounted in the

customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent

device, the customer should always evaluate and test devices mounted in the customer

's products or

equipment.

D2607 TI IM 20071004-S00024 No.A0976-1/45

LV25200M

Specifications

Maximum Ratings at Ta = 25°C

Parameter

Symbol

_H max

Conditions

Ratings

Unit

V

Maximum supply voltage

V

PIN 5, 77

8.7

5.7

CC

V

_L max

max

PIN 21, 27, 50

PIN 17, 18, 19

PIN 20

V

CC

V

Maximum input current

Maximum output current

Allowable power dissipation

Operating temperature

Storage temperature

-0.3 to +5.0

-0.3 to +6.5

950

V

IN

V

max

V

O

Pd max

Topr

(Ta≤85°C)

mW

°C

-40 to +85

-40 to +150

Tstg

Recommended Operating Conditions at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

V

Recommended supply voltage

V

_H

_L

8.0

5.0

PIN 5, 66, 75, 76, 77

CC

V

PIN 21, 27, 50

PIN 5, 66, 75, 76, 77

PIN 21, 27, 50

PIN 17, 18, 19

PIN 19

CC

Operating supply voltage range

VCcop_H

VCcop_L

7.5 to 8.5

4.5 to 5.5

2.5 to 4.0

0 to 0.8

0 to 4.0

V

Input High level voltage

Input Low level voltage

Input amplitude voltage

Input pulse width

Setup time

IH

V

IL

V

Vp-p

μs

IN

tφW

0.45 or more

Tsetup

Thold

PIN 17, 18, 19

Hold time

Package Dimensions

unit : mm (typ)

Reset at Power ON

3255

Vcop_H

Vcop_L

17.2

14.0

60

41

61

40

V

4

DD

Vhmin

Voff

21

80

tPOR

20

1

0.25

0.15

0.65

(0.83)

SANYO : QFP80(14X14)

Recommended Operating Conditions at Ta=25°C, GND=0V

Parameter

Symbol

Vcop_H

Vcop_L

Conditions

Ratings

Unit

V

Operating supply voltage

PIN 5, 66, 75, 76, 77

7.5 to 8.5

PIN 21, 27, 50

4.5 to 5.5

3.7 to 4.3

4 to 2.2

V

Internal logic voltage

V

4

PIN 13

V

DD

Internal register hold voltage

Internal register reset voltage

Internal register reset power ON time

Vhmin

Voff

PIN 13, Design reference value

PIN 27, 50, Design reference value

V

DD

0 to 0.2

V

tPOR

30 to 3000

μs

No.A0976-2/45

LV25200M

AC Characteristics

Operating Characteristics at Ta=25°C, V =8.0V, V =5.0V

CC DD

with the designated measuring circuit outside standard.

Except that this measurement was made with the IC socket [Yamaichi Denki Kogyo Co., Ltd. IC51-0644-807].

Audio filter: IHF BPF used

[FM characteristics] FM FE MIX input (NO-Dummy)

CCB Command

Parameter

Symbol

Conditions

min

typ

max

Unit

1-1 Current drain -8V

1-2 Current drain -5V

Icco-8V

No input FM mode

19

37

25

50

62

74

mA

I5+I66+I75+I76+I77

No input FM mode

I21+I27+I50

Icco-5V

Vo-FM

Vo-52

CB

44.5

220

270

-1

51

277

340

0

58

1-3 Demodulation

output

98.1MHz, 60dBμV, 1kHz,

100%mod, pin 25

350 mVrms

425 mVrms

1-4 Pin 52 RDS

demodulation output

1-5 Channel balance

98.1MHz, 60dBμV, 1kHz,

100%mod, pin 52

98.1MHz, 60dBμV, 1kHz,

pins 25 and 26

1

dB

%

1-6 Total harmonic

distortion factor

1-7 Total harmonic

distortion

THD-

98.1MHz, 60dBμV, 1kHz,

0.2

0.3

67

Fmmono (1) 100%mod, pin 25

THD-

98.1MHz, 60dBμV, 1kHz,

2.5

%

Fmmono (2) 150%mod, pin 25

1-8 Signal to noise ratio S/N-FM-

(MONO) MONO

98.1MHz, 60dBμV, 1kHz,

100%mod,

60

54

dB

1-9 Signal to noise ratio S/N-FM-ST

(ST)

98.1MHz, 60dBμV, 1kHz,

100%mod, pin 25, pilot=10%

98.1MHz, 60dBμV, 1kHz,

100%mod, 30% in AM mode,

fm=1kHz, pin 25

58

1-10 AM suppression

ratio

AMR

61

1-11 Muting attenuation (1) Att-1

1-12 Muting attenuation (2) Att-2

1-13 Muting attenuation (3) Att-3

98.1MHz, 60dBμV, 1kHz, with

V33=0→2V, pin 25 attenuation

98.1MHz, 60dBμV, 1kHz, with

V33=0→2V, pin 25 attenuation

98.1MHz, 60dBμV, 1kHz, with

V33=0→1V, pin 25 attenuation

19

37

25

35

25

14

25

-30

-20

-11

27

-25

-16

-6

-20

-11.2

-1

dB

1-14 Separation

Separation

98.1MHz, 60dBμV, mod=30%,

38

pilot=10%, pin 25 output ratio

[IN3-5 D0-5] Separation control adj

Pilot demodulation at which

V39<0.5V is established

1-15 Stereo ON level

1-16 Stereo OFF level

ST-ON

19

37

25

1.9

1

4.1

3

6.3

%

ST-OFF

Pilot demodulation at which

V39>3.5V is established

1-17 Main distortion

factor

THD-Main L 98.1MHz, 60dBμV, L+R=90%,

0.3

-6

1.2

-2

%

pilot=10%, pin 25

1-18 SNC output

attenuation

AttSNC

98.1MHz, 60dBμV, L-R=90%,

pilot=10%, V28=3V→0.6V,

pin 25; standard for single block

98.1MHz, 60dBμV, 10kHz,

L+R=90%, pilot=10%,

-10

-6

dB

1-19 HCC output

attenuation (1)

FM HCC

19

37

25

-3

-10.5

-1

-0.5

-6.5

1

dB

V29=3V→0.6V,

pin 25; standard for single block

98.1MHz, 60dBμV, 10kHz,

L+R=90%, pilot=10%,

1-20 HCC output

attenuation (2)

FM HCC

Vi-lim

-14.5

-6

V29=3V→0.1V,

pin 25; standard for single block

98.1MHz, 60dBμV, 30%mod,

MIX input at which the input

reference output is down

by -3dB, V42=0V, V29=0V,

with MUTE=OFF

1-21 Input limiting

voltage

dBμV

1-22 Muting sensitivity

Vi-mute

MIX input level at V42=1V,

non-mod

19

37

25

0.1

5

9.9 dBμV

Continued on next page.

No.A0976-3/45

LV25200M

Continued from preceding page.

CCB Command

Parameter

Symbol

Conditions

min

typ

max

Unit

1-23 SD sensitivity

IF count sensitivity

SD-senFM

MIX input level at which SD pin is 20

ON, shifter-adj, non-mod

37

25

19

25

A1

25

20

25

30 dBμV

dBμV

IF-count-

sens.FM

IF count sensitivity at MIX input,

non-mod

20

19

16

1-24 S-meter DC output VSMFM-1

No input,

0.5

V

pin 38 DC output non-mod

VSMFM-2

VSMFM-3

VSMFM-4

VSMFM-5

10dBμV,

0.75

1.85

3.3

pin 38 DC output non-mod

30dBμV, pin 38 DC output non-

1.8

1.9

mod [IN3-2 D0-4] S-meter shift-adj

50dBμV,

pin 38 DC output non-mod

80dBμV,

4.8

pin 38 DC output non-mod

1-24 S-meter AC pin DC VSMFM-A1 No input,

output pin 40 DC output non-mod

VSMFM-A2 10dBμV,

pin 40 DC output non-mod

VSMFM-A3 30dBμV,

pin 40 DC output non-mod

VSMFM-A4 50dBμV,

pin 40 DC output non-mod

VSMFM-A5 80dBμV,

0.45

0.85

1.78

3.05

1.51

2.1

4.8

1.4

pin 40 DC output non-mod

1-25 S-meter inclination S-curve1

standard - 1

Holds [IN3-2 D0-4] data,

0.85

1

1.1

which was obtained by deducting

(VSMFM-2) from VSM (VSMFM-3)

Holds [IN3-2 D0-4] data,

1-26 S-meter inclination S-curve2

standard - 2

19

37

25

1.45

1.9

V

which was obtained by deducting

(VSMFM-3) from VSM (VSMFM-4)

60dBμV,

1-27 Mute drive output

VMUTE-60

19

37

25

0.15

-9

0.3

-4

V

pin 42 output DC output non-mod

1-28 Noise convergence - 1 FM NOISE-20 60dBμV.98.1MHz, 30%mod,

input reference, output level of

-14

dB

the input -20dBμV,

MUTE=OFF(42pin=GND)

1-29 N-AGC ON input

1-30 W-AGC ON input

VNAGC

VWAGC

98.1MHz, non-mod, MIX input

level at which pin 1 becomes

0.6V or more

19

37

25

33

35

25

66

82

75

90

84 dBμV

98 dBμV

98.1MHz, non-mod,

pin 38 =1.0V applied (Keyed on),

MIX input level at which pin 1

becomes 0.6V or more

Removal amount of

1-31 Image obstruction

ratio-1

21

28

20

37

25

23

25

37

25

15

70

dB

108.1M +21.4MHz

1-32 Image obstruction

ratio-2

Removal amount of

90M -21.4MHz

SD bandwidth - 1

BW-mute1

BW-mute2

A.V.

98.1MHz, non-mod, 50dBμV,

Bandwidth at which SD pin is

turned ON

100

200

130

130 kHz

SD bandwidth - 2

98.1MHz, non-mod, 50dBμV,

Bandwidth at which SD pin is

turned ON

20

28

37

23

25

38

25

130

85

270

dB

1-33 Conversion gain

98.1MHz, 60dBμV, non-mod,

FECF output

200 mVrms

Continued on next page.

No.A0976-4/45

LV25200M

[FM IF Filter characteristics] FM IF input

CCB Command

Parameter

Symbol

Conditions

min

typ

max

Unit

2-1 IF variable filter

gain-narrow band

FIL-G-N

70dBμV, pin 54 AC (450kHz)

output non-mod,

19

37

21

23

25

79

84

89

After CF adjustment, fit in

through BW/G adjustment.

Narrow-Fix MODE

2-2 IF variable filter

2-3 IF variable filter

FIL-BW-N

FIL-BW-W

Pin 54 -AC output monitor.

Confirm the 2dB or more level down

at the ±25kHz point with reference to

the center frequency of 450kHz.

-3dB bandwidth. Narrow-Fix MODE

Pin 54-AC output monitor.

Confirm no level down exceeding

3 dB at the ±80kHz point with

reference to the center frequency

of 450kHz.

2

dB

3

-3dB bandwidth.

Wide-Fix MODE

[NC block] NC input (48pin), S-meter AC input (40pin)

CCB Command

Parameter

Symbol

Conditions

min

typ

max

Unit

3-1 FM NC gate time

FM τGATE

NC input, pulse cycle=1kHz,

38pin=2V applied,

19

37

25

36

40

44

μs

pulse width=1μs,

at 100mVp-o pulse input (after

MVCO adjustment)

3-2 FM NC noise

sensitivity

SN-DETOUT

NC input (pin 48),

17

30

46

43 mVp-o

38pin=2V applied,

measure the pulse input level at

which the noise canceller starts

operation, pulse cycle=1kHz,

pulse width=1μs

3-3 FM NC noise

sensitivity

SN-Vsm

S-meter (AC) input (pin 40),

38pin=0V applied,

19

37

25

mVp-o

measure the pulse input level at

which the noise canceller starts

operation, pulse cycle=1kHz,

pulse width=1μs

3-4 AM NC gate time

AM τGATE(1)

S-meter (AC) input (pin 40),

pulse cycle=1kHz,

36

37

26

345

450

24

555

μs

pulse width=1μs,

measurement at pin 33.

38pin=1.5

3-5 AM NC noise

sensitivity

SN

S-meter (AC) input (pin 40),

measure the pulse input level at

which the noise canceller starts

operation, pulse cycle=1kHz,

pulse width=1μs

mVp-o

[Multipath-noise rejection circuit] MRC input (pin 41)

CCB Command

Parameter

Symbol

Conditions

min

typ

max

3.16

Unit

V

4-1 MRC output

VMRC

Pin 39 voltage when 3.5 V is

applied to V38

19

37

25

2.76

50

2.96

71

4-2 MRC operation level

MRC-ON

SG (AG5) out level when pin 38

=5V and pin 39=2.6V, f=70kHz

100 mVrms

No.A0976-5/45

LV25200M

[AM characteristics] AM AMANT input

CCB Command

Parameter

Symbol

Conditions

min

typ

max

Unit

dB

5-1 Practical sensitivity S/N-30

1MHz, 30dBμV, fm=1kHz,

30%mod, pin 25

36

37

26

20

5-2 Detection output

5-3 AGC-F.O.M

Vo-AM

1MHz, 74dBμV, fm=1kHz,

30%mod, pin 25

84

50

105

131 mVrms

VAGC-FOM 1MHz, 74dBμV,

54.5

59

dB

output reference,

input width at which the output

decreases by 10dB,

pin 25

5-4 Signal-to-noise ratio

S/N-AM

1MHz, 74dBμV, fm=1kHz,

30%mod

36

37

26

51

60

0.3

0.5

9

dB

%

5-5 Total harmonic

distortion ratio - 1

5-6 Total harmonic

distortion ratio - 2

5-7 AM HCC output

attenuation

THD-AM-1

THD-AM-2

AM HCC

1MHz, 74dBμV, fm=1kHz,

80%mod

1

1.5

13

1MHz, 120dBμV, fm=1kHz,

80%mod

%

1MHz, 74dBμV, fm=4kHz,

30%mod, V29=3V→0.6V, 25pin

No input, 38pin DC output

5

dB

5-8 S-meter DC output

VSMAMDC-1

VSMAMDC-2

36

37

26

0

0.1

1.5

0.5

1.9

V

1MHz, 30dBμV, non-mod,

38pin DC output

1.2

VSMAMDC-3

1MHz, 130dBμV, non-mod,

38pin DC output

36

37

26

2.85

3.6

4.9

0.5

V

5-9 S-meter AC output

VSMAMAC-1

VSMAMAC-2

No input, 40pin DC output

36

37

26

0

V

1MHz, 74dBμV, non-mod,

0.75

40pin DC output

5-10 Wide band AGC

sensitivity

W-AGCsen1 1.4MHz, input at V48=0.7V

36

37

26

82

25

92

30

102 dBμV

35 dBμV

5-11 SD sensitivity

SD-senAM

1MHz, ANT input level at which

the SD pin is turned ON

Function

1. AM / FM front-end block

FM Image rejection Mixer

AM Double balance Mixer

Pin diode drive AGC output

Keyed AGC adjustment

Differential IF amplifier

Wide AGC sensitivity setting

Narrow AGC sensitivity setting

Local oscillator

4 bit DAC

160MHz to 260MHz

1/1 1/2 1/3

FM Local OSC divider

AM Local OSC divider

1/10, 1/8, 1/6, 1/4

2. FM IF block

IF Limiter Amplifier 6 stages

S-meter shifter

5 bit DAC

S-meter output (DC/AC)

Multipath detector (dedicated FM S-meter)

Quadrature detector

Vnull adj-5bit, QDP adj-4bit

450kHz

AF preamplifier (Audio mute)

AFC output

Variable bandwidth control

CF adj-5bit DAC

BW/Gain adj-5bit DAC

Gain adj-3bit DAC

(for setting filter)

Continued on next page.

No.A0976-6/45

LV25200M

Continued from preceding page.

Soft mute setting

5 bit DAC

6 bit DAC

10.7MHz

5 bit DAC

Mute attenuation setting

-0.5dB to -25dB

IF counter buffer (FM circuits)

SD (IF counter buffer activation level) setting

SD output (active-high) (also used by AM circuits)

IF output Driver for DSP (AF out, non-muting)

SD: Station Detector

IF Gain

4 bit DAC

3. AM Block (back end of AM tuner)

Double balance 2^ndmixer

IF amplifier

AM detector

RF Narrow AGC

4 bit DAC

Wide AGC

Pin diode drive AGC output

S-meter output

2 bit DAC

5 bit DAC

IF counter buffer

450kHz

SD (IF counter buffer activation level) setting

SD output (active-high)

Detector output frequency adjusting pin (Low-cut, De-emphasis)

4. FM NC

High-Pass-Filter (1st-order)

Delay circuit of Low-Pass-Filter (4th order)

Noise-AGC (Sensitivity:2 Bit-control)

Pilot signal compensation

2 bit DAC

Noise sensitivity setting

Modulation index

5. AM NC

AM Noise canceller Gate-Time

6 bit DAC

5 bit DAC

AM Noise canceller OFF Level

6. MPX

VCO (Free-Run Frequency:6 Bit-control)

6 bit DAC

304kHz

Level following pilot canceller

Automatic stereo/mono switching

VCO oscillator stop (AM mode)

Forced monaural

2 bit (3 step adj.)

Stereo indicator (active-low)

Anti-birdie filter (f=114kHz, 190kHz)

SNC (stereo noise control)

HCC (high-cut control)

5 bit DAC

6 bit

Separation setting

64 steps

4 step

7. MRC (Multipath-noise Rejection Circuit)

Noise Amplifier Gain (sensitivity setting)

2 bit

DC Level-Shifter

SNC driving

Time constant control circuit

4 step

No.A0976-7/45

LV25200M

Pin Function

Pin No.

Function name

Block

Pin-No.

Function name

Block

MRC

IF

1

2

FM-ANT-D

FM-RF-AGC

GND (FE)

FE

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

MRC-AC-IN

Mute-Drive

AFC

3

---

IF

4

AM-MIX-IN2

AM

QD-Cap.

Vref 2.7V

IF-Det-OUT

NC-IN

IF

5

OSC-V

CC

---

IF

6

AM/FM-OSC (B)

AM/FM-OSC (C)

PLL-LPF

FE

Common

IF

7

FE

8

PLL

Common

MPX

PLL

MPX

---

NC

9

FM FET

Mod.-Index

NC

10

11

12

13

14

15

16

17

18

19

20

21

22

23

AM FET

V

5V (Analog)

---

CC

CPAM

Interfering signal detected

RDS-OUT

FIL

CPFM

IF

PLL V

DD

PLL-TEST

PLL

FIL

ST/SD, VCO monitor and PLL-TEST

IF Filter OUT

Sep.-ADJ.

AM-IFAGC (load for Vt setting)

Pilot-Det/AM-LC

IF-AGC

AM

MPX/AM

AM

IF

GND (Analog)

CE

DI

PLL

---

AM-W-AGC

CL

DO

AM-RF-AGC (BYPASS)

AM-IF-IN

V

(X'tal)

AM-IN-IN2

CC

X'tal-OUT

X'tal-IN

X'tal

FM-IF-IN (BYPASS)

FM-IF-IN

IF

AM-2nd-MIX-IN

AM

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

GND (X'tal)

MPX-L-OUT

MPX-R-OUT

---

MPX

---

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

AM-RF-AGC

1st-IF-OUT

AM

FE

AM-MIX2-OUT

Vref 4.9V

AM

Common

FM

AM

FM

FE

V

5V (Digital)

CC

SNC

MPX

---

RF-DAC1

HCC

AM-2nd-MIX-IN (BYPASS)

RF-DAC2

MPX-PCO1

MPX-PCO2

GND (Digital)

NC-Gate- monitor

MPX-PLL-IN

HCC capacity

Noise-Sens.

Noise-AGC

Vsm (Main)

MRC-OUT

Vsm2 (Sub)

IF-IN(BIAS)

FM-1st-IF-IN

AM-ANT-D and PLL-TEST

N-AGC-IN

FE

NC

AM

FE

MPX

NC

MIX-OUT

FE

MIX-OUT

FE

NC

V

(8V)

---

CC

IF

AM-MIX-IN

FM-MIX-IN

AM

FE

MRC

IF

FE

No.A0976-8/45

LV25200M

Block Diagram

No.A0976-9/45

LV25200M

Pin Discription

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

1

Function

Antenna

Discription

Pin 2: Antenna damping current flows when the RF

Damping

Drive pin

AGC voltage becomes V -Vbe.

CC

2

RF AGC

RF AGC voltage.

Voltage=Hi (around 8V) with AGC OFF.

The voltage lowers when a level is inserted into the

AGC circuit. AGC is applied at the voltage of V

Vbe.

-

CC

3

5

FE.GND

OSC V

FE GND(F.E.)

8V V (VCO.)

OSC dedicated V

CC

6

7

FM/AM OSC IN

OSC pin

FM/AM OSC OUT

Continued on next page.

No.A0976-10/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

8

Function

Discription

Tuning voltage output

LPF output

FM:

PLL filter formed with pins 9 to 12

(Pins 10 and 11 to be left OPEN)

9

FET for FM

AM:

PLL filter formed with pins 10 and 11. In this case,

the low pass filter is formed with the internal

impedance (100kΩ) and external capacity.

10

11

12

FET for AM

Charge pump for FM

Charge pump for AM

Simultaneous use of AM and FM filters (pins 9 to

12) is possible through mode changeover. In this

case, internal impedance (100kΩ) is short-circuited.

13

V

for PLL

PLL regulator output (4V)

DD

14

AM/FM SD pin

STEREO indicator

&

STEREO indicator at reception:

Low: STEREO

High: MONO

VCO Monitor

At SEEK:

AM/FM SD

ON=High

OFF=Low

Pin 14 output is output from DO (for SD information

output).

VCO monitor (at IN3-5 D6=H)

Saw-tooth wave of MPX-VCO frequency is output,

which is monitored for VCO adjustment

(Adjust with IN3-5 D0-5.)

15

Separation adjustment

The input level of sub-decoder is varied through

BIT control.

(The output level of MONO and MAIN remains

unchanged.)

Continued on next page.

No.A0976-11/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

16

Function

Discription

N.C, MPX, MRC

And PLL-GND

CE

17

18

19

20

Pin to set the high level during serial data input

(D1) to LV25200M or serial data output (DO).

DI

Input pin for serial data for transfer from the

controller to LV25200M

CL

Clock for synchronization with the data during

serial data input (DI) to LV25200M or serial data

output (DO)

DO

Output pin of serial data to be transferred from

LV25200M to the controller

21

22

V

5V

X’tal-OSC dedicated V

CC

X’tal-OSC-OUT

Connect X’tal oscillator for 20.5MHz between pins

22 and 23.

23

X’tal-OSC-IN

Connect capacitors, each 12pF, between pins 22

and 23 and GND.

24

GND

X’tal-OSC dedicated GND

Continued on next page.

No.A0976-12/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

Function

Discription

25

26

MPX output (LEFT)

MPX output (RIGHT)

MPX output

Output impedance changed over with the

de-Emphasis changeover Bit (IN3-4 D20)

Low=3.3kΩ

High=5kΩ

(The figure in the right shows a case of 5kΩ.)

(50/75μs changeover with the external capacity of

0.015μF)

27

28

V

2 (5V)

V

for PLL and Digital system V

CC

SNC control input pin

With the pin 28 input voltage, the attenuation of

(L-R) Decode is controlled.

↓

Decrease Separation.

↓

The noise felt in the Stereo mode is reduced.

(Threshold can be controlled with 5Bit.)

29

HCC control input pin

With the pin 29 input voltage, attenuation of the

high pass component is controlled.

↓

At weak input, high pass is cut to reduce the noise

feeling.

Same control for FM/AM HCC

(f characteristics changed over automatically

between AM and FM modes.)

(Threshold can be controlled with 5Bit.)

30

31

Phase-Comparator for

MPX

32

33

GND

NC-Gate

Normal: High (V potential)

DD

Trigger-OUT

Gate: Low (0V)

Note)

Monitor output is not made unless the Bit setting of

Pilot-Cancel is set to 11 (PICAN=OFF).

Continued on next page.

No.A0976-13/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

34

Function

Discription

MPX-PLL input

LPF formed with internal resistance 30kΩ and

pin 34 eternal capacity

↓

HPF formed by subtracting the above LPS passage

signal from the Composite signal.

↓

Supply to MPX-PLL circuit

35

HCC capacitor pin

With pin 35 external capacity,

High-Cut frequency characteristics are set.

The value of internal resistance R35 is changed

over in AM/FM mode:

FM mode: R35=30kΩ

AM mode: R35=100kΩ

36

37

Noise detection

sensitivity

With the noise sensitivity setting pin of pin 36, set

the medium electric field (about 50dBμ). Then, with

the AGC-Adj pin of pin 37, carry out setting in the

weak field (20 to 30dBμ).

AGC adj pin

38

AM/FM S-meter (DC)

Current drive type S-meter output

Pin 38:

Eliminate the AC component by external capacity

40

AM/FM S-meter (AC)

Pin 40:

Leaves the AC component

(Pin for NC noise extraction and for multipath noise

extraction)

Continued on next page.

No.A0976-14/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

39

Function

MRC output

(for SNC Control)

Discription

Time constant for Multipath-Noise Detector is

determined with the following:

100Ω and C2 during discharge

Iconst and C2 during charge

Iconst can be changed over with 2Bit

(MRC-Time-Constant)

41

MRC AC input pin

From AC-S-meter (pin 40), enter the AC

component.

Amp-Gain, and frequency characteristics are

determined with

C41, (R41+1kΩ [internal resistance]) and 30kΩ

(internal resistance).

Amp-Gain can be controlled with 2Bit.

42

Mute Drive

1 The MUTE time constant is determined as

follows by CR:

• Attack time

TA=10kΩ (R1) × C42

• Release time

TR=50kΩ (R2) × C42

2 Noise convergence adjustment

3 MUTE OFF function

MUTE is turned OFF when pin 42 is short-

circuited with GND.

43

AFC

Null voltage

As compared with pin 46 2.7V

Continued on next page.

No.A0976-15/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

Function

Discription

44

45

FM DET capacity

FM quadrature detection capacity

46

Vreg (2.7V)

2.7V regulator

47

FM/AM DET OUT

AM/FM detection output

Output impedance

Low impedance in the FM mode

10kΩ in the AM mode

48

Noise canceller input

Noise Canceller Input

Input impedance

50kΩ

Continued on next page.

No.A0976-16/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

49

Function

MOD INDEX

Discription

Set the detection output level as DC output.

C49 is the DC smoothing capacitor.

(Used for control of the IF band variable filter)

50

51

V

(5V)

CC

Analog system

Undesire Det

Set the over-100kHz detection output noise level

as DC output.

C51 is the DC smoothing capacitor.

(Used for control of the IF band variable filter)

52

RDS OUT

FM detection output that is not passed through

Mute AMP.

* This output is not affected by the time constant

due to muting.

53

PLL TEST PIN

Test pin

Continued on next page.

No.A0976-17/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

54

Function

Discription

PLL TEST PIN

(IF band variable filter

output)

IN3-1 Monitor

• IF_FIL

IF band variable filter output monitor (AC output)

55

AM IFAGCBYPASS

IF AGC voltage DC smoothing capacitor pin

57

AM IF AGC

TR1; Time constant changeover at Seek

switch diode; 2.2μF

Discharging diode

1 At reception

Time constant depends on the external LPF

composition of pins 55 to 57.

2 Seek

Time constant is 57pin (C57) × 10Ω

56

AM LC

AM LC;

FM Pilot Det

Frequency characteristics of unnecessary voice

band of 100Hz or less is changed to produce the

clear sound in the AM mode.

AM LC f characteristic; Fc=1/(2π *2.5K*C56)

Pilot Det;

Insertion of 1MΩ between pin 56 and GND causes

the forced MONO mode.

For C56, 0.47μF or more is recommended.

58

AM W-AGC

AMP for W-AGC pickup incorporated

Continued on next page.

No.A0976-18/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

59

Function

AM RFAGC

Discription

RF AGC rectifier capacitor

BYPASS

Determination of the distortion ratio during

low-frequency modulation

Increase C59 and C64;

Distortion → improved

Response → slow

Decrease C59 and C64;

Distortion → worse

Response → quick

64

RF AGC

RF AGC rectifier capacitor

Determination of distortion ratio during

low-frequency modulation

Increase C59 and C64;

Distortion → improved

Response → slow

Decrease C59 and C64;

Distortion → worse

Response → quick

60

61

AM IF AMP IN

AM 450kHz AMP input

Input impedance=2kΩ

62

63

FM 2^ndMIX input

FM AMP input

FM 2^ndMIX

10.7MHz → 450kHz

FM AMP (10.7MHz)

AMP for S-meter voltage

65

AM/FM 1^stIF AMP

OUTPUT

Output impedance=330Ω

Continued on next page.

No.A0976-19/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

66

Function

AM 2^ndMIX OUT

Discription

MIX coil connected to pin 66 MIX output must be

connected to (V ).

CC

67

Vref 4.9V

4.9V regulator

63

69

AM 2^ndMIX input

/AM AGC pick up

AM MIX input

AMP for AM N-AGC pickup

Input impedance 10kΩ

68

RF DAC1

8bit DAC

70

RF DAC2

8bit DAC

71

72

FM/AM 1^stIF

AMP IN

10.7M AMP for FM/AM

Input impedance=330Ω

Continued on next page.

No.A0976-20/45

LV25200M

Continued from preceding page.

Unit (Resistance: Ω, Capacitance: F)

Internal Equivalent Circuit

73

Function

Discription

AM antenna damping

output

For pin diode drive

I73=6mA

ANT damping current

74

FM N-AGC IN

AMP for N-AGC pickup incorporated

75

76

FM/AM 1^stMIX OUT

FM/AM MIX OUT (common)

77

78

V

(8V)

CC

FM FE, AM

AM 1^stMIX IN

AM MIX input

Input impedance=10kΩ

79

80

FM MIX IN

FM MIX input

FM W-AGC pick up

FM W-AGC pickup

Input impedance=10kΩ

No.A0976-21/45

LV25200M

FM/AM level Diagram

No.A0976-22/45

LV25200M

Serial Bus Data Timing

CE: Chip enable

DI: Input data

CL: Clock

DO: Output data

<<CL stopped at “L” level >>

V

IH

CE

V

IL

t

CL

CH

V

IH

V

IL

V

IH

CL

DI

V

IL

V

t

EH

t

ES

IH

EL

V

IL

V

IL

t

DH

t

HD

DC

SU

DO

t

LC

Internal data

latch

New

Old

<<CL stopped at “H” level >>

V

CE

IH

V

IL

t

CH

CL

V

IH

IL

IH

CL

DI

V

IL

V

IH

t

ES

IH

t

EL

EH

VIL

V

IL

t

HD

t

DH

SU

DC

DO

t

LC

Internal data

latch

New

Old

Parameter

Symbol

Conditions

min

typ

max

unit

μs

Data setup time

Data hold time

Clock L level time

Clock H level time

CE wait time

t

DI, CL

CL

0.45

SU

HD

CL

CH

EL

CL

CE, CL

CE setup time

CE hold time

ES

EH

LC

DC

DH

Data latch change time

Data output time

0.45

0.2

DO, CL

DO, CE

Varies depending on the pull-

up resistance

μs

No.A0976-23/45

LV25200M

Serial Data I/O Method

This is the Sanyo Audio IC serial bus format. Data I/O is made with CCB (Computer Control Bus).

LV25200M is the 8-bit address type CCB.

Address

B3 A0

I/O

Description

mode

B0

0

B1

0

B2

0

A1

1

A2

0

A3

0

• Control data input (serial data input) mode. PLL setting

• 32-bit data input

[1]

[2]

[3]

[4]

IN1

IN2

1

0

• Control data input (serial data input) mode. PLL setting

• 32-bit data input

1

0

1

0

1

0

1

0

1

0

• Control data input (serial data input) mode, set by the tuner

• 32-bit data input with sub-address

IN3

• Output data (serial data output) mode

OUT

• Output of data corresponding to the clock amount. Max 48 bits

I/O mode determination

CE

CL

DI

B0

B1

B2

B3

A0

A1

A2

A3

First Data IN1/2

First Data OUT

DO

i) Serial data input (IN1/IN2/IN3) t , t , t , t , t , > 0.45μs t

SU HD ES EL EH LC

< 0.45μs

t

EH

ES

EL

CE

CL

t

SU

HD

B1

DI

A1

B0

B2

B3

A0

A2

A3

P0

P1

P2

P3

CTS GT0 GT1

*

t

LC

Internal data

ii) Serial data output (OUT) t , t , t , t , > 0.45μs t , t

SU HD ES EL DC DH

< 0.2μs (*1)

t

EH

ES

EL

CE

CL

DI

t

SU

HD

B1

B0

B2

B3

A0

A1

A2

A3

t

DC

t

DH

DO

(*2)

I5

I4

AD13 AD12 AD11 AD10

ꢀ

(*2)

(*1) As the DO pin is the Nch open drain pin, so that the data change time varies depending on the pull-up resistance

and substrate capacity.

(*2) Normally, keep the DO pin in the OPEN state.

No.A0976-24/45

LV25200M

CTE

bit specification

IN1 setting

0

IF count reset

IFcount start

OSC dividing ratio control for AM

1

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

OSD D1 OSC D2

Dividing ratio

0

1

0

1

0

1

10-division

8-division

6-division

4-division

DVS

0

1

Program-CTR stop

Program-CTR normal operation

0

1

0

1

0

Address Code

Initial data

at power ON

L

H

L

H

L

(1)

(2)

(3)

(4)

(5) (6)

(7)

(8)

(9)

Setting Program-CTR divisions (272 to 65535 divisions)

0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0

272-division

:

500-division

:

1000-division

:

2000-division

:

21845-division

Reference frequency setting

:

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

Do not use

100kHz

50kHz

0 0 1 0 1 1 1 1 1 0 0 0 0 0 0 0

:

0 0 0 1 0 1 1 1 1 1 0 0 0 0 0 0

25kHz

:

12.5kHz

6.25kHz

3.125kHz

10kHz

Do not use

5kHz

1kHz

Do not use

0 0 0 0 1 0 1 1 1 1 1 0 0 0 0 0

:

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

:

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

:

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

43690-division

:

65535-division

AM/FM

0

1

FM

AM

PLL filter changeover

MODE1 MODE2 AM/FM SEEK1 SEEK2 AM filter FM filter

Tuner mode changeover

SEEK1 SEEK2

IFBC output

0

*

OFF

ON

0

1

0

1

0

1

Do not use

STOP

RDS

SEEK

0

1

0

1

0

*

ON

OFF

ON

1

0

1

ON

OSC ratio control for AM/FM/WB

1

0

1

0

1

0

1

*

0

*

ON

OFF

ON

WEATHER DIV_SW3

Dividing ratio

0

1

0

1

0

1

2-division

3-division

1-division

1

0

1

*

1

0

*

OFF

ON

* Select “1” for WB: Weather Band

ON

* Don’t care

No.A0976-25/45

LV25200M

Dead zone control

Dead zone

DZ0

DZ1

IN2

B

0

AM-SD-SPEED

DZA

DZB

DZC

DZD

B

1

B

2

B

3

A

0

A

1

A

2

A

3

0

1

0

1

0

1

0

1

Normal

fast

FM AGC ON

AM AGC ON

Charge pump control

0

1

Normal

ON

0

1

Normal

ON

0

1

Normal

Low-level

1

0

1

0

1

0

Address Code

Initial data

at power ON

L

H

L

H

L

(10)

(11)

(12)

(13)

(14) (15)

(16)

(17)

(18) (19) (20)

(21) (22)

(23)

LSI internal signal

I/O port

LSI test mode

Normally,

TEST0=0

TEST1=0

TEST2=0

Control data

0: Input 1: Output

Normally, 0

IF count input sensitivity

X’tal OSC ADJ

0 0 0 High(+390Hz)

0

1

Normal

Worse

PDC

1 0 0

0 1 0

↓

* 0

0 1

1 1

High impedance

Charge pump operation (unlocked)

Charge pump operation (normal)

1 1 0 20.5MHz (center value)

0 0 1

1 0 1

0 1 1

↓

CTS

0

1

IF count stop

IF count normal operation

1 1 1 Low (-350Hz)

DO pin control data

Unlock detection changeover

UL0 UL1 E detection width Detection pin output

ULD

DT1

DT0

DO pin

φ

0

1

0

1

0

1

Low when unlocked

end-AD

end-UC

(See IN below)

0

1

0

1

0

1

Stop

0

0.5μs

1μs

Open

φE output directly

E extended by 1 to 2ms

φ

1

0

1

0

1

0

1

Open

end-AD

end-UC

IF count measuring time setting

Frequency measurement

(See IN below)

Frequency

measurement

mode

GT1 GT0

Wait time

Measurement

DO pin control data 2

time

CTP=0

CTP=1

IN

IL0

IL1

0

1

0

1

0

1

Open

0

1

0

1

0

1

4

3 to 4ms 1 to 2ms

1 cycle

2 cycles

SD pin state (PIN13)

Pin I2 state (not used)

Do not use

8

32

64

3 to 4

7 to 8

1 to 2

No.A0976-26/45

LV25200M

IN3-1 tuner setting 2

Address 69h, Subaddress[ 0 0 ]

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

1

0

1

0

1

0

Address Code

Sub Address Code

Initial data

at power ON

L

(24)

(25)

(26)

(27)

(28)

(29) (30)

(65)

Filter-Fix_SW

D26 D27

Filter-Mode

Variable

0

1

0

1

0

1

Internal monitor changeover

MSLOP

0

1

IF-Filter

No use

0

1

Mute_D (steep inclination)

Mute_D (gentle inclination)

Narrow-Fix

Wide-Fix

Dont Care

RF- DAC

ANT- DAC

0 0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0 0

1 1 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0

1 0 1 0 0 0 0 0 0

0 1 1 0 0 0 0 0 0

1 1 1 0 0 0 0 0 0

0 0 0 1 0 0 0 0 0

•

0.3V

↓

0 0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0 0

1 1 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0

1 0 1 0 0 0 0 0 0

0 1 1 0 0 0 0 0 0

1 1 1 0 0 0 0 0 0

0 0 0 1 0 0 0 0 0

•

0.3V

↓

TEST for DAC

0: Normal

1: Test-Mode

Test-PAD--1

D2 D1 D0

OUT

0

1

0

1

0

1

0

1

0

1

0

1

0

1

VSM_SHIFTER

FM-Mute-ON-Adj

NC_GT(DACOUT)

SNC_DAC / ARAG(H)

HCC_DAC

•

0 1 0 1 1 1 1 1 1

1 1 0 1 1 1 1 1 1

0 0 1 1 1 1 1 1 1

1 0 1 1 1 1 1 1 1

0 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1

0 1 0 1 1 1 1 1 1

1 1 0 1 1 1 1 1 1

0 0 1 1 1 1 1 1 1

1 0 1 1 1 1 1 1 1

0 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1

SD_ADJ

Mute_ATT(DACOUT2)

Mute-ANG

7.1V

Test-PAD--2

D4 D3 OUT

0

1

0

1

0

1

W_AGC

N_AGC

A_IFGAIN

QDP_ADJ

Band variable filter

Narrow/wide Min (Max) value control

Wide LMT Cont

D23 D24 D25

Narrow LMT Cont

D20 D21 D22

Test-PAD--3

D7 D6 D5

OUT

0 0 0

1 0 0

0 1 0

•

0

1

0

1

0

1

0

1

0

F_IFGAIN

NULL_VOL

Min (40k)

Max (220k)

1 0 0

0 1 0

•

AFC_BW(TSOUT=-2VBE)

AM_RFAGC(S)

•

1 0 1

0 1 1

1 1 1

1 0 1

0 1 1

1 1 1

KEYD_AGC

Min (150k)

Max (80k)

No.A0976-27/45

LV25200M

IN3-2 tuner setting2

Address 69h, Subaddress[ 0 0 1 ]

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

1

0

1

0

1

0

1

Address Code

Sub Address Code

Initial data

at power ON

L

(31)

(32)

(33)

(34)

(35)

(36)

(37)

(65)

Tuner OFF mode

0

1

Normal

Tuner-OFF

FM Mute-ON-Adj.

/AM NC stop

Weak input Mute changeover

(Mute-ANG)

0 0 0 0 0

1 0 0 0 0

0.135

↓

0 0 0

1 0 0

0 1 0

1 1 0

0 0 1

1 0 1

0 1 1

1 1 1

0.2

FM-IF-Gain

/AM NC Gain

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

•

↓

2.2

0.8

↓

1.7

•

1 0 0 1 1

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

2.8

FM/AM SD Adjust (at SEEK)

NC-AGC threshold voltage setting (at reception)

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

1 1 1 0 0

•

0.25

↓

2.65

FM Mute-ATT.

/AM NC Gate-Time

S-Meter Shift(TSOUT)

0 0 0 0 0 0

0.1 0.14

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

1 1 1 0 0

•

177μA

↓

1 0 0 0 0 0

0 1 0 0 0 0

1 1 0 0 0 0

0 0 1 0 0 0

1 0 1 0 0 0

0 1 1 0 0 0

•

↓

•

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

•

1 0 0 1 1 1

0 1 0 1 1 1

1 1 0 1 1 1

0 0 1 1 1 1

1 0 1 1 1 1

0 1 1 1 1 1

1 1 1 1 1 1

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

221μA

1.89 2.7

No.A0976-28/45

LV25200M

IN3-3 tuner setting2

Address 69h, Subaddress[ 0 1 0 ]

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

1

0

1

0

1

0

1

0

Address Code

Sub Address Code

Initial data

at power ON

L

(38)

(39)

(40)

(41)

(42)

(43)

(44)

(45)

(65)

FM/AM

W-AGC

Sensitivity

0 0 0 0 0.14

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

Vref 2.7V ADJ

Keyed-AGC

/AM-IF-Gain

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

0 0 Low

1 0 Typ

0 1 Little High

Null Voltage

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

•

0.14

0.87

1 1 High

•

1 0 0 1 1

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

Mute-ATT-SW/AM-Vsm-Shift

0 0 Low(Steep inclination)

1 1 1 1 2.57

2.2

1.8

1 0

0 1

1 1 High(Gentle inclination)

FM/AM

N-AGC

SD detection band width setting (at FM-SEEK)

Band variable filter start point setting

(FM reception)

QD P-ADJ

0 0 0 0

0.83

Sensitivity

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

1 0 0 0

0.2

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

0.54

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

1.39

2.5

2.19

No.A0976-29/45

LV25200M

IN3-4 tuner setting2

Address 69h, Subaddress[ 0 1 1 ]

Pi-Can

(Pilot Cancel Level Control)

0 0 Center (AM-NC=OFF )

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

Noise-AGC

1 0 Low

0 1 High

1 1 OFF

(same as above)

( AM-NC=ON)

0

1

No Limit

Limit

1

0

1

0

1

0

1

Address Code

Sub Address Code

Initial data

at power ON

L

(46)

(47)

(48)

(49)

(50) (51)(52)

(53) (54) (55)(56)(57)

(65)

NC-forced AGC

application point

changeover

SNC DAC/(AM-RF-AGC)

Amp threshold

(gentle inclination side)

SNC inclination

0 0

1 0

0 1

1 1

0 0 0 0 0

(1 0 0 0 0

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

1 1 1 0 0

•

0.07(1.35)

0

1

For AM

For FM

↓

AC-S meter load

changeover

0

1

Hi

Low

De-emphasis

↓

•

0

1

50μs

75μs

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

↓

Force MONO

Noise-Sens setting

1.15(2.46)

0

1

Normal

Forced MONO

0 0

1 0

0 1

1 1

Easy to detect

↓

Difficult to detect

Separation control

0 0 0 0 0 0

1 0 0 0 0 0

0 1 0 0 0 0

1 1 0 0 0 0

0 0 1 0 0 0

1 0 1 0 0 0

0 1 1 0 0 0

1 1 1 0 0 0

•

FM/AM

L-R Level Max.

HCC DAC.

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

1 1 0 0 0

0 0 1 0 0

1 0 1 0 0

0 1 1 0 0

1 1 1 0 0

•

↓

Noise-AGC

Threshold voltage forced application

0.5

↓

0

1

OFF(Normal)

ON(controlled with SD-ADJ-DAC)

↓

•

0 1 0 1 1 1

1 1 0 1 1 1

0 0 1 1 1 1

1 0 1 1 1 1

0 1 1 1 1 1

1 1 1 1 1 1

↓

1.5

•

0 1 0 1 1

1 1 0 1 1

0 0 1 1 1

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

↓

L-R Level Min.

No.A0976-30/45

LV25200M

IN3-5 tuner setting2

Address 69h, Subaddress[ 1 0 0 ]

B

0

B

1

B

2

B

3

A

0

A

1

A

2

A

3

1

0

1

0

1

0

1

0

Address Code

Sub Address Code

Initial data

at power ON

L

(58)

(59)(60)

(61)

(62)

(63)

(64)

(65)

MRC

Sensitivity

0 0 Low

1 0

0 1

VCO ON

During

measurement: Hi

↓

HCC SW

1 1 High

1

0

FM

AM

MRC Time constant

(Attack: Release Time)

0 0 Short

1 0

0 1

1 1 Long

MPX VCO

(Free-Run Freq. Control)

“Filter-Wide fixed“

sensitivity/AM-RF-AGC

Amp threshold

Filter-initial adjustment

D12-14

D15-19

D20-24

Gain

CF

Gain adjustment

CF adjustment

0 0 0 0 0 0

1 0 0 0 0 0

0 1 0 0 0 0

1 1 0 0 0 0

0 0 1 0 0 0

1 0 1 0 0 0

0 1 1 0 0 0

1 1 1 0 0 0

•

Freq=Low

↓

(steep inclination side)

0 0 0 0

1 0 0 0

0 1 0 0

1 1 0 0

0 0 1 0

1 0 1 0

0 1 1 0

1 1 1 0

0 0 0 1

1 0 0 1

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

0.37

BW/G

BW/G adjustment

“Gain adjustment“

D12 13D D14

“CF adjustment“

“BW/G adjustment“

• • •

D15

D19.

D20

D24.

1 1 1

0 1 1

1 0 1

0 0 0

1 0 0

0 1 0

1 1 0

Gain Low

1 1 1 1 1

0 1 1 1 1

1 0 1 1 1

•

CF Left Shift

1 1 1 1 1

0 1 1 1 1

1 0 1 1 1

•

BW(W)G↓

•

0 1 0 1 1 1

1 1 0 1 1 1

0 0 1 1 1 1

1 0 1 1 1 1

0 1 1 1 1 1

1 1 1 1 1

Typical

•

0 1 0 0 1

1 0 0 0 1

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

•

0 1 0 0 1

1 0 0 0 1

0 0 0 0 0

1 0 0 0 0

0 1 0 0 0

•

Gain High

Typical

Freq=High

2.04

•

1 0 1 1 0

0 1 1 1 0

1 1 1 1 0

1 0 1 1 0

0 1 1 1 0

1 1 1 1 0

CF Right Shift

BW(N)G↑

No.A0976-31/45

LV25200M

BIT Control Standard: Reference Value

1. FM S-meter shifter

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

Vsm(DC)=1.85V: +8dB

↑

Vsm(DC)=1.85V: 0dB

↓

Vsm(DC)=1.85V: -7dB

2-1. FM Mute-ON-adj

2-2. AM NC stop

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

-3dB Limitting sens: -6dB

0

1

0

1

0

1

0

1

0

1

Vsm (DC) for AM NC STOP=0.3V

↑

-3dB Limitting sens: 0dB

↓

Vsm (DC) for AM NC STOP=2.3V

↓

-3dB Limitting sens: +10dB

Vsm (DC) for AM NC STOP=4.2V

3-1. FM Mute-ATT

3-2. AM NC Gate-Time

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

0

1

MUTE attenuation: -0.5dB

0

1

0

1

0

1

0

1

0

1

0

1

INPUT=60dBμV: 1000μs

↑

MUTE attenuation: -13dB

↓

INPUT=60dBμV: 350μs

↓

MUTE attenuation: -25dB

INPUT=60dBμV: 200μs

4. FM weak input Mute changeover

(FM Mute-ON-adj:0000)

LSB

MSB

Function

0

1

0

1

0

1

INPUT=-20dBμV V42: 1.45V

↑

INPUT=-20dBμV V42: 2.0V

↓

INPUT=-20dBμV V42: 2.7V

No.A0976-32/45

LV25200M

5-1. FM SD Adjust

5-2. AM SD Adjust

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

SD on level: -19dB

0

1

0

1

0

1

0

1

0

1

SD on level: -13dB

↑

SD on level: 0dB

↓

SD on level: 0dB

↓

SD on level: +20dB

SD on level: +25dB

6-1. FM IF-Gain

LSB

MSB

Function

0

1

0

1

0

1

0

1

450kHz limit AMP: -6dB

↑

450kHz limit AMP: 0dB

↓

450kHz limit AMP: +6dB

7-1. FM W-AGC

7-2. AM W-AGC

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

W-AGC on level: -2dB

0

1

0

1

0

1

0

1

N-AGC on level: -9.5dB

↑

W-AGC on level: 0dB

↓

N-AGC on level: 0dB

↓

W-AGC on level: +2dB

W-AGC on level: +6dB

8-1. FM N-AGC

8-2. AM N-AGC

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

N-AGC on level: -9dB

0

1

0

1

0

1

0

1

N-AGC on level: -10dB

↑

N-AGC on level: 0dB

↓

N-AGC on level: 0dB

↓

N-AGC on level: +6dB

N-AGC on level: +6.5dB

No.A0976-33/45

LV25200M

9-1. FM Keyed-AGC

9-2. AM IF-Gain

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

V38 for Keyed AGC ON: 0.12V

0

1

0

1

0

1

0

1

AM 450kHz AMP Gain: -7.5dB

↑

V38 for Keyed AGC ON: 1.2V

↓

AM 450kHz AMP Gain: 0dB

↓

V38 for Keyed AGC ON: 2.1V

AM 450kHz AMP Gain: -4.5dB

10-1. FM Mute-ATT-SW

10-2. AM Vsm-shifter

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

MUTE attenuation at V42=1V: -6dB

MUTE attenuation at V42=1V: -8dB

MUTE attenuation at V42=1V: -13dB

MUTE attenuation at V42=1V: -19dB

0

1

0

1

0

Vsm(DC)=1.5V ANT IN: 30dBμV

Vsm(DC)=1.5V ANT IN: 38dBμV

Vsm(DC)=1.5V ANT IN: 45dBμV

Vsm(DC)=1.5V ANT IN: 55dBμV

0

1

11-1. FM SNC DAC

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

0

1

SEPARATION=15dB INPUT: -26dB

SEPARATION=15dB INPUT: -6dB

SEPARATION=15dB INPUT: 0dB

SEPARATION=15dB INPUT: +5dB

SEPARATION=15dB INPUT: +11dB

12-1. FM HCC DAC

12-2. AM HCC DAC

LSB

MSB

LSB

MSB

Function

0

1

0

1

0

1

0

1

0

1

V29 at 10kHz mod, -6dB: 0.4V

0

1

0

1

0

1

0

1

0

1

V29 at 4kHz mod, -6dB: 0.04V

↑

V29 at 10kHz mod, -6dB: 0.85V

↓

V29 at 4kHz mod, -6dB: 0.82V

↓

V29 at 10kHz mod, -6dB: 1.3V

V29 at 4kHz mod, -6dB: 1.3V

13-1. MRC Time constant

LSB

MSB

Function

0

1

0

1

0

1

Pin 39 output current: 2.9μA

Pin 39 output current: 2.2μA

Pin 39 output current: 1.5μA

Pin 39 output current: 0.8μA

No.A0976-34/45

LV25200M

Description Of Control Data

No.

Control block/data

Description

Related data

(1)

Programmable divider data

P0 to P15

¤ Data to set the dividing ratio of the programmable divider.

Binary value with P0 as LSB and P15 as MSB

AM/FM

OSC D1,D2

AM/FM

(2)

AM OSC dividing ratio

¤ OSC dividing ratio determination for AM OSC D1 and OSC D2

P0 to P15

OSC D1

OSC D2

Dividing ratio

10-division

8-division

6-division

4-division

OSC D1,OSC D2

0

1

0

1

0

1

(3)

(4)

General-purpose counter

measurement start control

¤ General-purpose counter measurement start data

CTS

GT0,GT1

CTP

CTE

=1: Count start

=0: Count reset

CTE

CTC

Reference divider data

¤ Reference frequency (fref) selection data

R3

0

1

R2

0

1

0

1

R1

0

1

0

1

0

1

0

1

R0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Reference frequency (kHz)

R0 to R3

Do not use

100

25

12.5

6.25

3.125

10

Do not use

5

1

Do not use

(5)

Stop of programmable

divider

¤ DVS=0: PLL-IN pin in IC stopped (pulled-down)

1: PLL-IN pin in IC selected

CTS

GT0,GT1

CTP

Set number of divisions (N): 272 to 65536

Input frequency range: 120 to 270MHz

* For details, refer to “Programmable Divider Composition.”

¤ AM/FM mode changeover

DVS

CTC

(6)

(7)

Tuner mode changeover

AM/FM

P0 to P15

OSC D1,D2

MODE1,

1=AM 0=FM

Tuner mode changeover

¤ Data to determine the mode of tuner

MODE2

SEEK1

SEEK2

IF buffer control output

SEEK1, SEEK2

0

1

0

1

0

1

Do not use

STOP

RDS

SEEK

Continued on next page.

No.A0976-35/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

¤ Data to select/changeover the PLL filter

Related data

(8)

PLL filter changeover

* don’t care

FM filter

ON

AM/FM

SEEK1,

SEEK2

MODE1

MODE2

AM/FM

SEEK1

SEEK2

AM filter

OFF

ON

MODE1,MODE2

*

0

1

0

1

0

1

0

1

0

1

OFF

ON

1

0

1

*

1

0

*

OFF

ON

OFF

ON

1

0

1

*

1

0

*

OFF

ON

(9)

OSC dividing ratio control

¤ Data to set the OSC dividing ratio at reception of AM/FM/WB

AM/FM

P0 to P15

OSC D1,

OSC D2

WEATHER

DIV_SW3

Dividing ratio

2-division

3-division

1-division

WEATHER

DIV_SW3

0

1

0

1

0

1

(10)

(11)

IC internal signal I/O port

Control data

Data to designate I/O of the I/O port

“Data” =0: input port Select “0” normally.

=1: output port Select “1” for IC test

* Select “0” for cases other than IC test.

X-TAL OSC

Data to detune the reference frequency X’tal=20.5MHz when beat has occurred

Variable by about 100Hz per bit in eight steps of 0 to 7 bits

Fine adjustment data

X’tal to be loaded with the external capacity at the 3-bit (110) setting

X’tal OSC ADJ

0 0 0

1 0 0

0 1 0

1 1 0

0 0 1

1 0 1

0 1 1

1 1 1

+390Hz

+250Hz

+110Hz

X’tal (center value)

-100Hz

-190Hz

-280Hz

-350Hz

(12)

(13)

AMSD speedup

Data to speed up the SD rise time in the AM mode

“SDSPEED”=0: NORMAL mode

=1: speedup mode

SDSPEED

DO pin

¤ Data to control the DO pin output

Control data

IL1

0

Il0

0

IN

Open

IL0,IL1

0

1

SD pin state (PIN13)

Pin I2 state (not used)

Do not use

1

0

1

Open when I/O-1 and I/O-2 pins are designated as output ports.

Note) Do not use with X’tal OSC STOP (DO does not change)

Data to make AGC of each of AM and FM effective

(14)

(15)

AM/FM-AGC ON

Control data

“FMAGC_ON”=0: NORMAL mode

For FM

=1: Forced ON mode

FMAGC_ON

“AMAGC_ON”=0: NORMAL mode

For AM

AMAGC_ON

=1: Forced ON mode

IF count sensitivity

deterioration control data

CTC

¤ Decrease the input sensitivity with CTC=1.

* Do not attempt change of bits during count (except for EVR).

Continued on next page.

No.A0976-36/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

Related data

(16)

General-purpose counter

Control data

¤ Data to determine the general-purpose counter measurement time

(frequency mode) and number of cycles (cycle mode).

Frequency measurement

Cycle measurement

mode

GT0, GT1

CTP

Wait time

CTP=0

GT1

GT0

Measurement

time

CTP=1

1 to 2ms

0

1

0

1

0

1

4ms

8ms

3 to 4ms

7 to 8ms

1 cycle

2 cycles

32ms

64ms

¤ CTP=0: General-purpose counter input stopped at counter reset (CTE=0)

=1: General-purpose counter input not stopped and the wait time shortened at

counter reset (CTE=0)

Except that Immediately after setting of CTP=1, it is necessary to wait for counter start

till the general-purpose counter input pin is biased.

(17)

DO pin control data

¤ Data to determine the output of DO pin.

ULD

0

DT1

0

DT0

0

DO pin

Low when unlocked

Do not use

ULD

DT0, DT1

0

1

end-UC

0

1

0

IN (*1)

0

1

Open

1

0

Do not use

end-UC

IN (*1)

1

0

1

0

1

end-UC: Count over of the general-purpose counter

DO

Start

End

CE:Hi

(I-1 change)

(18)

Unlock detection data

UL0, UL1

¤ Data to select the phase error (φE) detection width in order to check PLL for locking.

Phase error exceeding the φE detection width shown in the table below is determined to

indicate unlock. At unlock, the detection pin (DO) becomes Low.

ULD

DT0, DT1

UL1

0

UL0

0

φE detection width

Detection pin output

Open

Stop

0

1

φE output directly

φE extended by 1 to 2ms

1

0

0.5μs

1μs

1

φE

Extension

DO

1 to 2ms

Unlock output

(19)

(20)

IF count operation control

¤ Data to select the general-purpose counter input pin (HCTR) in IC

CTS=1: HSTR pin in IC selected

data

CTS

0: HCTR pin in IC pulled down

Sub-charge pump control

data

¤ Data to control the sub-charge pump

UL0, UL1,

DLC

PDC1

PDC0

Sub-charge pump state

High impedance

0

1

*

PDC0, PDC1

0

1

Charge pump operating (unlocked)

Charge pump operating (normal)

(*: don’t care)

* The sub-charge pump output is connected internally with the LPF FET gate.

The sub-charge pump and the PD (main charge pump) pin are combined to form the fast

lockup circuit.

* Except that this may not be effective depending on the filter multiplier (lighter filter).

Continued on next page.

No.A0976-37/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

¤ Data to control the dead band of phase comparator

Related data

(21)

Phase comparator control

data

DZ1

0

DZ0

0

Deadban mode

DZA

DZ0, DZ1

0

1

DZB

1

0

DZC

1

DZD

* DZA at power ON and power reset

(22)

(23)

Charge pump control data

DLC

¤ Data to set the charge pump output to the low level (V

level) in a forced manner.

SS

DLC=1: Low level

=0: Normal operation

* When the VCO control voltage (Vtune) is deadlocked because VCO stops oscillation at

0V, this data sets the charge pump output to the low level and Vtune to V , enabling

CC

escape from the deadlock state. Normal operation mode at power ON and power reset

IC test data

¤ IC test data

Set as follows:

TEST0

TEST1

TEST2

TEST0=0

TEST1=0

TEST2=0

* All of test data is set to “0” at power ON and power reset.

(24)

(25)

RF-DAC control

D31-0 to D31-8

Internal monitor changeover

data

¤ Causes application of the control voltage to the RF tuning circuit (varactor).

9BIT

¤ Data to changeover the internal monitor.

1BIT

D31-9

(26)

(27)

ANT-DAC control

D31-10 to D31-18

MSLOP Control changeover

data

¤ Causes application of the control voltage to the ANT tuning circuit (varactor).

9BIT

¤ Data to change over the FM MUTE curve inclination.

MSLOP

1BIT

0

1

Mute_D (steep inclination)

Mute_D (gentle inclination)

D31-19

(28)

Band variable filter control

data

¤ Narrow/wide band - (MIN/MAX) data to set the band variable filter

Each 3bits for narrow and wide bands

Band variable filter

D31-20 to D31-25

Narrow/wide band MIN/MAC control value

Wide LMT Cont

Narrow LMT Cont

D20 D21 D22

D23 D24 D25

0 0 0

Max (220k)

Min (150k)

0 0 0

1 0 0

0 1 0

•

Min (40k)

1 0 0

0 1 0

•

1 0 1

0 1 1

1 1 1

1 0 1

0 1 1

1 1 1

Max (80k)

(29)

Band variable filter mode

setting

¤ Data to set the mode of band variable filter.

2BIT

D31-26 to D31-27

Filter-Fix_SW

D26

0

D27

0

Filter-Mode

Variable

1

0

Narrow-Fix

Wide-Fix

0

1

Dont Care

(30)

(31)

(32)

DAC TEST select data

D31-29

¤ Data to select the output circuit of internal DAC circuit

S-meter shifter control

D32-0 to D32-4

¤ Controls the output value of FM S-METER shifter circuit.

5BIT

FM MUTE-ON-adj/

AM NC stop control

D32-5 to D32-9

¤ FM: Controls FM MUTE-ON-adj characteristic.

AM: Controls the sensitivity of AM NC stop.

5BIT

(33)

FM MUTE-ATT/

¤ FM: Controls FM MUTE-ATT characteristic.

AM NC Gate-Time control

D32-10 to D32-15

AM: Controls the width of AM NC Gate-Time characteristic.

6BIT

Continued on next page.

No.A0976-38/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

Related data

(34)

Weak input

¤ Changes over weak input MUTE.

MUTE changeover

D31-16 to D31-18

AM/FM SD-adj

3BIT

(35)

¤ Controls SD characteristic of AM/FM.

NC-AGC threshold voltage

setting data

Sets the threshold voltage of NC-AGC.

5BIT

D31-19 to D32-23

FM IF-Gain

(36)

(37)

¤ Controls Gain of FM IF limiter AMP.

/AM NC Gain control data

D32-24 to D32-27

TUNER OFF setting data

D32-28

Controls also Gain of IF limiter AMP in the AM mode similarly to the FM mode.

4BIT

¤ Data to set the mode to turn OFF the tuner.

1BIT

Tuner OFF mode

0

1

Normal operation

Tuner-OFF

(38)

(39)

(40)

AM/FM WAGC setting data

D33-0 to D33-3

¤ Data to set the AM/FM WAGC sensitivity.

4BIT

AM/FM NAGC setting data

D33-4 to D33-7

¤ Data to set the AM/FM NAGC sensitivity.

4BIT

Keyed-AGC/

¤ Controls FM Keyed-AGC sensitivity.

AM-IF-Gain setting data

D33-8 to D33-11

Controls AM-IF-GAIN.

4BIT

(41)

SD detection bandwidth

setting/band variable filter

start point setting data

D33-12 to D33-15

¤ Used to set the SD detection bandwidth at FM-SEEK.

Used to set the start point of band variable filter at FM reception.

4BIT

(42)

(43)

(44)

Null Voltage setting data

D33-16 to D33-20

¤ Controls the FM Null voltage.

5BIT

QDP-ADJ setting data

D33-21 to D33-24

¤ Controls the FM QDP voltage.

4BIT

FM MUTE-ATT SW/AM

S-meter shifter control

D33-25 to D33-26

¤ FM: Controls FM MUTE-ATT-SW characteristic.

AM: Controls S-meter shifter circuit output value.

Mute-ATT-SW/AM-Vsm-Shift

2BIT

0 0 Low (steep inclination)

1 0

0 1

1 1 High (gengle inclination)

(45)

VREF2.7V adj control

D33-27 to D33-28

¤ Sets the Vref2.7V output voltage to the target value.

2BIT

Vref2.7V ADJ

0 0 Low

1 0 Typ

0 1 Little High

1 1 High

(46)

(47)

Separation control

D34-0 to D34-5

¤ Controls separation of L/R output level in the FM stereo mode.

6BIT

FM SNC/

¤ Sets FM SNC characteristic.

AM-RF-AGC AMP

Threshold value (gentle

inclination side) setting data

D34-6 to D34-10

Sets AM-RF-AGC AMP (gentle inclination side) threshold voltage.

5BIT

(48)

(49)

FM/AM HCC setting data

D34-11 to D34-15

¤ Sets HCC characteristic of FM and AM.

5BIT

SNC inclination setting data

D34-16 to D34-17

¤ Sets inclination of SNC voltage (sets the separation curve).

2BIT

SNC inclination

0 0

1 0

0 1

1 1

↓

Continued on next page.

No.A0976-39/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

¤ Data to control the pilot cancel degree.

Related data

(50)

Pilot cancel control

D34-18 to D34-19

2BIT

Pi-Can (Pilot Cancel Level Control)

0 0 Center (AM-NC=OFF)

1 0 Low (same as above)

0 1 High (same as above)

1 1 OFF (AM-NC=ON)

(51)

De-emphasis select data

D34-20

¤ Data to select the De-Emphasis constant of L/R output.

1BIT

De-emphasis

0

1

50μs

75μs

(52)

(53)

Force NOMO setting data

D34-21

¤ Data to force L/R output to the MONO mode.

1BIT

0

1

Normal

Forced MONO

Noise-AGC

¤ Data to change the sensitivity by applying the Noise-AGC Threshold voltage in a forced

manner.

Threshold voltage forced

application data

D34-23

Noise-AGC

1BIT

Threshold voltage forced application

0

1

OFF (Normal)

ON(control with SD-ADJ-DAC)

(54)

Noise sensitivity setting data

D34-24 to D34-25

¤ Controls the noise detection sensitivity.

Noise-Sens setting

0 0 Easy to detect

2BIT

1 0

0 1

↓

1 1 Difficult to detect

(55)

AC S-meter

¤ S-meter output (Vsm2_sub):

Load changeover data

D34-26

Data to change over the output impedance (internal load resistance) of pin 40

1BIT

AC-S meter load changeover

0

1

Hi (7kΩ)

Low (3.5kΩ)

(56)

(57)

Noise-AGC limit setting data

D34-27

¤ Data to changeover the AGC limiter of noise canceller.

1BIT

Noise-AGC

0

1

No Limit (AGC easy to be effective)

Limit (AGC difficult to be effective)

D34-28

¤ No function

1BIT

0

1

0 : Normal setting

(58)

(59)

MPX VCO control data

D35-0 to D35-5

¤ Data for control to the MPX-VCO block free-run oscillation frequency of 304kHz

6BIT

VCO ON measurement bit

D35-6

¤ MPX-VCO block free-run oscillation frequency

During measurement: High

1BIT

(60)

(61)

HCC SW changeover bit

D35-6

¤ Data to change the HCC function AM/FM mode

HCC SW

1BIT

1

0

FM

AM

Filter-Wide fixed sensitivity/

AM-RF-AGC AMP

¤ Sets the Filter-Wide fixed sensitivity.

Sets the AM-RF-AGC AMP (steep inclination side) threshold voltage.

4BIT

Threshold value (steep

inclination side) setting data

D35-8 to D35-11

(62)

Filter initial adjustment bit

D35-12 to D35-24

¤ Data for various initial settings of the filter

13BIT

D12-14

D15-19

D20-24

Gain

CF

Gain adjustment

CF adjustment

BW/G

BW/G adjustment

Continued on next page.

No.A0976-40/45

LV25200M

Continued from preceding page.

No.

Control block/data

Description

Related data

(63)

MRC Sensitivity

¤ Data for sensitivity setting of MRC

MRC sensitivity

2BIT

Setting data

0 0

1 0

0 1

1 1

Low

↓

D35-25 to D35-26

↓

High

(64)

MRC Time constant

setting data

¤ MRC time constant (Attack/Release Time) setting data

2BIT

MRC time constant

D35-27 to D35-28

(Attack: Release Time)

0 0

1 0

0 1

1 1

Short

Long

(65)

D31-29 to D31-31

D32-29 to D32-31

D33-29 to D33-31

D34-29 to D34-31

¤ Sub-Code Address

Each 3 bits

DO Output Data (Serial Data Output) Composition

[3] OUT

Address

0

1 0 1 0 1 0 0

DI

First Data OUT

DO

(2) U-CTR

Description

(1) IN-PORT

No.

(1)

Control block/data

I/O port data

Related data

¤ I/O port; Data latching the state of pin 14 and other pins become I1 to I5. Latched when the

TEST-BIT

data output mode becomes effective.

(I/O-PORT)

I5 to I1

Pin state=Hi: 1

=Low: 0

Currently, only pin 14 (SD state)

(2)

General-purpose

¤ Data latching the content of general-purpose counter (20-bit binary counter) becomes

CTS0

CTS1

CTE

counter binary data

C19 to C0.

C19 ← MSB of binary counter

C0 ← LSB of binary counter

C19 to C0

Programmable Divider Composition

4bits

12bits

fvco/N

PLLIN

PD

φE

Swallow

DVS

Programmable

Divider

Counter

ferf

fvco=ferf × N

DVS

Set number of divisions (N)

Input frequency range (f [MHz])

PULL-IN pin in IC

Selected

1

0

272 to 65535

-

120 ≤ f ≤ 270

-

Stopped

* The input sensitivity is not shown here because the IC inside is closed.

No.A0976-41/45

LV25200M

Composition of The General-Purpose Counter

The general-purpose counter consists of 20-bit binary counters.

The count result can be read from MSB through the DO pin.

General-purpose counter

(20-bit binary counter)

L

S

B

M

S

B

1

2

HCTR

DO pin

(FIF)

0 to 3 4 to 7 8 to 11 12 to 15 16 to 19

CTS

CTE

4/8/32/64ms

GT

C=FIF × GT

GT1, GT0

On the basis of GT0 and GT1 data, the measurement time for frequency measurement using the general-purpose

counter can be selected from four types: 4,8,32,64 ms. By determining how many pulses are entered in the general-

purpose counter within one of these periods, the frequency of signal entered in HCTR in IC can be determined.

CTP data: Data to determine the general-purpose counter input pin (HCTR) state at reset of this counter (CTE=0)

CTP = 0: General-purpose counter input pin turned OFF (pulled down)

= 1: General-purpose counter input pin not pulled down, but the wait time reduced to 1- 2 ms.

When setting CTP=1, it must be set first not later than 4 ms before count start (CTE=1).

When the counter is not to be used, set CTP=0.

Frequency measurement mode

GT1

GT0

Wait time

Measurement time

CTP=0

CTP=1

0

1

0

1

0

1

4ms

8ms

3 to 4ms

1 to 2ms

32ms

64ms

7 to 8ms

IF Counter Operation

Before count start with the general-purpose counter, set CTE=0 to reset the counter beforehand.

The general-purpose counter starts counting by setting the serial data to CTE=1.

Then, the count result of the counter must be read out while CTE=1.

(With CTE=0, the general-purpose counter is reset.)

The signal entered in the HCTR pin in IC is divided into one half internally, and transmitted to the general-purpose

counter.

Accordingly, the count result of general-purpose counter is the one-half value of the actual frequency entered in the

HCTR pin in IC.

CTE=1

data

CE

Wait time

Frquency measurement time

HCTR

Measurement time

Input signal

No.A0976-42/45

LV25200M

For the integrating counter

* CTE=1

* CTE=0

CE

Internal data latch (CTE)

GT

General-purpose counter

(Integration)

Restart

Start

Reset

end-UC

(DO)

Count end

* CTE: 0 → • General-purpose counter Reset

1 → • General-purpose counter Start

• Restart with new “1”

During integrating counting, the counts are accumulated in the general-purpose counter.

Take care not to allow overflow of the counter.

Count value: O to FFFFF (1,048,575)

H

When the serial data (IN1) is re-transmitted while keeping CTE=1, the general-purpose counter restarts measurement

and the integrating count results are added.

Phase Comparator/Charge Pump

(1) Phase comparator/charge pump operation

In the PLL circuit block shown in Fig. 1, the phase comparator compares the phase difference of the reference

frequency(fr) and comparative frequency (fp) and outputs the phase difference components from the charge pump.

RF

Mixer

Leak in case of

fr

strong input

Reference Divider

Phase

Detector

Charge

Pump

LPF

VCO

fp

Programmable Divider

Fig. 1 PLL circuit block

No.A0976-43/45

LV25200M

Output characteristics of the phase comparator/charge pump are shown in Fig. 2.

The phase comparator outputs the output Vφ that is proportional to the phase differenceφ between fr and fp. By

changing the setting of phase comparator dead zone mode, characteristics of phase comparator can be changed.

Namely, the modes (DZA, DZB) to turn ON both P-CH and N-CH transistors of charge pump in case of extremely

small phase difference and the mode (DZD) not to output the phase difference output in case of extremely small

phase difference can be set.

Fig. 2 Phase comparator/charge pump characteristics

Vφ[V]

DZA mode

DZB mode

fp > fr

φ err [ns]

fr > fp

Dead Zone(-)

Dead Zone (--)

Vφ[V]

fp > fr

DZC mode

DZD mode

fp > fr

φ err [ns]

fr > fp

Dead Zone≈0

fr > fp

Dead Zone (+)

(2) Characteristics of the Dead Zone mode

The table below outlines characteristics in each dead zone mode.

Set data

Charge pump at phase difference 0

(Pch/Nch)

Dead zone width

(Reference data)

Dead zone mode

Remarks

DZ1

DZ0

0

1

DZA

DZB

DZC

DZD

ON/ON

-- (-15[ns])

- (-8[ns])

1

0

ON or OFF

OFF/OFF

≈0 (0[ns])

+ (+8[ns])

Do not use

1

No.A0976-44/45

LV25200M

(3) Guideline and cautions for selecting the Dead Zone mode

Features of each Dead Zone mode and criteria for selection are described below:

1) DZA mode

In the DZA mode, the correction signal is output from the charge pump even when the phase difference agrees

between the reference frequency (fr) and comparative frequency (fp), which is advantageous in obtaining the high

S/N ratio with ease. On the other hand, the side band of reference frequency component may occur, readily

causing beats in case of strong input. This is a phenomenon occurring because the PLL loop reacts sensitively due

to leak components through the mixer, modulating VCO. Occurrence of side band of reference frequency

component in the local oscillator also causes leakage of reference components to IF, which tends to worsen the

interference characteristics.

2) DZB mode

The DZB mode is characterized by the reduced voltage of correction signal from the DZA mode though, similarly

to the case of the DZA mode, the charge pump outputs the correction signal even when the phase difference

agrees between the reference frequency (fr) and comparative frequency (fp). This mode features in easier

achievement of high S/N ratio than DZC/DZD and improved beat and interference resistances.

3) DZC mode

In the DZC mode, the correction signal is output from the charge pump according to the phase difference between

the reference frequency (fr) and comparative frequency (fp). Extremely small noise may occur when the phase

difference is around 0 [ns]. Do not use this mode at low temperature (-30°C or less) because the S/N ratio may be

deteriorated.

4) DZD mode

In the DZD mode, the correction signal is output from the charge pump according to the phase difference

between the reference frequency (fr) and comparative frequency (fp). The correction signal is not output when

the phase difference is ± several [ns]. Accordingly, the S/N ratio becomes lower than other dead-zone modes, but

beat and interference resistances can be improved.

SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using

products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition

ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.

products described or contained herein.

SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all

semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or

malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise

to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt

safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not

limited to protective circuits and error prevention circuits for safe design, redundant design, and structural

design.

In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are

controlled under any of applicable local export control laws and regulations, such products may require the

export license from the authorities concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or

mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,

without the prior written consent of SANYO Semiconductor Co.,Ltd.

Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the

SANYO Semiconductor Co.,Ltd. product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed

for volume production.

Upon using the technical information or products described herein, neither warranty nor license shall be granted

with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third

party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's

intellectual property rights which has resulted from the use of the technical information and products mentioned

above.

This catalog provides information as of December, 2007. Specifications and information herein are subject

to change without notice.

PS

No.A0976-45/45


型号：	ENA0976
厂家：	SANYO SEMICON DEVICE
描述：	Bi-CMOS IC Single chip Tuner IC for Car Radio BI -CMOS IC的单芯片调谐器IC，车载电台
文件：	总45页 (文件大小：518K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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