LC823410-10R [SANYO]
Ultra-Low Power Consumption 7.0mW Large-Scale System LSI, GokLow, for IC Recorders; 超低功耗7.0mW大系统LSI ， GokLow ，用于IC录音机
| 型号： | LC823410-10R |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Ultra-Low Power Consumption 7.0mW Large-Scale System LSI, GokLow, for IC Recorders |
| 文件： | 总23页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1696
CMOS IC
Ultra-Low Power Consumption 7.0mW
Large-Scale System LSI, GokLow,
for IC Recorders
LC823410-10R
Overview
The LC823410-10R is a system IC that uses ultra-low power consumption technology to realize long-time playback and
recording, and has various IC recorder functions. The IC is optimal for use in IC recorder applications.
Features
*
• ARM7TDMI-STM 1, AMBA® (AHB/APB) system
-On-chip SRAM (160kbytes)
-On-chip ROM (256kbytes)
-DMA controller (2 channels)
-Interrupt controller (external 6 channels)
-SIO (2 channels), UART (3 channels, of which 2 channels run on the 12MHz oscillator XT1.)
Continued on next page.
*1: ARM logo, ARM Powered logo and, ARM7TDMI are registered trademark of ARM Limited.
Supply of this product does not convey license nor imply any right to distribute content created with
this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other
distribution channels), streaming applications (via Internet, intranets and/or networks), other content
distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media
(compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like).
Supply of this product does not convey license under the relevant intellectual property of Thomson
and/or Fraunhofer Gesellschaft nor imply any right to use this product in any finished end user or
ready-to-use final product. An independent license for such use is required. For details, please visit
http://mp3licensing.com/.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
60210HKIM VL-2635 No.A1696-1/23
LC823410-10R
Continued from preceding page.
-I2C (1 channel, single master, full speed mode/standard mode support)
-GPIO (multiplexed port I/O pin, 32 channels)
-Plain timer, multiple timer (2 channels, runs on the 12MHz oscillator XT1)
-10-bit A/D converter (4 channels)
-NAND flash memory I/F (multi-level cell NAND)
4-bit correctable ECC, automatic correction of error bits
-SD card I/F (CPRM not supported) [optional]
SD card clock can be generated through AHB clock.
-Memory stick I/F [optional]
-USB2.0 device I/F with PHY
Communication operation possible even when the AHB runs at a low clock rate. Insertion/extraction detection
possible even when the PHY clock is stopped.
-RTC (realtime clock)
Operation at a voltage independent from the internal core operating voltage, and RTC only power on operation
possible.
-JTAG ICE
• MP3*2 hard-wired encoder/decoder
-MPEG1, MPEG2, MPEG2.5
(Fs=8kHz to 48kHz, 8kbps to 320kbps)
• High quality sound technologies & functions (underlined functions support 96kHz sampling)
-SANYO “AViSS” surround circuit
-YY filter high frequency compensation circuit (2 modes, LP2: High bit rate and LP4: Low bit rate)
-Sampling rate converter. Convertible up to 96kHz (max.) within the range of 0.5 to 64 times
-6-band equalizer. Equalizer characteristics can be adjusted by setting the coefficient.
-Digital volume and mute functions (except the recording system). Both dB and linear rate of change can be
designated.
-Level meter (except the recording system)
-Audio timer function. LR clock count and interrupt generation function
• On-chip 16-bit PCM input/output interface. Master/slave mode, I2S support
• 12MHz oscillator XT1 + PLL dedicated for audio enable audio clock generation
Also supports audio operations using 16.9344MHz oscillator XT2 (optional).
• Supply voltages (typical)
-LOGIC, USB PHY1, XTAL, PLL1, RTC = 1.1V (when no USB devices connected) or 1.5V (when USB devices
connected)
-I/O, ADC, USB PHY2, PLL2 = 2.8V (when no USB devices connected) or 3.3V (when USB devices connected)
*2: MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and Thomson.
Specifications
Absolute Maximum Ratings at *V * = 0V
SS
Parameter
Symbol
1
Conditions
Ratings
Unit
V
Maximum supply voltage
V
V
V
DD
RTC
DD
DD
XT
-0.3 to 1.8
AV PHY1
DD
AV PLL1
DD
V
V
2
3
DD
DD
AV ADC
DD
-0.3 to 3.96
V
AV PHY2
DD
AV PLL2
DD
Input voltage
V
I
-0.3 to *V *+0.3 (max3.96)
DD
V
V
V
DP and DM pins
-0.3 to 5.25
-30 to +70
-55 to 125
IUSB
Operating ambient temperature
Storage ambient temperature
Topr
Tstg
°C
°C
No.A1696-2/23
LC823410-10R
Allowable Operating Range at Ta = -30 to +70°C
Low Voltage Operation
min typ max
1.05
High Voltage Operation
min typ max
Parameter
Supply voltage
Symbol
Conditions
Unit
V
V
1
1.1
1.1
1.1
2.8
1.1
2.8
2.8
1.8
2.8
1.1
2.8
1.2
1.2
1.35
1.35
1.35
2.7
0.9
2.7
2.7
1.7
2.7
1.35
3.0
0
1.5
1.5
1.5
2.8
1.5
2.8
2.8
1.8
2.8
1.5
3.3
1.65
1.65
1.65
3.6
V
V
V
V
V
V
V
V
V
V
V
V
DD
XT
DD
1.05
1.05
2.7
AV PLL1
DD
1.2
AV PLL2
DD
3.3
V
V
V
RTC
0.9
1.65
3.3
1.65
3.6
DD
DD
DD
2
3
2.7
2.7
3.3
3.6
1.7
1.95
3.3
1.95
3.6
AV ADC
DD
2.7
AV PHY1
DD
1.05(*1)
2.7(*1)
0
1.2
1.65
3.6
AV PHY2
DD
3.3
Input voltage
V
*V
*
*V *
DD
IN
DD
(*1) In the low-voltage operation state, although transition from this state to the high-voltage operation state
and operation after the transition are guaranteed, all operations are not guaranteed in the low-voltage
state.
(*2) The relations below are assumed in all operation states.
• V 1=V XT=AV PLL1=AV PHY1
DD DD DD DD
• AV PHY2>=AV ADC
DD DD
• V 2>=AV PLL2
DD DD
• V 2>=V
3
DD
DD
where,
• V 1, V XT, and AV HY1 have the same electrical potential because they are connected within the
DD DD DD
IC.
• AV PLL1>=V
1
DD
DD
• Besides the above two points, voltage differences up to 0.1V are considered to be equal.
Also, during RTC-only operation,
The above V RTC voltage can be applied at BACKUPB = Low input and application of
DD
V
* = 0V except for V RTC.
DD
DD
(*3) Low-voltage operation: This is an operation state that enables low power consumption during music
playback and other operations.
High-voltage operation: This is an operation state on the assumption that USB is used.
Low Voltage Operation
min typ max
High Voltage Operation
Parameter
Symbol
Function
Unit
min
typ
12MHz 100p-pm (using USB)
32.768
max
Input oscillation
frequency
Fxin1
FxinRTC
Fxin2
Frc
ARM & Peripherals
RTC
12
MHz
kHz
32.768
16.9344
1
AUDIO
16.9344
MHz
MHz
MHz
MHz
MHz
MHz
RC
0.4
0
2
30
0.4
0
1
2
60
Internal operating
frequency
Fahb
Fapb
Faud
Fsdclk
ARM AHB
ARM APB
AUDIO
0
30
0
60
0
16.9344
36.864
19
0
16.9344
36.864
SD I/F
Normal
24
40
clock frequency
High speed
25
MHz
(V 3>=2.7V SDDRV=1)
DD
MS I/F
Fsclk
Parallel
30
20
30
20
MHz
MHz
clock frequency
Serial
No.A1696-3/23
LC823410-10R
DC characteristic at Ta = -30 to +70°C, V 2 = 2.7 to 3.6V, V RTC = 0.9 to 1.65V,
DD
DD
V
3=1.7 to 1.95V, 2.7 to 3.6V
DD
Ratings
typ
Parameter
Symbol
Pins
Conditions
Unit
min
0.7×V
0.75×V
max
Input high level voltage
V
V
V
V
(1)
(2)
(3)
(1)
(2)
(3)
(4)
(5)
(6)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
2
2
V
V
IH
DD
Schmitt
Schmitt
DD
0.7×V RTC
DD
V
Input low level voltage
Output high level voltage
Output low level voltage
0.3×V
2
2
V
IL
DD
0.25×V
V
DD
0.2×V RTC
V
DD
I
I
I
I
I
I
=-2mA
V
2-0.4
V
OH
OL
OH
OH
OH
DD
=-4mA
=-0.3mA
V
3-0.34
V
DD
V
RTC-0.3
V
DD
=2mA
0.4
0.34
0.3
10
V
OL
OL
OL
=4mA
V
=0.3mA
V
Output leakage current
Pull-up resistor
I
Hi-Z output
-10
50
30
40
20
μA
kΩ
kΩ
kΩ
kΩ
OZ
Rup
Rup
Rdn
Rdn
100
45
150
80
Pull-up resistor
Pull-down resistor
Pull-down resistor
70
160
90
50
(1) FD7-0, SDCMD, SDAT3-0, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, RXD2-0, SDO0, TXD2-0,
XFCE1-0, PHI, TCK, TDI, TMS, SDI0, DIN, SDCD, SDWP
(2) TEST6-1, NTRST, NRES, EXTINT6-0, EXTFIQ, SCK1-0, XFBSY
(3) BACKUPB, VDET
(4) SCK1-0, FD7-0, EXD15-0, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, SDI0, RXD2-0, TXD2-0,
XFCE1-0, PHI, EXTFIQ, EXTINT4-0, DOUT, RTCK, TDO, XALE, XCLE, XFRE, XFWE, XFWP
(5) SDCLK, SDCMD, SDAT3-0
(6) RTCINT
(7) SCK1-0, FD7-0, SDCMD, SDAT4-1, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, RXD2-0, SDO1-0,
TXD2-0, XFCE1-0, PHI, EXTFIQ, EXTINT4-0, RTCK, XALE, XCLE, XFRE, XFWE, XFWP, RTCINT
(8) EXTFIQ, SCK1, SDO1, TXD2-0, RXD2-0, TIOCA1-0, SDI1, EXTINT4-0, XFCE1-0, SCL, SDA, LRCK, MCLK,
PHI, SCK0, SDI0, SDO0, TCK, TDI, TMS, NTRST ,XFWE, XFRE, XALE, XCLE, XFWP
(9) SDCMD, SDAT3-0, SDCD
(10) SDAT3-0
(11) DIN, FD7-0
(Caution)
The following pins are not included in DC characteristics.
RREF, DM, DP, VCNT1, VCNT2, AN3-0, XIN1, XIN2, XIN32K, XOUT1, XOUT2, XOUT32K
No.A1696-4/23
LC823410-10R
PLL1 Characteristics at Ta = -30 to +70°C
AV PLL1=1.05 to 1.2V
DD
AV PLL1=1.35 to 1.65V
DD
Parameter
Symbol
Conditions
Unit
min
typ
max
min
typ
max
VCO voltage
VCNT1
Fmax
0
AV PLL1
DD
0
AV PLL1
DD
V
VCO maximum oscillation
frequency
90
180
MHz
VCO minimum oscillation
frequency
Fmin
Fref
60
60
MHz
Phase comparison
frequency
30
10
30
10
MHz
ms
PLL lock time
Tlock
5
5
PLL2 Characteristics at Ta = -30 to +70°C, AV PLL2 = 2.7 to 3.6V
DD
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
VCO voltage
VCNT2
Fmax
Fmin
Fref
0
AV PLL2
DD
V
VCO maximum oscillation frequency
VCO minimum oscillation frequency
Phase comparison frequency
PLL lock time
40
MHz
MHz
MHz
ms
15 (*1)
17
Tlock
10
15
(*1) When a clock with a frequency lower than 15MHz is required, for example 12.288MHz (= 32kHz * 384, audio
circuit operation clock at a sampling frequency of 32kHz), this is generated by frequency dividing the clock by
2 as follows.
12.288MHz = 24.576MHz/2
10-bit AD Converter Characteristics at Ta = 25°C, AV ADC = 3.3V, AV ADC = 0V
DD SS
Ratings
Parameter
Symbol
Conditions
Unit
Pin
min
typ
max
ADC power supply
VAVRH
VAVRL
VAN
N
2.7
0
3.6
V
V
AV ADC
DD
ADC ground voltage
Analog input voltage
ADC resolution
AV ADC
SS
VAVRL
VAVRH
10
V
AN3-AN0
AN3-AN0
Bit
ADC operation clock
ADC conversion frequency
ADC sample hold time
Differential linearity error
Linearity error
FC
16.5
1.04
MHz
MHz
ns
Fs
Twr
120
FDIF
FLN
Vtz
NEFFECT=10
±1.5
±4.0
LSB
LSB
AN3-AN0
AN3-AN0
NEFFECT=10
Zero-scale offset voltage
VAVRL-0.1
VAVRL
VAVRH
VAVRL+0.1
VAVRH+0.1
V
V
AN3-AN0
AN3-AN0
(Transit voltage from 0 to 1)
Full-scale offset voltage
Vtf
VAVRH-0.1
1
(Transit voltage from 1022 to 1023)
Ladder stabilization time (*1)
Tstr
Rr
After STBY released
μs
Ω
Reference resistor (*1)
Power dissipation (*1)
770
15
Pd
mW
(*1) All the characteristics are design values.
No.A1696-5/23
LC823410-10R
USB Interface Characteristics at Ta = -30 to +70°C, V 1=1.35 to 1.65V, AV PHY1=1.35 to 1.65V,
DD DD
AV PHY2=3.0 to 3.6V
DD
Ratings
typ
Parameter
Output pin impedance
Symbol
HSDRV
Conditions
Unit
min
max
Z
Includes R resistor
S
40.5
49.5
Ω
Bus pull-up resistor on upstream
forcing port
R
R
V
FS idle
PU1
0.900
1.425
3.15
1.575
3.090
3.45
kΩ
Bus pull-up resistor on upstream
forcing port
FS receiving or transmitting
PU2
kΩ
Termination voltage for upstream
forcing port pullup (full-speed)
Input levels for full-speed:
TERM
V
High-level input voltage (drive)
High-level input voltage (floating)
Low-level input voltage
V
V
V
V
2.0
2.7
V
V
V
IH
3.6
0.8
IHZ
IL
Differential input sensitivity
|(D+)-(D-)|
DI
0.2
0.8
V
V
Differential common mode range
V
Includes V range
DI
Refer to figure 2.1
CM
2.5
Output levels for full-speed:
High-level output voltage
Low-level output voltage
SE1
V
V
V
V
R
R
of 14.25kΩ to V
SS
2.8
0.0
0.8
1.3
3.6
0.3
V
V
V
V
OH
L
of 1.425kΩ to 3.6V
OL
L
OSE1
CRS
Output signal crossover point voltage
Input levels for high-speed:
Refer to figure 2.1
2.0
High-speed squelch detection
threshold (differential signal)
High-speed data signaling common
mode voltage range
V
V
HSSQ
100
-50
150
mV
mV
HSCM
+500
High-speed differential input signaling
level
Refer to figure 2.2
Output levels for high-speed:
High-speed idle state
V
-10.0
360
+10
440
mV
mV
mV
mV
mV
HSOI
High-speed data signaling high
High-speed data signaling low
Chirp J level (different signal)
Chirp K level (different signal)
Time to active-state:
V
HSOH
V
-10.0
700
+10
HSOL
V
1100
-500
CHIRPJ
V
-900
CHIRPK
Time from idle (standby/ suspend)
state to active state (*)
T
ACT
1
ms
States identified by an asterisk (*)
• Idle (standby/suspend) state: Either one of the following 4 states:
- Either one of AV PHY1 and AV PHY2 is lower than the guaranteed operating voltage.
DD DD
- (USB register) DeviceControl: SuspendSts=Susp3endSet=1 (USBPHY suspended state)
- (USB register) DeviceControl: RstPhy=1 (USBPHY reset state)
- (SYSCON register) USBCTL: SHSTBY=1 (USBPHY standby state)
For details on the registers, see the LC823410-09C-E User’s Manual (Expansion Module).
• Active-state: Any state in which the IC is not in any of the Idle (standby/suspend) states.
No.A1696-6/23
LC823410-10R
Figure 2.1: Differential Input Sensitivity Range for Full-speed
Differential Input Voltage Range
Differential Output
Crossover
Voltage Range
-1.0 ⋅ ⋅ ⋅ 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2
⋅ ⋅ ⋅ 4.6
Figure 2.2: Differential Input Sensitivity Range for High-speed
Level1
+400mV
Differential
Point3
Point1
Point4
Point2
0 Volts
Differential
Point5
Point6
Level2
-400mV
Differential
0%
Unit Interval
100%
No.A1696-7/23
LC823410-10R
AC Characteristics: Reset at Ta = -30 to +70°C, V 1 = 1.05 to 1.65V, V 2 = 2.7 to 3.6V
DD
DD
Ratings
Parameter
Symbol
Conditions
Unit
min
typ
max
Reset active time
t
1
Time after both of V 1 and V 2 reached
DD DD
within the allowable operation voltage range
RESW
10
μs
t
1
RESW
NRES
Package Dimensions
unit : mm (typ)
3257A
16.0
14.0
120
1
0.15
0.125
0.4
(1.2)
SANYO : TQFP120(14X14)
No.A1696-8/23
LC823410-10R
Block Diagram
No.A1696-9/23
LC823410-10R
Pin Assignments
I/O
Pin Characteristics
I
Input pin
3IC
3IS
3.3V CMOS input
1IC
1T3
X
1.5V CMOS input
1.5V 0.3mA tristate output
Oscillation amplifier
3.3V analog
O
B
P
Output pin
3.3V Schmitt input
Bi-directional pin
Power supply pin
3ICU
3ICD
3ISU
3O2
3T2
3.3V CMOS input pullup
3.3V CMOS input pulldown
3.3V Schmitt input pullup
3.3V 2mA output
3A
1A
1.5V analog
3.3V 2mA tristate output
3.3V 6mA output
3O6
3T6
3.3V 6mA tristate output
No.
Name
I/O
I
Characteristic
Function
1
TEST3
TEST4
TEST5
TEST6
TCK
3IS
3IS
Test pin (normally tied to low)
Test pin (normally tied to low)
Test pin (normally tied to low)
Test pin (normally tied to low)
JTAG test clock
2
I
3
I
3IS
4
I
3IS
5
I
3ICU
6
RTCK
NTRST
TDI
O
I
3O2
JTAG test returned clock
7
3ISU
JTAG test reset
8
I
3ICU
JTAG test data input
9
TMS
I
3ICU
JTAG test mode select
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TDO
O
I
3O2
JTAG test data output
NRES
PHI(P11)
3IS
Reset input
B
B
B
B
B
B
B
B
B
B
B
B
P
P
P
B
B
B
B
B
B
B
B
B
I
3ICU/3T2
3ISU/3T2
3ISU/3T2
3ICU/3T2
3ICU/3T2
3ISU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
AHB bus clock output/32.768kHz clock output/GPIO
External FIQ interrupt/GPIO
Serial I/F 0 clock/GPIO
EXTFIQ(P2F)
SCK0(P08)
SDO0(P09)
SDI0(P0A)
Serial I/F 0 output data/GPIO
Serial I/F 0 input data/GPIO
Serial I/F 1 clock/GPIO
SCK1(P14)
SDO1(P15)
SDI1(P16)
Serial I/F 1 output data/GPIO
Serial I/F 1 input data/GPIO
UART1 transmit data/GPIO
UART1 receive data/GPIO
Multiple timer input capture/output compare A0/GPIO
Multiple timer input capture/output compare A1/GPIO
Digital 1.5V power supply
Digital 3.3V power supply
Digital ground
TXD1(P2A)
RXD1(P2B)
TI0CA0(P19)
TI0CA1(P1B)
V
V
V
1
2
DD
DD
SS
TXD0(P1D)
RXD0(P1E)
XFWE(P01)
XFRE(P02)
XALE(P03)
XCLE(P04)
XFCE1(P1F)
XFCE0(P00)
XFWP(P05)
XFBSY
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3IS
UART0 transmit data/GPIO
UART0 receive data/GPIO
NAND FLASH write enable
NAND FLASH read enable
NAND FLASH address latch enable
NAND FLASH command latch enable
NAND FLASH chip enable 1/GPIO
NAND FLASH chip enable 0/GPIO
NAND FLASH write protect/GPIO
NAND FLASH busy
FD0
B
B
P
P
3ICD/3T2
3ICD/3T2
NAND FLASH data bit0
FD1
NAND FLASH data bit1
V
2
Digital 3.3V power supply
Digital ground
DD
V
SS
Continued on next page.
No.A1696-10/23
LC823410-10R
Continued from preceding page.
No.
I/O
B
B
B
B
B
B
B
B
B
B
B
P
P
P
O
I
Characteristic
3ICD/3T2
3ICD/3T2
3ICD/3T2
3ICD/3T2
3ICD/3T2
3ICD/3T4
3ISU/3T2
3ISU/3T2
3ISU/3T2
3ISU/3T2
3ISU/3T2
Function
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
FD2
NAND FLASH data bit2
NAND FLASH data bit3
NAND FLASH data bit4
NAND FLASH data bit5
NAND FLASH data bit6
NAND FLASH data bit7
FD3
FD4
FD5
FD6
FD7
EXTINT0(P21)
EXTINT1(P22)
EXTINT2(P23)
EXTINT3(P24)
EXTINT4(P25)
External interrupt bit0/GPIO
External interrupt bit1/GPIO
External interrupt bit2/GPIO
External interrupt bit3/GPIO
External interrupt bit4/GPIO
Digital 1.5V power supply
Digital 3.3V power supply
Digital ground
V
V
V
1
2
DD
DD
SS
DOUT
3O2
PCM output data
DIN
3ICD
PCM input data
BCK
B
B
B
B
B
B
B
I
3IC/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3ICU/3T2
3IS
PCM bit clock
LRLK(P12)
MCLK(P13)
SCL(P28)
SDA(P29)
TXD2(P2C)
RXD2(P2D)
TEST1
PCM LR clock/GPIO
PCM main clock/GPIO
I2C SCL clock/GPIO
I2C SDA data/GPIO
UART2 transmit data/GPIO
UART2 receive data/GPIO
Test pin (normally tied to Low)
Test pin (normally tied to Low)
Digital 1.5V power supply
SD card write protect
TEST2
I
3IS
V
1
P
I
DD
SDWP
3IC
3ICU
SDCD/INS
SDCMD/BS
SDCLK/SCLK
SDAT0/DATA0
I
SD card detect/MSINS
B
O
B
P
P
B
B
B
P
P
O
P
P
I
3ICU/3T6
3O6
SD card command/MSBS
SD card clock/MS clock
3ICUD/3T6
SD card data/MS data
V
Digital ground
SS
V
3
Digital 3.3V/1.8V power supply
SD card data/MS data
DD
SDAT1/DATA1
SDAT2/DATA2
SDAT3/DATA3
3ICUD/3T6
3ICUD/3T6
3ICUD/3T6
SD card data/MS data
SD card data/MS data
AV PLL1
DD
PLL1 analog power supply
PLL1 analog ground
AV PLL1
SS
VCNT1
1A
PLL1 VCO control
V
V
X
X
V
V
XT
System /USB PHY oscillation amplifier 1.5V power supply
System /USB PHY oscillation amplifier ground
System /USB PHY oscillation amplifier input
System /USB PHY oscillation amplifier output
RTC power supply
DD
XT
SS
1
X
X
IN
1
B
P
P
O
I
OUT
RTC
DD
RTC
SS
RTC ground
XOUT32K
XIN32K
X
RTC 32.768kHz oscillation amplifier output
RTC 32.768kHz oscillation amplifier input
Voltage detect input
X
VDET
I
1IC
1T3
1IC
RTCINT
BACKUPB
O
I
RTC interrupt output
RTC mode (RTC only or whole IC)
USB PHY 1.5V power supply
USB PHY analog ground
AV PHY1
DD
P
P
AV PHY1
SS
Continued on next page.
No.A1696-11/23
LC823410-10R
Continued from preceding page.
No.
I/O
P
B
P
P
P
P
P
P
P
B
B
P
P
P
I
Characteristic
3A
Function
USB PHY analog ground
93
AV PHY1
SS
94
RREF
USB PHY reference resistor
USB PHY analog ground
USB PHY analog 3.3V power supply
USB PHY analog 3.3V power supply
USB PHY analog ground
USB PHY analog ground
USB PHY analog ground
USB PHY analog 3.3V power supply
USB D+
95
AV PHY2
SS
96
AV PHY2
DD
97
AV PHY2
DD
98
AV PHY2
SS
99
AV PHY2
SS
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
AV PHY2
SS
AV PHY2
DD
DP
3A
3A
DM
USB D-
AV PHY2
SS
USB PHY analog ground
USB PHY analog 3.3V power supply
A/D converter analog power supply
A/D converter analog input Ch0
A/D converter analog input Ch1
A/D converter analog input Ch2
A/D converter analog input Ch3
A/D converter analog ground
Digital ground
AV PHY2
DD
AV ADC
DD
AN0
AN1
AN2
AN3
3A
3A
3A
3A
I
I
I
AV ADC
SS
P
P
I
V
SS
X
X
V
2
X
X
Audio 16.9344MHz oscillator input
Audio 16.9344MHz oscillator output
Digital 1.5V power supply
PLL2 analog power supply
PLL2 analog ground
IN
2
O
P
P
P
O
P
P
OUT
1
DD
AV PLL2
DD
AV PLL2
SS
VCNT2
3A
PLL2 VCO control
V
V
2
Digital 3.3V power supply
Digital ground
DD
SS
Pin Functions
I
Input pin
O
B
P
Output pin
Bi-directional pin
Power supply pin
Pin name
Direction
Count
Function
(1) Clock, reset, system pin (12 pins)
TEST[6:1]
NRES
I
6
Test pin
I
1
1
1
1
1
1
Reset input
X
X
X
X
1
I
O
System/USB PHY oscillator amplifier input
System/USB PHY oscillator amplifier output
Audio 16.9344MHz oscillator input
IN
1
2
OUT
2
I
IN
O
Audio 16.9344MHz oscillator output
OUT
PHI(P11)
O(B)
AHB bus clock output/32.768kHz clock output
Functions as P11 after hard reset
(2) Interrupt (6 pins)
EXTFIQ(P2F)
I(B)
I(B)
1
5
External FIQ interrupt
Functions as P2F after hard reset
External interrupt
EXTINT[4:0]
(P[25:21])
Functions as port after hard reset
Continued on next page.
No.A1696-12/23
LC823410-10R
Continued from preceding page.
Pin name
Direction
Count
Function
(3) NAND FLASH I/F (16 pins)
XFCEO(P00)
O(B)
O(B)
O(B)
O(B)
O(B)
O(B)
O(B)
1
1
1
1
1
1
1
NAND FLASH chip enable 0
Functions as P00 after hard reset
NAND FLASH chip enable 1
Functions as P1F after hard reset
NAND FLASH write enable
XFCE1(P1F)
XFWE(P01)
XFRE(P02)
XALE(P03)
XCLE(P04)
XFWP(P05)
Functions as P01 after hard reset
NAND FLASH read enable
Functions as P02 after hard reset
NAND FLASH address latch enable
Functions as P03 after hard reset
NAND FLASH command latch enable
Functions as P04 after hard reset
NAND FLASH write protect
Functions as P05 after hard reset
NAND FLASH busy
XFBSY
I
1
8
FD[7:0]
B
NAND FLASH data
(4) SD card I/F, MS I/F (8 pins)
SDWP0
I
1
1
1
1
4
SD card write protect
SDCD0/INS
SDCMD0/BS
SDCLK0/SCLK
SDAT0[3:0]/DATA[3:0]
(5) PCM I/F (5 pins)
DOUT
I
SD card card detect / MSINS
SD card command / MSBS
SD card clock / MS clock
SD card data / MS data
B
O
B
O
I
1
1
1
1
PCM output data
PCM input data
PCM bit clock
DIN
BCK
B
LRCK(P12)
B(B)
PCM LR clock
Functions as LRCK after hard reset
PCM main clock
MCLK(P13)
B(B)
1
Functions as MCLK after hard reset
(6) Serial I/F (14 pins)
SCK0 (P08)
B
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Serial I/F 0 clock
Functions as P08 after hard reset
Serial I/F 0 output data
SDO0 (P09)
SDI0 (P0A)
SCK1 (P14)
SDO1 (P15)
SDI1 (P16)
TXD0 (P1D)
RXD0 (P1E)
TXD1 (P2A)
RXD1 (P2B)
TXD2(P2C)
RXD2(P2D)
SCL (P28)
O (B)
I (B)
Functions as P09 after hard reset
Serial I/F 0 input data
Functions as P0A after hard reset
Serial I/F 1 clock
B (B)
O (B)
I (B)
Functions as P14 after hard reset
Serial I/F 1 output data
Functions as P15 after hard reset
Serial I/F 1 input data
Functions as P16 after hard reset
UART transmit data
O (B)
I (B)
Functions as P1D after hard reset
UART receive data
Functions as P1E after hard reset
UART1 transmit data
O (B)
I (B)
Functions as P2A after hard reset
UART1 receive data
Functions as P2B after hard reset
UART2 transmit data
O (B)
I (B)
Functions as P2C after hard reset
UART2 receive data
Functions as P2D after hard reset
I2C SCL clock (open drain output)
Functions as P28 after hard reset
I2C SDA data (open drain output)
Functions as P29 after hard reset
B (B)
B (B)
SDA (P29)
Continued on next page.
No.A1696-13/23
LC823410-10R
Continued from preceding page.
Pin name
(7)Timer (2 pins)
TIOCA0 (P19)
Direction
Count
Function
B(B)
B(B)
1
1
Multiple timer input capture/output compare A0
Functions as P19 after hard reset
TIOCA1 (P1B)
Multiple timer input capture/output compare A1
Functions as P1B after hard reset
(8) JTAG (6 pins)
TCK
I
O
I
1
1
1
1
1
1
JTAG test clock
RTCK
JTAG test returned clock
JTAG test reset
NTRST
TDI
I
JTAG test data input
JTAG test mode select
JTAG test data output
TMS
I
TDO
O
(9) RTC (5 pins)
XOUT32K
O
I
1
1
1
1
1
RTC 32.768kHz oscillator amplifier output
RTC 32.768kHz oscillator amplifier input
Voltage detect input
XIN32K
VDET
I
RTCINT
O
I
RTC interrupt output
BACKUPB
RTC mode (RTC only or LSI whole)
(10) PLL (2 pins)
VCNT1
O
O
1
1
PLL1 VCO control
PLL2 VCO control
VCNT2
(11) USB (3 pins)
DP
B
B
B
1
1
1
USB D+ (Device)
DM
USB D- (Device)
RREF
USB PHY reference resistor
(12) Analog (4 pins)
AN[3:0]
I
4
Analog input
(13) Power supply pin (37 pins)
V
V
V
V
1
2
3
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
4
4
1
6
1
1
1
1
1
1
1
1
1
2
4
5
1
1
Digital 1.5V power supply
DD
DD
DD
SS
Digital 3.3V power supply
Digital 3.3V/1.8V power supply (SD card I/F, MS I/F power supply)
Digital ground
AV PLL1
DD
PLL1 analog power supply
PLL1 analog ground
AV PLL1
SS
AV PLL2
DD
PLL2 analog power supply
PLL2 analog ground
AV PLL2
SS
V
V
V
V
RTC
RTC power supply
DD
RTC
XT
RTC ground
SS
Oscillation amplifier 1.5V power supply
Oscillation amplifier ground
USB PHY analog 1.5V power supply
USB PHY analog ground
DD
XT
SS
AV PHY1
DD
AV PHY1
SS
AV PHY2
DD
USB PHY analog 3.3V power supply
USB PHY analog ground
AV PHY2
SS
AV ADC
DD
A/D converter analog power supply
A/D converter analog ground
AV ADC
SS
No.A1696-14/23
LC823410-10R
Peripheral Circuit Example
PLL Peripheral Circuit 1 (for system)
The PLL1 circuit configuration is shown in the figure below. On the wiring board, connect the decoupling capacitors as
close as possible to the pin, and separate the power line from other power supply lines to minimize noise.
AV PLL1
SS
AV PLL1
DD
VCNT1
C4
+
R2
C3
R1
C1
C2
AV PLL1
DD
AV PLL1
SS
Symbol
R1
Value
100 to 200Ω
*MΩ
Model or Accuracy
5%
5%
R2
C1
0.1 to 0.22μF
(Approx. C1/100)
0.1μF
Capacitance error: 10%
Temperature characteristics: 10%
C2
(-25 to +85°C)
C3
C4
33μF
16CV33BS
* C4: This is based on SANYO Electric’s Surface Mount Device Catalog (CV-BS Series).
Note:
Generally, use R2 and C2 without mounting.
However, if there is a problem that affects the PLL characteristics, the PLL characteristics may be improved by
mounting R2 and C2. Therefore, be sure to prepare R2 and C2 wiring patterns beforehand.
No.A1696-15/23
LC823410-10R
PLL Peripheral Circuit 2 (for audio)
The PLL2 circuit configuration is shown in the figure below. On the wiring board, connect the decoupling capacitors as
close as possible to the pins, and separate the power line from other power supply lines to minimize noise.
AV PLL2
SS
AV PLL2
DD
VCNT2
C4
+
R2
C3
R1
C1
C2
AV PLL2
DD
AV PLL2
SS
Symbol
R1
Value
100 to 200Ω
*MΩ
Model or Accuracy
5%
5%
R2
C1
1.0 to 2.0μF
(Approx. C1/100)
0.1μF
Capacitance error: 10%
Temperature characteristics: 10%
C2
(-25 to +85°C)
C3
C4
33μF
16CV33BS
* C4: This is based on SANYO Electric’s Surface Mount Device Catalog (CV-BS Series).
Note:
Generally, use R2 and C2 without mounting.
However if there is a problem that affects the PLL characteristics, the PLL characteristics may be improved by
mounting R2 and C2. Therefore, be sure to prepare R2 and C2 wiring patterns beforehand.
Reference
For audio applications, experiments have confirmed that
C1=1.0μF, C2=0.01μF
can be effective in maximizing the jitter reduction of the PLL output clock.
(Note that this depends on the board and other environmental conditions, and the result is not guaranteed.)
No.A1696-16/23
LC823410-10R
USB2.0 Peripheral Circuit
Be sure to always observe the items below when designing the circuit board.
• Differential impedance control
The DP/DM routing width, routing clearance, and PCB layer spacing must be determined so that differential
impedance of 90Ω can be achieved. We recommend a microstrip structure for realizing impedance matching.
• Power supply (AV PHY2, AV PHY1) and ground (AV PHY2, AV PHY1) lines
DD DD SS SS
The separation of the power line and ground line only for USB usage is recommended.
At a minimum, insert 10μF, 0.1μF, and 0.01μF capacitors between the power supply and ground for filtering.
To reject high-frequency noise, inserting the 0.01μF capacitor directly under the power pin and ground pin is
recommended.
Note that 0.1μF capacitor is also effective for latch-up protection.
• Crystal oscillator
Use a crystal oscillator connected to the X 1 and X
1 pins that has a fundamental wave of 12MHz, oscillation
IN OUT
accuracy of 100p-pm or less, and place it near the IC.
• Reference resistor
Connect the RREF pin to the ground near the IC through the 680Ω (tolerance 1% or less) reference resistor.
I2C Peripheral Circuit
For the Rs and Rp values, see the I2C standards.
No.A1696-17/23
LC823410-10R
XTAL Peripheral Circuit
XTAL1 (12MHz)
12MHz oscillation amplifier RC reference values → R1=1MΩ, R2=0Ω, C1=C2=22pF
Applicable pins: X 1, X
1
IN
OUT
R1
R2
C2
C1
XTAL2 (16.9344MHz)
16.9344MHz oscillation amplifier RC reference values → R1=1MΩ, R2=0Ω, C1=C2=22pF
Applicable pins: X 2, X
2
IN OUT
R1
R2
C2
C1
XTALRTC (32.768kHz)
32.768kHz oscillation amplifier RC reference values → R1=5.1MΩ, R2=330kΩ, C1=C2=22pF
Applicable pins: X 32K, X
32K
OUT
IN
R1
R2
C2
C1
(Reference)
Oscillator product: DT-38 (DAISHINKU Corp.)
No.A1696-18/23
LC823410-10R
JTAG Pin Treatment Examples (both for use of ICE and non-use of ICE)
V
2
DD
JTAG
Connector
LC823410
10kΩ
TCK
TDI
TCK
TDI
TMS
TMS
NTRST
NRES
nTRST
nSRST
Power on reset (*1)
(Open drain output)
System reset (*2)
(Open drain output)
33Ω
RTCK
TDO
RTCK
TDO
(*1) The power-on reset is a reset signal that becomes active-low only when the power is turned on. Set so that the
NTRST pin is reset only by a reset from JTAG and power-on reset.
(*2) System reset includes a power-on reset and a reset signal, requested by the system, that becomes active-low by a
manual reset or other means.
Set so that the NRES pin is reset by the reset from JTAG and by system reset.
See the data sheet for the NRES pin reset specifications. The NTRST pin has the same specifications as those of the
NRES pin.
The power-on reset (open drain output) can be implemented, for example, by connecting it to the ground through a
capacitor.
The above configuration is a peripheral circuit example that assumes the use of a JTAG ICE by YDC (Yokogawa
Digital Computer) and can be applied both in cases where ICE is and is not used.
To use other products, inquire at the manufacturer.
No.A1696-19/23
LC823410-10R
JTAG Pin Treatment Examples (non-use of ICE)
LC823410
TCK
TDI
TMS
NTRST
NRES
System reset (*1)
RTCK
TDO
(*1) System reset includes a power-on reset that becomes active-low only when power is turned on, or a reset signal,
requested by the system, that becomes active-low by a manual reset or other means.
The NTRST pin has the same specifications as those of the NRES pin, and at least a power-on reset must be
implemented.
As shown in this example, system reset can be connected to the NRES pin directly.
The above configuration is a simplified example of a peripheral circuit in the case that ICE is not used.
No.A1696-20/23
LC823410-10R
Power-on Sequence
(1) 3.3V *1
3.3V
(V 2, V 3, AV ADC, AV PHY2, AV PLL2)
DD DD DD DD DD
3.0V
2.8V
(2)1.5V
1.5V
(V 1, V XT, AV PLL1, V RTC, AV PHY1)
DD
DD
DD
DD
DD
1.35V
1.1V
Min *2
Max 100ms
Max 100ms
USB power supply cutoff (such as cable disconnection)
(when Vbus = low is detected by at the IC pin)
*1 The following relations must be satisfied.
• AV PHY2>=AV ADC
DD DD
V
V
2>=AV PLL2
DD DD
DD
2>=V 3
DD
*2
• This is a period required only when the AHB clock is operating at a frequency higher than the internal operating
frequency guaranteed by V 1>=1.35V, and this is needed for switching to an operating frequency guaranteed by
DD
V
1>=1.0V. The minimum time depends on the system. For the guaranteed operating frequency at each voltage,
DD
see the data sheet.
No.A1696-21/23
LC823410-10R
RTC Pin Power On/Off Control Sequence
When running RTC only at power-off of the device, it is required to detect the voltage drop of V 1, V 2 and set
DD DD
BACKUPB to low. Determine the detection level of V 1 and V 2 according to the conditions of the device. The
DD
DD
VDET pin needs to be set to low when the RTC power supply is cut off (when RTC operation is stopped).
Also, when drop in the RTC power supply voltage is detected, VDET must be set to low. The figure below shows the
power on/off sequence when the detection level of V RTC is 0.9V or less. Determine the detection level of
DD
V
RTC according to the conditions of the device.
DD
No.A1696-22/23
LC823410-10R
(Reference: Internal control by BACKUPB)
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellectual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of June, 2010. Specifications and information herein are subject
to change without notice.
PS
No.A1696-23/23
相关型号：
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