LV5223GR [SANYO]
LED Driver; LED驱动器
| 型号： | LV5223GR |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | LED Driver |
| 文件： | 总24页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1969
Bi-CMOS IC
LED Driver
LV5223GR
Overview
The LV5223GR is 9ch LED driver IC for the cell phones with built-in charge pump circuit.
Features
• LED driver ×9 channels (3-color 1, 3-color 2, GPO (LED) ×3, 9 channels in total) and on-chip charge pump circuit.
• Each LED driver current level can be adjusted independently over the serial bus.
• Ring tone and 3-color LEDs (3-color 1, 3-color 2) synchronization function.
• Gradation function (3-color 1, 3-color 2, in total 6 channels only)
• RLED2 and GLED2 support strobe mode.
• Miniature package
Function
• Charge pump circuit ((2 times step up) Output voltage: 5V)
• LED driver 3-color LED ×2 + GPO (LED) LED driver ×3
Channel 1 LED current can be switched indecently in 5-bit units (0.5 to 16mA)
Ring tone synchronization function (forced activation with SCTL: H)
Gradation function
Channel 1 LED current can be switched indecently in 5-bit units (0.5 to 16mA)
Ring tone synchronization function (forced activation with SCTL: H)
Gradation function
Only RLED2 and GLED2 support strobe mode; LED current output (2.8mA to 44.8mA) (FCTL=high)
GPO1 (LED3), GPO2 (LED4), GPO3 (LED5) when GPO1 to GPO3 are used as the LED driver
• GPO output ×3
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
72011 SY 20080410-S00003 No.A1969-1/24
LV5223GR
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Maximum voltage
Symbol
max
Conditions
Ratings
Unit
V
V
5
CC
V1 max
LED pins, charge pump pin
6
40
V
Maximum output current
I
I
max 1
max 2
RLED1, GLED1, BLED1 and BLED2 pins
RLED2 and GLED2 pins
mA
mA
mW
°C
O
O
50
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
* Mounted on a circuit board
800
-30 to +80
Tstg
-40 to +125
°C
* Specified board: 40mm × 50mm × 0.8mm, glass epoxy board. (2S2P (4-layer board))
Operating Conditions at Ta = 25°C
Parameter
Supply voltage 1
Supply voltage 2
Symbol
Conditions
Ratings
Unit
V
V
3.0 to 5.0
1.65 to V
V
V
BAT
DD
BAT
Electrical Characteristics at Ta = 25°C, V
= 5.0V
CC
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Consumption current
Consumption current
I
I
I
1
2
3
V
+V
consumption current RESET:L
consumption current RESET:H in
consumption current
0
5
μA
μA
CC
CC
CC
BAT DD
(when reset)
V
+V
0.5
4
5.0
BAT DD
serial default
+V
V
mA
BAT DD
charge pump: ON
Oscillator block
Oscillator frequency
Charge pump block
Output voltage
Fosc
500
5.0
800
0.5
kHz
V
I
1
I
=30mA
O
4.8
5.2
1.0
V
O
Maximum current
Soft start time
1
200
mA
μs
V
=3.3V, V 1>4.3V
O
BAT
O
TSS
TSS=1/Fosc × 400 *1
LED driver block
Minimum output current value 1
I
1
3-color 1, 2 LED driver FCTL=L
0.2
mA
MIN
Serial data=#00 V =0.5V
O
Maximum output current value 1
Minimum output current value 2
Maximum output current value 2
ON resistance
I
1
3-color 1, 2 LED driver FCTL=L
15
1.8
16
2.8
44.8
5
17
3.8
mA
mA
mA
Ω
MAX
Serial data=#FF V =0.5V
O
RLED2, GLED2 pin LED driver FCTL=H
I
I
2
MIN
Serial data=#00 V =0.5V
O
RLED2, GLED2 pin LED driver FCTL=H
2
42.0
47.6
MAX
Serial data=#FF V =0.5V
O
GPO1(LED3), GPO2(LED4), GPO3(LED5) pins
RON1
When LED driver ON I =-40mA
L
Non-linearity error
LE1
3-color 1, 2 LED driver V =0.5V *2
O
-2
-2
2
2
LSB
LSB
%
Differential linearity error
Maximum output current
DLE1
ΔIL1
3-color 1, 2 LED driver V =0.5V *3
O
3-color LED driver 1, 2 FCTL=L
-10
Maximum current setting V =0.35V
O
ΔIL2
RLED2, GLED2 pin LED driver FCTL=H
-10
%
Maximum current setting V =0.45V
O
Leakage current
IL1
3-color LED driver 1, 2 & GPO(LED) × 3
1
μA
LED driver: OFF V =5V
O
Control circuit block
H level 1
V
V
V
V
V
H1
L1
H2
L2
H3
Input H level SCTL
1.3
0
V
V
V
V
V
IN
IN
IN
IN
IN
L level 1
Input L level SCTL
0.45
0.45
H level 2
Input H level FCTL
1.3
0
L level 2
Input L level FCTL
H level 3
Input H level serial signal input pin
V
× 0.8
DD
Continued on next page.
No.A1969-2/24
LV5223GR
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
× 0.2
DD
L level 3
H level 4
L level 4
H level 5
V
V
V
L3
H4
L4
Input L level serial signal input pin
Input H level RESET
0
1.5
0
V
V
V
V
V
IN
IN
IN
Input L level RESET
0.3
0.3
VHO5
Output H level GPO1 GPO2 GPO3 I =1mA
L
When output mode is set to buffer
V
– 0.3
DD
L level 5
VLO5
Output L level GPO1 GPO2 GPO3 I =-1mA
L
0
V
When output mode is set to buffer
*1. Soft start time: Interval from the time the charge pump is started until the time the charge pump output voltage reaches 5V.
*2. Non-linearity error: The difference between the actual and ideal current values.
*3. Differential linearity error: The difference between the actual and ideal increment when one low-order bi value is added.
Note) The LED current can be charged by changing the value of RT.
(Example: When RT = 10kΩ, V >0.945V and RGB1&2 LED current is set to 14.5mA, the RGB1&2 current can be set to flow at 14.5mA × 27kΩ /
O
10 kΩ = 39.15mA)
(When the value of RT has been reduced, adjust the oscillation frequency by increasing the value of CT.)
Package Dimensions
unit : mm (typ)
3357
TOP VIEW
3.5
SIDE VIEW
BOTTOM VIEW
(0.125)
(C0.09)
28
2
1
(0.55)
0.19
0.4
SIDE VIEW
SANYO : VCT28(3.5X3.5)
Pd max -- Ta
1.0
0.8
0.6
0.4
0.2
Specified board : 40.0 50.0 0.8mm3
×
×
4-layer glass epoxy(2S2P)
0.36
0
--30
0
20
40
60
80
100
Ambient temperature, Ta --
C
No.A1969-3/24
LV5223GR
Block Diagram & Pin arrangement drawing
V
BAT
21
20
19
18
17
16
15
V
SCTL
DD
22
23
24
25
26
27
28
14
13
12
11
10
9
470pF
Charge pump
TC
SCL
SDA
SGND
100pF
CT
RT
OSC
Sirial I/F
SV
GPO3(LED5)
BAT
IREF
GPO2(LED4)
GPO1(LED3)
RESET
RLED1
LED driver
8
1
2
3
4
5
6
7
Pin Descriptions
Protection
diode vs. V
Protection
Pin No.
Pin name
Description
diode vs. GND
BAT
1
LEDGND1
GLED1
GND pin1 for LED driver
GLED1 driver output pin
BLED1 driver output pin
RLED2 driver output pin
GND pin2 for LED driver
GLED2 driver output pin
BLED2 driver output pin
2
○
○
○
3
BLED1
4
RLED2
5
LEDGND2
GLED2
6
○
○
○
○
○
○
○
○
○
7
BLED2
8
GPO1(LED3)
GPO2(LED4)
GPO3(LED5)
RT
GPO1 output & LED3 driver output pin
GPO2 output & LED4 driver output pin
GPO3 output & LED5 driver output pin
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Standard current setting resistance connection pin
Serial data signal input pin
○
○
○
○
SDA
SCL
Serial clock signal input pin
V
Power supply pin
DD
PGND
C1B
GND pin for Charge pump
Flying capacitor connection pin B for charge pump
Power supply for charge pump
Flying capacitor connection pin A for charge pump
Output pin for charge pump
TEST pin
○
○
PV
BAT
C1A
○
○
○
○
○
○
OUT
TEST
FCTL
SCTL
TC
○
○
○
○
Strobe mode pin
3-color1 & 3-color2 LED driver external synchronous signal input pin
Charge pump phase amends pin
SGND
CT
GND pin for analog circuit
Setting of frequency of oscillator capacity connection pin
Supply voltage for analog circuit
○
○
SV
BAT
RESET
RLED1
RESET signal input pin
○
○
○
RLED1 driver output pin
No.A1969-4/24
LV5223GR
Pin Functions
Pin No.
Pin Name
Pin function
Equivalent Circuit
1
LEDGND1
GND pin1 for LED driver
2
3
GLED1
BLED1
RLED2
GLED2
BLED2
RLED1
LED driver pin for RGB1 and RGB2.
Feedback is applied so that the current flowing to the output
transistor becomes the set current level. When RT=27kΩ, the
driver output current levels can be independently adjusted from
approx. 0.5mA to 16mA in 0.5mA steps by serial setting. In the
strobe mode, the current levels can be independently adjusted
from 2.8mA to 44.8mA in 2.8mA steps for the RLED2 and GLED2
pins only.
4
6
7
28
5
LEDGND2
GND pin2 for LED driver
8
9
GPO1(LED3)
GPO2(LED4)
GPO3(LED5)
GPO output/LED driver shared pin. Output can be set to current
sink by serial setting or VDD or GND voltage can be output.
V
DD
10
11
RT
Reference current setting resistor connection pin. The reference
current is generated by connecting an external resistor to GND.
The pin voltage is approximately 0.65V. By changing this current
level, the oscillation frequency and LED driver current (3-color 1
and 3-color 2 only) can be changed.
SV
BAT
12
SDA
Serial data signal input pin
Serial clock signal input pin
Power supply pin
SV
V
BAT
DD
13
SCL
SV
V
BAT
DD
14
V
DD
SV
BAT
15
16
PGND
C1B
GND pin for Charge pump
Charge pump flying capacitor connection pin B
SV
BAT
This pin is connected to the clock driver side of the charge pump.
Continued on next page.
No.A1969-5/24
LV5223GR
Continued from preceding page.
Pin No.
Pin Name
Pin function
Power supply for charge pump
Equivalent Circuit
17
18
PV
BAT
C1A
Charge pump flying capacitor connection pin A
This pin is connected to the charge transfer driver side of the
charge pump.
PV
BAT
C1A
19
20
OUT
Output pin for charge pump
OUT
TEST
Test pin. This must always be connected to GND.
SV
BAT
21
22
FCTL
SCTL
FCTL: Strobe mode pin.
SV
BAT
SCTL: 3-color 1 and 3-color 2 LED driver external sync signal input
pin.
When this pin is not going to be used, it must be connected to GND
without fail.
23
TC
Charge pump phase compensation pin.
Stable operation of the charge pump is provided by connecting a
capacitor to this pin.
SV
BAT
24
25
SGND
CT
GND pin for analog circuit
Oscillator frequency setting capacitor connection pin.
The oscillation frequency can be changed by changing the
capacitance of the capacitor.
SV
BAT
26
27
SV
Supply voltage for analog circuit
BAT
RESET
RESET signal input pin.
Reset state at L.
SV
BAT
No.A1969-6/24
LV5223GR
Serial Bus Communication Specifications
1) I2C serial transfer timing conditions
twH
SCL
th1
twL
th2
tbuf
SDA
th1
ts2
ts1
ts3
ton
tof
Resend start condition
START condition
STOP condition
Input waveform condition
Standard mode
Parameter
Symbol
fsc1
ts1
Conditions
Min.
0
Typ.
Max.
Unit
kHz
μs
SCL clock frequency
SCL clock frequency
-
-
-
-
-
-
-
-
-
-
-
100
Data setup time
SCL setup time relative to the fall of SDA
SDA setup time relative to the rise of SCL
SCL setup time relative to the rise of SDA
SCL hold time relative to the fall of SDA
SDA hold time relative to the fall of SCL
SCL pulse width for the L period
SCL pulse width for the H period
SCL and SDA (input) rise time
4.7
250
4.0
4.0
0
-
ts2
-
ns
ts3
-
μs
Data hold time
Pulse width
th1
-
μs
th2
3.45
μs
twL
twH
ton
4.7
4.0
-
-
μs
-
μs
Input waveform
conditions
1000
300
-
ns
tof
SCL and SDA (input) fall time
-
ns
Bus free time
tbuf
Time between STOP condition and START
condition
4.7
μs
High-speed mode
Parameter
Symbol
fsc1
ts1
Conditions
Min.
0
Typ.
Max.
Unit
kHz
μs
SCL clock frequency
Data setup time
SCL clock frequency
-
-
-
-
-
-
-
-
-
-
-
400
SCL setup time relative to the fall of SDA
SDA setup time relative to the rise of SCL
SCL setup time relative to the rise of SDA
SCL hold time relative to the fall of SDA
SDA hold time relative to the fall of SCL
SCL pulse width for the L period
SCL pulse width for the H period
SCL and SDA (input) rise time
0.6
100
0.6
0.6
0
-
ts2
-
ns
ts3
-
μs
Data hold time
Pulse width
th1
-
μs
th2
0.9
μs
twL
twH
ton
1.3
0.6
-
-
μs
-
μs
Input waveform
conditions
300
300
-
ns
tof
SCL and SDA (input) fall time
-
ns
Bus free time
tbuf
Time between STOP and START conditions
1.3
μs
No.A1969-7/24
LV5223GR
2) I2C bus transfer method
Start and stop conditions
During data transfer operation using the I2C bus, SDA must basically be kept in constant state while SCL is “H” as
shown below.
SCL
SDA
ts2
th2
When data is not being transferred, both SCL and SDA are set in the “H” state.
When SCL=SDA is “H,” the start condition is established when SDA is changed from “H” to “L,” and access is started.
When SCL is “H,” the stop condition is established when SDA is changed from “L” to “H,” and access is ended.
STOP condition
START condition
SCL
SDA
ts3
th1
Data transfer and acknowledgement response
After the start condition has been established, the data is transferred one byte (8 bits) at a time.
Any number of bytes of data can be transferred continuously.
Each time the 8-bit data is transferred, the ACK signal is sent from the receive side to the send side. The ACK signal is
issued when SDA on the send side is released and SDA on the receive side is set to “L” immediately after fall of the
clock pulse at the SCL eighth bit of data transfer to “L.”
When the next 1-byte transfer is left in the receive state after sending the ACK signal from the receive side, the receive
side releases SDA at the fall of the SCL ninth clock.
In the I2C bus, there is no CE signal. In its place, a 7-bit slave address is assigned to each device, and the first byte of
transfer is assigned to the command (R/W) representing the 7-bit address and subsequent transfer direction. Note that
only write is valid in this IC. The 7-bit address is transferred sequentially starting with MSB, and the eighth bit is set to
“L” which indicates a write.
In the LV5223GP the slave address is specified as "1110101"
L
S
B
A
C
K
M
S
B
M
S
B
L
S
B
L
S
B
A
C
K
A
C
K
M
S
B
Resistor address
Slave address
Data
Stop
Start
W
SCL
SDA
No.A1969-8/24
LV5223GR
Serial mode setting
ADDRESS : 00h
D7
D6
G2SW
0
D5
R2SW
0
D4
B1SW
0
D3
G1SW
0
D2
R1SW
0
D1
CPSW
0
D0
STBY
0
resister name
default
B2SW
0
D0
0
STBY
STBY setting
*Default
Standby
Active
1
LED operation enabled by releasing STBY (LED can be operated by another power supply
D1
0
CPSW
OFF
ON
Charge pump ON/OFF setting
*Default
1
D2
0
R1SW
OFF
ON
RLED1 output setting
*Default
1
D3
0
G1SW
OFF
ON
GLED1 output setting
*Default
1
D4
0
B1SW
OFF
ON
BLED1 output setting
*Default
1
D5
0
R2SW
OFF
ON
RLED2 output setting
*Default
1
D6
0
G2SW
OFF
ON
GLED2 output setting
*Default
1
D7
0
B2SW
OFF
ON
BLED2 output setting
*Default
1
No.A1969-9/24
LV5223GR
ADDRESS : 01h
D7
SCTEN1
0
D6
-
D5
-
D4
R1[4]
0
D3
R1[3]
0
D2
R1[2]
0
D1
R1[1]
0
D0
R1[0]
0
resister name
default
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
RLED1 current value setting
*Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
D7
0
SCTEN1
RGB1 SCTL valid
RGB1 SCTL non valid
RGB1 SCTL signal enable
*Default
1
No.A1969-10/24
LV5223GR
ADDRESS : 02h
D7
-
D6
-
D5
-
D4
G1[4]
0
D3
G1[3]
0
D2
G1[2]
0
D1
G1[1]
0
D0
G1[0]
0
resister name
default
0
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
GLED1 current value setting
*Default
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
No.A1969-11/24
LV5223GR
ADDRESS : 03h
D7
-
D6
-
D5
-
D4
B1[4]
0
D3
B1[3]
0
D2
B1[2]
0
D1
B1[1]
0
D0
B1[0]
0
resister name
default
0
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
BLED1 current value setting
*Default
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
No.A1969-12/24
LV5223GR
ADDRESS : 04h
D7
SCTEN2
0
D6
-
D5
-
D4
R2[4]
0
D3
R2[3]
0
D2
R2[2]
0
D1
R2[1]
0
D0
R2[0]
0
resister name
default
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
RLED2 current value setting
*Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
D7
0
SCTEN2
RGB2 SCTL valid
RGB2 SCTL non valid
RGB2 SCTL signal enable
*Default
1
No.A1969-13/24
LV5223GR
ADDRESS : 05h
D7
-
D6
-
D5
-
D4
G2[4]
0
D3
G2[3]
0
D2
G2[2]
0
D1
G2[1]
0
D0
G2[0]
0
resister name
default
0
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
GLED2 current value setting
*Default
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
No.A1969-14/24
LV5223GR
ADDRESS : 06h
D7
-
D6
-
D5
-
D4
B2[4]
0
D3
B2[3]
0
D2
B2[2]
0
D1
B2[1]
0
D0
B2[0]
0
resister name
default
0
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
current value (mA)
0.5
BLED2 current value setting
*Default
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
No.A1969-15/24
LV5223GR
ADDRESS : 07h
D7
-
D6
-
D5
FOUT1[2]
0
D4
FOUT1[1]
0
D3
FOUT1[0]
0
D2
FIN1[2]
0
D1
FIN1[1]
0
D0
FIN1[0]
0
resister name
default
0
0
D2
0
D1
0
D0
0
FIN1
RGB1 FIN slope setting
*Default
No slope
Slope 1/32
1/16
0
0
1
0
1
0
0
1
1
1/8
1
0
0
1/4
1
0
1
1/2
1
1
0
3/4
1
1
1
Max slope
Max. slope is 1/2 of automatic ON/OFF period of RGB1
D5
0
D4
0
D3
0
FOUT1
No slope
Slope 1/32
1/16
RGB1 FOUT slope setting
*Default
0
0
1
0
1
0
0
1
1
1/8
1
0
0
1/4
1
0
1
1/2
1
1
0
3/4
1
1
1
Max slope
Max. slope is 1/2 of automatic ON/OFF period of RGB1
ADDRESS : 08h
D7
-
D6
D5
FOUT2[2]
0
D4
FOUT2[1]
0
D3
FOUT2[0]
0
D2
FIN2[2]
0
D1
FIN2[1]
0
D0
FIN2[0]
0
resister name
default
-
0
0
D2
0
D1
0
D0
0
FIN2
RGB2 FIN slope setting
*Default
No slope
0
0
1
Slope 1/32
1/16
0
1
0
0
1
1
1/8
1
0
0
1/4
1
0
1
1/2
1
1
0
3/4
1
1
1
Max slope
Max. slope is 1/2 of automatic ON/OFF period of RGB2
D5
0
D4
0
D3
0
FOUT2
No slope
Slope 1/32
1/16
RGB2 FOUT slope setting
*Default
0
0
1
0
1
0
0
1
1
1/8
1
0
0
1/4
1
0
1
1/2
1
1
0
3/4
1
1
1
Max slope
Max. slope is 1/2 of automatic ON/OFF period of RGB2
No.A1969-16/24
LV5223GR
ADDRESS : 09h
D7
-
D6
-
D5
SYNC
0
D4
GR1M1
0
D3
GRON1
0
D2
AT1[2]
0
D1
AT1[1]
0
D0
AT1[0]
0
resister name
default
0
0
D2
0
D1
0
D0
0
AT1
RGB1 automatic ON/OFF function setting
*Default
0.262sec
0.524sec
1.049sec
2.097sec
4.194sec
8.389sec
-
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
×
D3
0
GRON1
OFF
RGB1 automatic ON/OFF function setting
*Default
1
ON
D4
0
GR1M1
OFF
RGB1 is executed one time of the gradation.
*Default
1
ON
D5
0
SYNC
OFF
ON
Automatic operation ON/OFF cycle and the gradation.
execution setting of RGB2 are done as well as RGB1
*Default
1
ADDRESS : 0ah
D7
-
D6
D5
-
D4
GR1M2
0
D3
GRON2
0
D2
AT2[2]
0
D1
AT2[1]
0
D0
AT2[0]
0
resister name
default
-
0
0
0
D2
0
D1
0
D0
0
AT2
RGB2 automatic ON/OFF function setting
*Default
0.262sec
0.524sec
1.049sec
2.097sec
4.194sec
8.389sec
-
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
×
D3
0
GRON1
OFF
RGB2 automatic ON/OFF function setting
*Default
1
ON
D4
0
GR1M1
OFF
RGB2 is executed one time of the gradation.
*Default
1
ON
No.A1969-17/24
LV5223GR
ADDRESS : 0bh
D7
-
D6
-
D5
R1Aoff[5]
0
D4
R1Aoff[4]
0
D3
R1Aoff[3]
0
D2
R1Aoff[2]
0
D1
R1Aoff[1]
0
D0
R1Aoff[0]
0
resister name
default
0
0
D5-0 RLED1 automatic OFF position setting (default: ALL0)
ADDRESS : 0ch
D7
-
D6
-
D5
R1Aon[5]
0
D4
R1Aon[4]
0
D3
R1Aon[3]
0
D2
R1Aon[2]
0
D1
R1Aon[1]
0
D0
R1Aon[0]
0
resister name
default
0
0
D5-0 RLED1 automatic OFF position setting (default: ALL0)
When R1Aon=R1Aoff, all the periods off.
LED control output waveform (RLED1). Same for GLED1, BLED1, GLED2, GLED2 and BLED2
When D5 to D0 ALL0: Clock 0 rise position.
When D5 to D0 ALL1: Clock 63 rise position.
R1on R1Aon[5:0]=000000(00h)
For R1off R1Aoff[5:0]=000101(05h)
64 counts
CLK for gradation
4
5
3
2
0
1
63
0
59 counts
5 counts
RLED1
OFF period
ON period
R1on
R1off
ADDRESS : 0dh
D7
D6
-
D5
D4
D3
G1Aoff[3]
0
D2
D1
D0
G1Aoff[0]
0
resister name
default
-
G1Aoff[5]
0
G1Aoff[4]
0
G1Aoff[2]
0
G1Aoff[1]
0
0
0
D5-0 GLED1 automatic OFF position setting (default: ALL0)
ADDRESS : 0eh
D7
-
D6
-
D5
G1Aon[5]
0
D4
G1Aon[4]
0
D3
G1Aon[3]
0
D2
G1Aon[2]
0
D1
G1Aon[1]
0
D0
G1Aon[0]
0
resister name
default
0
0
D5-0 GLED1 automatic OFF position setting (default: ALL0)
When G1Aon=G1Aoff, all the periods off.
No.A1969-18/24
LV5223GR
ADDRESS : 0fh
D7
-
D6
-
D5
B1Aoff[5]
0
D4
B1Aoff[4]
0
D3
B1Aoff[3]
0
D2
B1Aoff[2]
0
D1
B1Aoff[1]
0
D0
B1Aoff[0]
0
resister name
default
0
0
D5-0 BLED1 automatic OFF position setting (default: ALL0)
ADDRESS : 10h
D7
-
D6
-
D5
B1Aon[5]
0
D4
B1Aon[4]
0
D3
B1Aon[3]
0
D2
B1Aon[2]
0
D1
B1Aon[1]
0
D0
B1Aon[0]
0
resister name
default
0
0
D5-0 BLED1 automatic OFF position setting (default: ALL0)
When B1Aon=B1Aoff, all the periods off.
ADDRESS : 11h
D7
-
D6
-
D5
R2Aoff[5]
0
D4
R2Aoff[4]
0
D3
R2Aoff[3]
0
D2
R2Aoff[2]
0
D1
R2Aoff[1]
0
D0
R2Aoff[0]
0
resister name
default
0
0
D5-0 RLED2 automatic OFF position setting (default: ALL0)
ADDRESS : 12h
D7
-
D6
-
D5
R2Aon[5]
0
D4
R2Aon[4]
0
D3
R2Aon[3]
0
D2
R2Aon[2]
0
D1
R2Aon[1]
0
D0
R2Aon[0]
0
resister name
default
0
0
D5-0 RLED2 automatic OFF position setting (default: ALL0)
When R2Aon=R2Aoff, all the periods off.
ADDRESS : 13h
D7
-
D6
-
D5
G2Aoff[5]
0
D4
G2Aoff[4]
0
D3
G2Aoff[3]
0
D2
G2Aoff[2]
0
D1
G2Aoff[1]
0
D0
G2Aoff[0]
0
resister name
default
0
0
D5-0 GLED2 automatic OFF position setting (default: ALL0)
ADDRESS : 14h
D7
-
D6
-
D5
G2Aon[5]
0
D4
G2Aon[4]
0
D3
G2Aon[3]
0
D2
G2Aon[2]
0
D1
G2Aon[1]
0
D0
G2Aon[0]
0
resister name
default
0
0
D5-0 GLED2 automatic OFF position setting (default: ALL0)
When G2Aon=G2Aoff, all the periods off.
No.A1969-19/24
LV5223GR
ADDRESS : 15h
D7
-
D6
-
D5
B2Aoff[5]
0
D4
B2Aoff[4]
0
D3
B2Aoff[3]
0
D2
B2Aoff[2]
0
D1
B2Aoff[1]
0
D0
B2Aoff[0]
0
resister name
default
0
0
D5-0 BLED2 automatic OFF position setting (default: ALL0)
ADDRESS : 16h
D7
-
D6
-
D5
B2Aon[5]
0
D4
B2Aon[4]
0
D3
B2Aon[3]
0
D2
B2Aon[2]
0
D1
B2Aon[1]
0
D0
B2Aon[0]
0
resister name
default
0
0
D5-0 BLED2 automatic OFF position setting (default: ALL0)
When B2Aon=B2Aoff, all the periods off.
ADDRESS : 17h
D7
GTO3EN
0
D6
GPO2EN
0
D5
GPO1EN
0
D4
-
D3
-
D2
GPO3
0
D1
GPO2
0
D0
GPO1
0
resister name
default
0
0
D0
0
GPO1
GPO1(LED3) output setting
*Default
GPO1 (LED3) output: Open when GPO1EN=0, low when GPO1EN=1
1
GPO1 (LED3) output: LED-Drv ON when GPO1EN=0, high when GPO1EN=1
D1
0
GPO2
GPO2(LED4) output setting
*Default
GPO2 (LED4) output: Open when GPO2EN=0, low when GPO2EN=1
GPO2 (LED4) output: LED-Drv ON when GPO2EN=0, high when GPO2EN=1
1
D2
0
GPO3
GPO3(LED5) output setting
*Default
GPO3 (LED5) output: Open when GPO3EN=0, low when GPO3EN=1
GPO3 (LED5) output: LED-Drv ON when GPO3EN=0, high when GPO3EN=1
1
D5
0
GPO1EN
GPO1(LED3) output
Setting for using GPO or LED-Drv
When GPO1 (LED3) output is used as LED-Drv
When GPO1 (LED3) output is used as GPO
1
*Default
D6
0
GPO2EN
GPO2(LED4) output
Setting for using GPO or LED-Drv
*Default
When GPO2 (LED4) output is used as LED-Drv
When GPO2 (LED4) output is used as GPO
1
D7
0
GPO3EN
GPO3(LED5) output
Setting for using GPO or LED-Drv
*Default
When GPO3 (LED5) output is used as LED-Drv
When GPO3 (LED5) output is used as GPO
1
*GPO1EN must be set to 1 without fail when the GPO1 (LED3) pin is to be used as GPO.
When GPO1EN is set to 1, do not apply a voltage higher than the V
The same applies to the GPO2 (LED4) and GPO3 (LED5) pins.
voltage to the GPO1 (LED3) pin.
DD
No.A1969-20/24
LV5223GR
ADDRESS : 18h
D7
FCTENR2
0
D6
-
D5
-
D4
-
D3
FCTR2[3]
0
D2
FCTR2[2]
0
D1
FCTR2[1]
0
D0
FCTR2[0]
0
resister name
default
0
0
0
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Current value(mA)
Strobe mode: RLED2 current level established when FCTL is high.
*Default
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2.8
5.6
8.4
11.2
14.0
16.8
19.6
22.4
25.2
28.0
30.8
33.6
36.4
39.2
42.0
44.8
D7
0
FCTENR2
RLED2 FCTL signal enable
*Default
FCTL non valid
FCTL valid
1
ADDRESS : 19h
D7
D6
D5
-
D4
-
D3
D2
FCTG2[2]
0
D1
FCTG2[1]
0
D0
FCTG2[0]
0
resister name
default
FCTENG2
0
-
FCTG2[3]
0
0
0
0
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Current value(mA)
Strobe mode: GLED2 current level established when FCTL is high.
*Default
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2.8
5.6
8.4
11.2
14.0
16.8
19.6
22.4
25.2
28.0
30.8
33.6
36.4
39.2
42.0
44.8
D7
0
FCTENG2
GLED2 FCTL signal enable
*Default
FCTL non valid
FCTL valid
1
No.A1969-21/24
LV5223GR
Precautions for serial transmission and usage note
* ON operation of the charge pump must be performed when the LED is off.
* Do not turn ON the LED for 800µs typ. (soft start time) after the charge pump has been turned on.
* When the fade operation of LED is performed, turn off the charge pump after the fade-out has been completed.
* Gradation level must be selected without fail when gradation is OFF.
* When the charge pump is operating, use the LED driver in such a way that the total current flowing to the LEDs.
* Even in the strobe mode (FCTL=H), the gradation operation is performed for RLED2 and GLED2 when RLED2 and
GLED2 are set to gradation ON.
* Even in the strobe mode (FCTL=H), current flows to RLED2 and GLED2 in synchronization with the SCTL signal
when SCTL is valid.
* When the LED pins are not to be used
When LEDs are not connected to the LED pins, connect the LED driver pins to VBAT or GND.
* Precaution when using the SCTL pin or FCTL pin
When the SCTL pin or FCTL pin is set to high, current flows to the SCTL or FCTL input circuit.
(This is also true in the STBY or reset mode.)
When the pin is not going to be used, it must be set to low without fail.
* By default, the GP01 (LED3) pin is left open.
When the GP01 (LED3) pin is to be set high by default, connect a pull-up resistor to the pin.
Conversely, when the GP01 (LED3) pin is to be set low by default, connect a pull-down resistor to the pin.
Connect pull-up or pull-down resistors to the GP02 (LED4) and GP03 (LED5) pins as well in the same way.
No.A1969-22/24
LV5223GR
LV5223GR serial map
• Table upper row: Register name
Table the lower: Default value
Register address
data
D4
A7
0
A6
0
A5
0
A4
0
A3
0
A2
0
A1
0
A0
0
D7
D6
D5
D3
G1SW
0
D2
D1
CPSW
0
D0
STBY
0
B2SW
G2SW
R2SW
B1SW
0
R1SW
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0ah
0bh
0ch
0dh
0eh
0fh
0
0
0
×
0
×
0
×
0
×
0
×
0
×
0
0
SCTEN1
×
R1[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
×
×
G1[4:0]
0
0
0
B1[4:0]
0
×
×
0
0
×
×
R2[4:0]
0
0
0
×
×
G2[4:0]
0
0
0
×
×
B2[4:0]
0
0
0
0
0
×
×
FOUT1[2:0]
FIN1[2:0]
0
0
0
0
0
0
0
0
0
×
×
FOUT2[2:0]
FIN2[2:0]
0
0
0
0
GR1M1
0
0
0
×
×
SYNC
GRON1
AT1[2:0]
0
0
0
×
0
0
GRON2
0
0
AT2[2:0]
0
×
×
GR1M2
0
0
0
×
×
R1Aoff[5:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
×
×
R1Aon[5:0]
0
0
0
×
×
G1Aoff[5:0]
0
0
0
×
×
G1Aon[5:0]
0
0
0
×
×
B1Aoff[5:0]
0
0
0
×
×
B1Aon[5:0]
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
0
0
0
×
×
R2Aoff[5:0]
0
0
0
×
×
R2Aon[5:0]
0
0
0
×
×
G2Aoff[5:0]
0
0
0
×
×
G2Aon[5:0]
0
0
0
×
×
B2Aoff[5:0]
0
0
0
×
×
B2Aon[5:0]
0
0
0
0
0
×
0
GPO2
0
0
GPO1
0
GPO3EN
GPO2EN
GPO1EN
×
GPO3
0
0
0
×
0
×
0
0
×
0
×
0
0
0
FCTENR2
×
FCTR2[3:0]
0
FCTENG2
0
0
0
0
0
0
0
0
×
0
0
0
Register address
Data
No.A1969-23/24
LV5223GR
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of July, 2011. Specifications and information herein are subject
to change without notice.
PS No.A1969-24/24
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