SKHI21H4 [SEMIKRON]
Buffer/Inverter Based Peripheral Driver, 3.3A, Hybrid;
| 型号： | SKHI21H4 |
| 厂家： | 
SEMIKRON INTERNATIONAL |
| 描述： | Buffer/Inverter Based Peripheral Driver, 3.3A, Hybrid 驱动 接口集成电路 |
| 文件： | 总9页 (文件大小：353K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMIDRIVER
Absolute Maximum Ratings
Symbol Term
Value
18
Unit
V
Hybrid Double IGBT and
MOSFET Driver
SKHI 21, SKHI 21 H4
SKHI 22, SKHI 22 H4
VS
Supply voltage prim.
ViH
IiH
IGon
IGoff
Input signal voltage (HIGH) max.
Input signal current (HIGH)
Output current (peak) max.
Output current (peak) max.
VS + 0,3
0,34
3,3
V
mA
A
3,3
A
mA
IoutAVmax Output average current SKHI21/SKHI22 + 406)/+ 206)
VCE
Collector-emitter voltage sense
across the IGBTSKHI21/SKHI22
1200 / 1700
25 1)
V
dv/dt
Visol IO
Visol12
Rate of rise and fall of voltage
secondary to primary side
kV/µs
Isolation test volt. IN-OUT (RMS; 1min.)
input-output Version “H4": (1min.)
Isolation test voltage
2500
4000
V
V
output 1-output 2 (RMS; 1min.)
1500
V
Top
Tstg
Operating temperature
Storage temperature
– 40 ... + 85
– 40 ... + 85
°C
°C
Features
Electrical Characteristics
Value
SKHI 21/ 22
•
Double driver for half bridge mo-
dules
Symbol Term
Unit
V
•
•
•
•
SKHI 22 H4 is for 1700 V-IGBT
Drives MOSFETs VDS(on) < 10 V
CMOS compatible inputs
Short circuit protection by VCE
monitoring and switch off
Drive interlock top/bottom
Isolation by transformers
Supply undervoltage protection
(13 V)
VS
Supply voltage primary side
15 ± 0,6
160
typ.75/typ.110
12,9
IS
Iso
ViT+
Supply current primary side max
Supply current primary side no load
Input threshold voltage (HIGH) min.
Input threshold voltage (LOW) max.
Turn-on gate voltage output
Turn-off gate voltage SKHI 21/SKHI 22
Operating frequency IGBT/MOS
Coupling capacitances
Input-output turn-on propagation time
Input-output turn-off propagation time
Error input-output propagation time
Reference voltage for VCE monitoring 5) typ. 6; max. 9
mA
mA
V
ViT–
VG(on)
VG(off)
f
2,1
15
0/– 15
V
V
V
•
•
•
→ page B14-28
see fig. 3
typ. 1 + tTD
typ. 1
•
Error latch/output
Cps..
td(on) io
td(off) io
td(err)
VCEstat
pF
µs
µs
µs
V
Typical Applications
•
Driver for IGBT and MOSFET
modules in bridge circuits in
choppers, inverter drives, UPS
and welding inverters
typ. 1
•
DC bus voltage up to 1000 V.
External Components see fig. 1 and fig. 4
1)
Component
Function
Recommended
value
Primary/OUT2 =
10kV/µs +900 V
RTD
Dead time of interlock:
0 2)
2)
3)
Short circuit for tTD = 2,7 µs
Higher resistance reduces free-
wheeling diode peak recovery
current, increases IGBT turn-on
time. RON should be chosen so
that the turn-on delay time td(on)
does not exceed 1 µs. See also
Fig. 10
Higher resistance reduces turn-
off voltage spike, increases turn-
off time and turn-off power
dissipation. See also Fig. 10.
adjustable by RCE
t
TD (µs) = 2,7 + 0,13
Reference voltage for VCE monitoring:
CE (kΩ) – 25
10 + RCE (kΩ)
R
TD (kΩ)
RTD max.=100 kΩ
RCE
RCE = 24 kΩ
min. 10 kΩ
9
R
V
CEstat (V) =
(1) VCEstat = 5,6 V
max. 9 V
CCE
Inhibit time for VCE monitoring:
CCE = 0,33 nF
4)
max. 2,7 nF
tmin = 1,75 µs
max. 10 µs
15–VCEstat (V)
t
min = τCE In
(2)
(3)
10 – VCEstat (V)
10 RCE (kΩ)
10 + RCE (kΩ)
5)
6)
τ
CE (µs) = CCE (nF)
τCE = 2,3 µs
double when using half driver
RON
ROFF
Turn-on speed of the IGBT 3)
Turn-off speed of the IGBT 4)
min. 3,3 Ω
min. 3,3 Ω
© by SEMIKRON
0896
B 14 – 21
© by SEMIKRON
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B 14 – 23
SEMIDRIVER SKHI 21 and SKHI 22
Hybrid Double IGBT and MOSFET Driver
Technical Explanations
The following explanations apply to the use of the hybrid
driver for power MOSFETs as well as for IGBTs. For the
reason of brevity, in the following the IGBTs are mentioned
only. Also the designations “collector” and “emitter” apply
to IGBTs. For the MOSFETs “drain” and “source” are to be
read instead.
9. The nominal voltage of the power supply VS is +15 V.
Its band of variation is from 14,4 to 15,6 V. The current
required is lower than 160 mA (conditions: 85 °C
temperature, VS = 15 V. Any undervoltage below +13
V is monitored, and the IGBTs are turned off. An error
signal is released. Overvoltage is not monitored. (See
page B 14 – 28).
A. Properties and Functions of the Hybrid Driver
10. The switching signals are transmitted by isolating pulse
transformers. The isolation test voltages are Visol IO and
Visol12, abs. max. ratings see page 1. Versions “H4"
1. The hybrid driver comprises the pulse generator as well
as short circuit protection for two IGBTs in half bridge
(pair of arms) connection. If a single IGBT or MOSFET
is driven, output 1 is to be used, and the terminal VCE2
(S1) of output 2 is to be connected to terminal E2 (S9).
have Visol IO = 4,0 kVRMS
.
The max. dv/dt rating between primary and secondary
side is 25 kV/µs (Primary/OUT 1) and 10 kV/µs + 900 V
(Primary/OUT 2).
2. It may also be used for two power MOSFETs in half
bridge connection, provided the drain-source voltage in
the on-state does not exceed 10 V.
11. The input and output signals are CMOS compatible.
The inputs have a Schmitt trigger characteristic to
suppress spurious pulses. Turn-on and turn-off pulses
shorter than 0,5 µs are not transmitted. The thresholds
of the inputs are
3. Short circuit protection is provided by measuring the
collector-emitter voltage, turns “error” (pin P10) to “Low”
< 0,7 V (I sink < 4 mA).
4. The heatsink temperature may be monitored by a
bimetal thermal trip connected between P10 “error” and
“GND”. It turns on, when the rated temperature is
exceeded. Carefully regard the isolation voltage of the
bimetal trip contacts and the different ground potentials
of heatsink and pcb’s.
+
VT- = min. 12,9 V
VT = max. 2,1 V
12. The maximum pulse frequency is 100 kHz (for MOS)
13. The operating temperature range is – 40 ... + 85 °C.
5. The IGBTs are turned on by applying a positive
gate-emitter voltage of 15 V, and turned off by
connecting (SKHI 21)the gate with the emitter or (SKHI
22) with – 15 V against the emitter (pin S12 resp. S9).
The gate is low-ohmic connected with the emitter as
long as the IGBT has to remain in the off-state and as
long as the supply voltage is present. In case of a failure
of the supply voltage the gate-emitter connection is
provided by a 22 kΩ resistor.
14. The typical delay times and propagation times for
signals are
Turn-on:
Turn-off:
Error:
1 µs + tTD
1 µs
1 µs
input to output
input to output
error input to error signal
output
15. In order to optimize the turn-on and turn-off speeds
external resistors may be connected according to the
conditions of the given application.
6. The hybrid driver comprises the auxiliary power
supplies for the two boosters which are isolated by
DC/DC converters.
16. The collectors of the IGBTs are connected to the hybrid
driver for monitoring the collector-emitter voltage VCE
.
17. The required inhibit time tmin of the VCE monitoring is to
be matched to the turn-on speed of the IGBT. The
standard setting with the recommended external
7. The two IGBTs of the half bridge are interlocked in order
to prevent them from being in the on-state
simultaneously. The locking time between the turn-off
signal for one IGBT and the release of the turn-on signal
for the other one is typically 2,7 µs (> tdoff). It may be
components RCE = 24 kΩ and CCE = 330 pF is τCE
=
2,3 µs. It may be increased by an external capacitor.
The threshold voltage may be set by the external
resistor RCE up to maximum < 10 V.
prolonged by external resistors: RTD
.
8. In the case of a short circuit both IGBTs are turned off
immediately. An error memory prevents the IGBTs
from being turned on again. The status of this memory
may be fed back to the control circuit (error signal). The
error memory is reset only when both input signals are
zero. The error signal is provided by an open collector
stage at pin 10 with an internal pull-up resistor of 10 kΩ
to Vs. Parallel connection of error signal outputs is
possible.
B. Description of the Circuit Block Diagram
The circuit block diagram (Fig. 1) shows the input on the
left and the output on the right.
The input side comprises the following components:
1. Input Schmitt trigger, CMOS compatible
B 14 – 24
0896
© by SEMIKRON
2. Interlock circuit
9. Pulse transformer
The interlock circuit prevents the IGBT to turn on before
the gate charge of the other IGBT is completely
discharged. It is to be set to a delay time longer than
the turn-off time of the IGBT by two external resistors
RTD (maximum permissible value 100 kΩ) connected to
the terminals RTD and VS. The delay time tTD is typically:
It transmits the turn-on and turn-off signals for the IGBT.
In the reverse direction the error signal from the VCE
monitoring is transmitted via the same transformer.
10. Power supply transformer for the DC/DC converter
11. Rectifier for the auxiliary power supply
12. Flip-flop
.
tTD (µs) = 2,7 + 0,13 RTD (kΩ)
See also Fig. 5.
(4)
The flip-flop is pulse width triggered and is insensitive
to spurious pulses and high dv/dt values.
3. Short pulse suppression
13. Drivers
With very short turn-on or turn-off pulses the pulse
transformer would be not completely re-magnetized,
and the coupling capacitor at the input of the pulse
transformer would be not completely re-charged. As a
result, the flip-flop at the output of the driver would
remain in the wrong state due to the unsufficient trigger
pulse. The short pulse suppression makes sure that
only adequate trigger pulses are transmitted to the
output flip-flop.
The output transistors of the power drivers are
MOSFETs.
The sources of these MOSFETs are connected to
external terminals in order to provide the setting of the
turn-on and turn-off speed by the external resistors RON
and ROFF. Do not connect the terminals S7 with S8,
respectively S13 with S14, and use both, Ron and Roff
to avoid spurious switch-on effects.
,
4. Error monitoring
14. Reverse drivers for the pulse transformers
This circuit monitors pulses fed backwards via the pulse
transformers.
They transmit the signals from the VCE monitoring to the
pulse transformers.
5. Inhibit pulse generator
15. VCE monitoring
In the error monitoring circuit, an inhibit pulse generator
discriminates between switching and error signals.
After any positive switching pulse edge the error
monitoring function is enabled. This is required since
the pulse transformer causes a negative peak voltage
on its primary during re-magnetization. This peak
voltage would trigger the error monitoring without the
inhibit pulse.
It monitors the collector-emitter voltage VCE of the IGBT
during its on-state. VCE is limited internally to 10 V (see
fig. 4).
If the reference voltage VCEref is exceeded, the output
signal switches to zero. VCEref is dynamic. Immediately
after turn-on of the IGBT a higher value is effective than
in the steady state. When the IGBT is turned off, VCEref
is set to this higher value by the signal “reset”. The
steady-state value VCEstat of VCEref is set for each IGBT
by an external resistor RCE (connected to the terminals
CCE and E) to the required maximum value (which may
not exceed 10 V).
6. Error memory
The error memory is triggered by the error monitoring
circuit. The error memory blocks the turn-on pulses to
both IGBTs simultaneously. Resetting is only possible
when no pulses from the error monitoring are present
and both inputs (on/off) are zero. The output signal is
fed to a terminal which is to be connected to the control
circuit.
VCEstat as a function of RCE is approximately:
9
R
CE (kΩ) – 25
VCEstat (V) =
(1)
10
+ RCE (kΩ)
7. 1 MHz Oscillator
The time constant for the delay of VCEref may be
increased by an external capacitor CCE, which is
connected in parallel to RCE. It controls the time tmin
which passes after turn-on of the IGBT before the VCE
monitoring is activated. After tmin the VCE monitoring
functions immediately when VCEref is exceeded.
It is the primary side control of the DC/DC converter for
transmitting the control power to the IGBTs.
8. Power supply monitoring
The supply voltage VS is monitored for its minimum
value of 13 V. If it falls below this value an error is
monitored and the turn-on pulses for the IGBTs are
blocked.
At initial switch-on (VS) the input pulses may only be
released more than 4 µs after the instant when VS has
reached its nominal value of 15 V.
The standard setting with the external components RCE
= 24 kΩ and CCE = 330 pF is tmin = 1,75 µs.
15 –
10 – VCEstat
V
CEstat(V)
tmin = τCE ln
(2)
(3)
(V)
10
RCE (kΩ)
τ
CE (µs) = CCE (nF)
10 + RCE (kΩ)
V
CEstat is the value given by equation (1).
The output comprises two drivers with the following com-
ponents:
© by SEMIKRON
0896
B 14 – 25
B 14 – 26
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© by SEMIKRON
© by SEMIKRON
0896
B 14 – 27
B 14 – 28
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© by SEMIKRON
SEMIDRIVER SKHI 22 on PCB SKPC 2006
B 14 – 20
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© by SEMIKRON
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