SC1211VXSTRT [SEMTECH]
High Speed, Combi-Sense㈢, Synchronous MOSFET Driver for Mobile Applications; 高速,组合式Sense㈢ ,为移动应用程序同步MOSFET驱动器![SC1211VXSTRT](http://pdffile.icpdf.com/pdf1/p00118/img/icpdf/SC1211VX_644859_icpdf.jpg)
型号: | SC1211VXSTRT |
厂家: | ![]() |
描述: | High Speed, Combi-Sense㈢, Synchronous MOSFET Driver for Mobile Applications |
文件: | 总11页 (文件大小:295K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SC1211VX
High Speed, Combi-Sense®, Synchronous
MOSFET Driver for Mobile Applications
POWER MANAGEMENT
Features
Description
The SC1211VX is a high speed, Combi-Sense®, dual out- ꢀ High efficiency
put driver designed to drive high-side and low-side
MOSFETs in a synchronous Buck converter. These
drivers combined with Combi-Sense® PWM controllers,
such as Semtech SC2643VX or SC2643, provide a
cost effective multi-phase voltage regulator for advanced
microprocessors.
ꢀ High peak drive current
ꢀ Adaptive non-overlapping gate drives provide
shoot-through protection
ꢀ Support Combi-Sense® and VID-on-fly operations
ꢀ Fast rise and fall times (15ns typical with 3000pf
load)
ꢀ Ultra-low (<30ns) propagation delay (BG going low)
ꢀ Floating top gate drive
ꢀ Crowbar function for over voltage protection
ꢀ High frequency (to 1.5 MHz) operation allows use
of small inductors and low cost ceramic capacitors
ꢀ Under-voltage-lockout
The Combi-Sense® is a technique to sense the inductor
current for peak current mode control of voltage regula-
tor without using sensing resistor. It provides the follow-
ing advantages:
- No costly precision sensing resistor
- Lossless current sensing
ꢀ Low quiescent current
- High level noise free signal
- Fast response
ꢀ Power SOIC-8L package, fully RoHS and WEEE
compliant
- Suitable for wide range of duty cycle
- Only two small signal components (third optional)
The detailed explanation of the technique can be found
in the Applications Information section.
Applications
A 30ns max propagation delay from input transition to
the gate of the power FET’s guarantees operation at high
ꢀ Intel Pentium® processor power supplies
switching frequencies. Internal overlap protection circuit ꢀ AMD AthlonTM and AMD-K8TM processor power
prevents shoot-through from Vin to PGND in the main
and synchronous MOSFETs. The adaptive overlap pro-
tection circuit ensures the bottom FET does not turn on
until the top FET source has reached 1V, to prevent cross-
conduction.
supplies
ꢀ High efficiency portable and notebook computers
ꢀ Battery powered applications
ꢀ High current low voltage DC-DC converters
High current drive capability allows fast switching, thus
reducing switching losses at high (up to 1.5MHz) frequen-
cies without causing thermal stress on the driver.
Under-voltage-lockout and over-temperature shutdown
features are included for proper and safe operation.
Timed latches and improved robustness are built into
the housekeeping functions such as the Under Voltage
Lockout and adaptive Shoot-through protection circuitry
to prevent false triggering and to assure safe operation.
The SC1211VX is offered in a Power SOIC-8L package.
1
www.semtech.com
October 12, 2005
SC1211VX
POWER MANAGEMENT
Typical Application Circuit
Vin (+12V)
PWM
D1
C1
Q1
1uF
1N 4148
R1
1R 0
Vout
9
L1
PGND
U1
1
2
SC1211V X
Q2
C4
Vc c (+5V)
C2
1uF
R2
C3
Inductor Current Signal
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
VCC
Conditions
Maximum
10
Units
V
VCC Supply Voltage
VIN to PGND
VIN
30
V
BST to DRN
VBST-DRN
VBST-PGND
VBST_PULSE
VDRN-PGND
VDRN_PULSE
VPN
10
V
BST to PGND
36
V
BST to PGND Pulse
DRN to PGND
tPULSE < 100ns
tPULSE < 100ns
41
V
-2 to 29
-4 to 34
30
V
DRN to PGND Pulse
VPN to PGND
V
V
PWM Input
CO
-0.3 to 5
2.56
V
Continuous Power Dissipation
Thermal Resistance Junction to Case
Operating Junction Temperature Range
Storage Temperature Range
Lead Temperature (Soldering) 10 Sec.
NOTE:
PD
TA = 25°C, TJ =125°C
W
°C/W
°C
°C
°C
8
θJC
TJ
0 to +125
-65 to +150
300
TSTG
TLEAD
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
Electrical Characteristics
Unless specified: TA = 25°C; VCC = 5V
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Power Supply
Supply Voltage
VCC
4.3
5
6.0
V
Quiescent Current, Operating
Under Voltage Lockout
Start Threshold
Iq_op
3.0
mA
VCC_START
VhysUVLO
4
4.3
V
Hysteresis
160
mV
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: TA = 25°C; VCC = 5V
Parameter
Symbol
Conditions
Min
Typ
Max
Units
CO
High Level Input Voltage
Low Level Input Voltage
Thermal Shutdown
Over Temperature Trip Point
Hysteresis
VCO_H
VCO_L
2.0
V
V
0.8
TOTP
155
10
°C
°C
THYST
High Side Driver (TG)
RSRC_TG
1.24
1.8
1.3
Output Impedance
Ohms
VBST - VDRN = 5V
RSINK_TG
tR_TG
0.86
8
Rise Time
CL = 3.3nF, VBST - VDRN = 5V
CL = 3.3nF, VBST - VDRN = 5V
VBST - VDRN = 5V
ns
ns
ns
ns
Fall Time
tF_TG
8
Propagation Delay, TG Going High
Propagation Delay, TG Going Low
Low-Side Driver (BG)
tPDH_TG
tPDL_TG
20
25
VBST - VDRN = 5V
RSRC_BG
RSINK_BG
tR_BG
1.28
0.6
8
1.7
1.2
Output Resistance
VBST - VDRN = 5V
Ohms
Rise Time
CL = 3.3nF, VBST - VDRN = 5V
CL = 3.3nF, VBST - VDRN = 5V
VBST - VDRN = 5V
ns
ns
ns
ns
Fall Time
tF_BG
4
Propagation Delay, BG Going High
Propagation Delay, BG Going Low
Under-Voltage-Lockout Time Delay
VCC ramping up
tPDH_BG
tPDL_BG
20
25
VBST - VDRN = 5V
tPDH_UVLO
tPDL_UVLO
2
2
µs
µs
VCC ramping down
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2005 Semtech Corp.
4
SC1211VX
POWER MANAGEMENT
Timing Diagrams
CO
DRN
TG
1.0V
tPDL_TG tF_TG
tPDH_TG
1.4V
tR_TG
BG
tPDL_BG
tF_BG
tPDH_BG
tR_BG
Rising Edge Transition
Falling Edge Transition
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Pin Configuration
Ordering Information
Device (1)
Package
Temp Range (TJ)
0° to 125°C
SC1211VXSTR
EDP SO-8
EDP SO-8
(2)
DRN
TG
BG
1
2
3
4
8
7
6
5
SC1211VXSTRT
0° to 125°C
Note:
VCC
VIN
VPN
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
BST
CO
(2). SC1211VXSTRT is lead free part.
EXPOSED PAD MUST BE SOLDERED
TO POWER GROUND PLANE
Pin Descriptions
Pin # Pin Name
Pin Function
The power phase node (or switching node) of the synchronous Buck converter. This pin can be
subjected to a negtative spike up to -Vcc relative to PGND without affecting operation.
1
2
3
DRN
TG
Output gate drive for the switching (top) MOSFET.
Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating
bootstrap voltage for the high-side MOSFET. The capacitor value is typically 1µF (ceramic).
BST
Logic level PWM input signal to the SC1211VX supplied by external controller. An internal 50kohm
resistor is connected from this pin to PGND.
4
5
6
7
CO
VPN
VIN
Virtual Phase Node. Connect an RC between this pin and the output sense point of the converter to
enable Combi-Sense ® operation. See the Typical Application Circuit.
Sensing input for internal Combi-Sense ® circuitry. Connect as close as possible to the Drain of
the top MOSFET.
Supply power for the SC1211VX. Connect to 5V supply for optimum operation. A 1.0uF-4.7uF
Capacitor must be connected from this pin to PGND as close as possible.
VCC
8
BG
Output gate drive for the synchronous (bottom) MOSFET.
PAD
PGND
Ground. Keep this pin close to the synchronous MOSFET source.
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Block Diagram
VCC
VIN
LOGIC
VPN
UVLO
BST
TG
CONTROL
&
DRN
OVERLAP
PROTECTION
CIRCUIT
CO
PGND
BG
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Applications Information
THEORY OF OPERATION
VID-on-Fly Operation
Certain new processors have required to changing the
VID dynamically during the operation, or refered as VID-
on-Fly operation. A VID-on-Fly can occur under light load
or heavy load conditions. At light load, it could force the
converter to sink current. Upon turn-off of the top FET,
the reversed inductor current has to be freewheeling
through the body diode of the top FET instead of the
bottom FET. As a result, the phase node voltage remains
high. The SC1211VX incorporates the ability by pulling
the bottom gate to high internally, which over rides the
adaptive circuit and turns the bottom FET on. The delay
time from the PWM falling egde to the bottom gate turn-
on is set at 200ns typically.
The SC1211VX is a high speed, Combi-Sense®, dual out-
put driver designed to drive top and bottom MOSFETs in
a synchronous Buck converter. It features adaptive de-
lay for shoot-through protection and VID-on-Fly opera-
tion; 5V gate drive voltage; and Virtual Phase Node for
Combi-Sense® solution. These drivers combined with
PWM controller SC2643VX form a multi-phase voltage
regulator for advanced microprocessors. A three-phase
voltage regulator with 19V input 60A output is shown in
the Typical Application Circuit section.
Startup and UVLO
To startup the driver, a supply voltage applied to VCC pin
of the SC1211VX. The top and bottom gates are held
low until VCC exceeds UVLO threshold of the driver, typi-
cally 4.2V. Then the top gate remains low and the bot-
tom gate is pulled high to turn on the bottom FET. Once
VIN exceeds UVLO threshold of the PWM controller, typi-
cally 7.5V, the soft-start begins and the PWM signal takes
fully control of the gate transitions.
Virtual Phase Node for Combi-Sense®
Peak-Current-Mode control is widely employed in multi-
phase voltage regulators. It features phase current bal-
ance, fast transient response, and over current protec-
tion, etc. These are essential to low-voltage high-cur-
rent regulators designed for advanced microprocessors.
Usually, a costly current sensing resistor is required to
obtain the output inductor current information for the
peak current control. The Combi-Sense® technique fea-
tured by the SC1211VX is an approach to sense induc-
tor current without using sensing resistor.
Gate Transition and Shoot through Protection
Refer to the Timing Diagrams section, the rising edge of
the PWM input initiates the bottom FET turn-off and the
top FET turn-on. After a short propagation delay (tPDL_BG),
the bottom gate begins to fall (tF_BG). An adaptive circuit
in the SC1211VX monitors the bottom gate voltage to
drop below 1.4V. Then after a preset delay time (tPDH_TG)
is expired, the top gate turns on. The delay time is set to
be 20ns typically. This prevents the top FET from turning
on until the bottom FET is off. During the transition, the
inductor current is freewheeling through the body diode
of either bottom FET or top FET, upon the direction of
the inductor current. The phase node could be low
(ground) or high (VIN).
VIN
VIN
Q1
Qcst
Lo
C
VPN
PGND
DRN
Vout
Co
Q2
+
Qcsb
Rcs
Ccs
SC1211VX
The falling edge of the PWM input controls the top FET
turn-off and the bottom FET turn-on. After a short propa-
gation delay (tPDL_TG), the top gate begins to fall (tF_TG).
As the inductor current is commutated from the top FET
to the body diode of the bottom FET, the phase node
begins to fall. The adaptive circuit in the SC1211VX de-
tects the phase node voltage. It holds the bottom FET
off until the phase node voltage has dropped below 1.0V.
This prevents the top and bottom FETs from conducting
simultaneously or shoot-through.
Inductor C urrent Signal
The above circuit shows the concept of Combi-Sense®
technique. An internal totem pole (Qcst, Qcsb) gener-
ates a VPN (Virtual Phase Node) signal. This VPN follows
the DRN (or the Power Phase Node) with the same tim-
ing. A RC network (Rcs and Ccs) is connected between
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8
SC1211VX
POWER MANAGEMENT
Applications Information (Cont.)
be in the range of:
Switching Frequency 100kHz to 500kHz per phase
VPN and Vout. During Q1 turn-on, Qcst turns on as well.
The voltage drop across Q1 and Lo charges Ccs. During
Q2 turn-on, Qcsb turns on as well. The voltage drop across
Q2 and Lo discharges Ccs. Both voltage drops are pro-
portional to the inductor current and a resistance equal
to FET’s Rdson plus ESR of the inductor. If the time con-
stant Rcs x Ccs is close to the Lo/Ro of the inductor,
where Ro is given by
Inductor Value
FETs
0.2uH to 2uH
4m-ohm to 20m-ohm Rdson
20nC to 100nC total gate charge
Bootstrap Circuit
The SC1211VX uses an external bootstrap circuit to pro-
vide a voltage for the top FET drive. This voltage, refer-
ring to the Phase Node, is held up by a bootstrap capaci-
tor. The capacitor value can be calculated based on the
total gate charge of the top FET, QTOP, and an allowed
voltage ripple on the capacitor, ∆VBST, in one PWM cycle:
Ro ꢂ R
ꢁ Rdson_hs *D ꢁ Rdson_ls *(1ꢀ D)
inductor
the signal developed across Ccs will be proportional to
the inductor current, where Ro is the equivalent current
sensing resistance. In the above equation, Rinductor is
ESR of the inductor, Rdson_hs and Rdson_ls are the top
and bottom FET’s Rdson, and D is the duty cycle of the
converter.
CBST > QTOP/∆VBST
Typically, it is recommended to use a 1uF ceramic ca-
pacitor with 25V rating and a commonly available diode
IN4148 for the bootstrap circuit. In addition, a small re-
sistor (one ohm) has to be added in between DRN of the
SC1211VX and the Phase Node. The resistor is used to
allievate the stress of the SC1211VX from exposing to
the negative spike at the Phase node. A negative spike
could occur at the Phase Node during the top FET turn-
off due to parasitic inductance in the switching loop. The
spike could be minimized with a careful PCB layout. In
those applications with TO-220 package FETs, it is rec-
ommended to use a clamping diode on the DRN pin to
mitigate the impact of the excessive phase node nega-
tive spike.
Since a perfect timing match down to the nanosecond is
impossible, the VPN totem pole is held in tri-state during
the communtations of DRN in the SC1211VX. This avoids
errors and offset on the current detection which can be
significant since the timing mismatch is multiplied by the
input voltage. An optional capacitor between VPN and
DRN allows these two nodes to be AC coupled during the
tri-state window, hence yields a perfect timing match.
Refer to Semtech SC2643VX Combi-Sense® Current
Mode Controller about the details of the Combi-Sense®
technique.
Thermal Shut Down
Filters for Supply Power
The SC1211VX will shut down by pulling both driver out-
puts low if its junction temperature, Tj, exceeds 155°C.
For VCC pin of the SC1211VX, it is recommended to use
a 1uF to 4.7uF, 25V rating ceramic capacitor for
decoupling.
COMPONENT SELECTION
Switching Frequency, Inductor and MOSFETs
LAYOUT GUIDELINES
The SC1211VX is capable of providing up to 3.5A peak
drive current, and operating up to 1.5MHz PWM frequency
without causing thermal stress on the driver. The selec-
tion of switching frequency, together with inductor and
FETs is a trade-off between the cost, size, and thermal
management of a multi-phase voltage regulator. In mod-
ern microprocessor applications, these parameters could
The switching regulator is a high di/dt power circuit. Its
Printed Circuit Board (PCB) layout is critical. A good lay-
out can achieve an optimum circuit performance while
minimized the component stress, resulting in better sys-
tem reliability. For a multi-phase voltage regulator, the
SC1211VX driver, FETs, inductor, and supply decoupling
capacitors in each phase have to be considered as a
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2005 Semtech Corp.
9
SC1211VX
POWER MANAGEMENT
Applications Information (Cont.)
whole during PCB layout. Refer to Semtech SC2643VX/
SC1211VX EVB Layout Guideline.
For the SC1211VX driver, the following guidelines are
typically recommended during PCB layout:
1. Place the SC1211VX close to the FETs for shortest
gate drive traces and ground return paths.
2. Connect the bypass capacitor as close as possible to
pin VCC and PGND for decoupling.
3. Locate the components of the bootstrap circuit close
to the SC1211VX.
SOLDERING CONSIDERATION
The exposed die pad of the SC1211VX is used for ground
return and thermal release of the driver. The pad must
be soldered to the ground plane that is further connected
to the system ground in the inner layer through multiple
vias. For better electrical and thermal performance, it is
recommended to use all copper available under the driver
as the ground plane, and place the vias as close as pos-
sible to the solder pad. Meanwhile, the vias have to be
masked out to prevent solder leakage during reflow. The
layout arrangement is detailed in the above figure, which
also can be found in the “Land Pattern – Power SOIC-8”
section.
Solder Pad
Solder Mask
Copper
Vias
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2005 Semtech Corp.
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SC1211VX
POWER MANAGEMENT
Outline Drawing - Power SOIC-8
Outline Drawing - Power SOIC-8L
Land Pattern - Power SOIC-8
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Rd., Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
www.semtech.com
2005 Semtech Corp.
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