SC4602AIMSTR [SEMTECH]
High Efficiency Synchronous, Step Down Controller; 高效率同步降压控制器
| 型号： | SC4602AIMSTR |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | High Efficiency Synchronous, Step Down Controller |
| 文件： | 总18页 (文件大小：354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC4602A/B
High Efficiency Synchronous,
Step Down Controller
POWER MANAGEMENT
Description
Features
BICMOS Voltage mode PWM controller
2.75V to 5.5V Input voltage range
Output voltages as low as 0.8V
+/-1% Reference accuracy
The SC4602A/B is a voltage mode step down (buck) regu-
lator controller that provides accurate high efficiency
power conversion from an input supply range of 2.75V
to 5.5V. A high level of integration reduces external com-
ponent count and makes it suitable for low voltage appli-
cations where cost, size and efficiency are critical.
Sleep Mode (Icc = 10µA typ)
Lossless short circuit current limiting
Combination pulse by pulse & hiccup mode current
limit
High efficiency synchronous switching
Up to 100% Duty cycle range
Synchronization to external clock
8-Pin MSOP surface mount package. Lead-free pack-
age available, fully WEEE and RoHS compliant
The SC4602A/B drives external complementary power
MOSFETs; P-channel on the high side and N-channel on
the low side. The use of high side P-channel MOSFET
eliminates the need for an external charge pump and
simplifies the high side gate driver. Non-overlap protec-
tion is provided for the gate drive signals to prevent shoot
through of the MOSFET pair. Voltage drop across the P-
channel MOSFET during its conduction is sensed for
lossless short circuit current limiting.
Applications
Distributed power system
RF power supply
Local microprocessor core power supplies
DSP and I/O power supplies
Battery powered applications
Servers and workstations
A low power sleep mode can be achieved by forcing the
SYNC/SLEEP pin below 0.8V. A synchronous mode of op-
eration is activated as the SYNC/SLEEP pin is driven by
an external clock. The quiescent supply current in sleep
mode is typically lower than 10µA. A soft start (2.4ms for
the SC4602A and 1.2ms for the SC4602B) is internally
provided to prevent output voltage overshoot during start-
up. A 100% maximum duty cycle allows the SC4602A/B
to operate as a low dropout regulator in the event of a
low battery condition. The SC4602A/B has fixed switch-
ing frequency (300KHz for the SC4602A and 550KHz
for the SC4602B).
The SC4602A/B is an ideal choice for 3.3V, 5V or other
low input supply sytems. It’s available in a 8 pin MSOP
package.
Typical Application Circuit
R15
1
Vin = 2.75V ~ 5.5V
C10
22u
C11
C12
C13
M1
M2
22u
22u
22u
U1
R6
1.0
1
2
3
4
8
7
6
5
VCC
PDRV
L1
C3
Vo = 1.5V (as low as 0.8V )/6A
SYNC/SLEEP NDRV
4.7u
1.6u
COMP
GND
C9
C7
150u
C4
22u
VSENSE
PHASE
3.3n
C2
R5
1.0
C1
R7
SC4602B
4.64k
6.8n
470p
R8
R1
5.11k
169
R9
5.36k
* External components can be modified to provide a VOUT as low as 0.8V.
Revision: January 20, 2006
1
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SC4602A/B
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
7
Units
V
Supply Voltage (VCC)
Output Drivers (PDRV, NDRV) Currents Continuous
Inputs (VSENSE, COMP, SYNC/SLEEP, FS, ISET)
Phase
±0.25
A
-0.3 to 7
-0.3 to 7
-2 to 7
-40 to +85
-65 to +150
+150
V
V
Phase Pulse tpulse < 50ns
V
Operating Ambient Temperature Range
Storage Temperature Range
TA
TSTG
TJ
°C
°C
Maximum Junction Temperature
Thermal Impedance Junction to Case
Thermal Impedance Junction to Ambient
Lead Temperature (Soldering) 10 Sec.
ESD Rating (Human Body Model)
°C
41.9
°C/W
°C/W
°C
θJC
113.1
θJA
TLEAD
ESD
+300
2
kV
All voltages with respect to GND. Currents are positive into, negative out of the specified terminal.
Electrical Characteristics
o
o
Unless otherwise specified, VCC = 3.3V, TA = -40 C to 85 C, TA = TJ.
Parameter
Test Conditions
Min
Typ
Max
Unit
Overall
Supply Voltage
2.75
5.5
15
V
Supply Current, Sleep
Supply Current, Operating
VCC Turn-on Threshold
VCC Turn-off Hysteresis
Error Amplifier
VSYNC/SLEEP = 0V
10
1.5
µA
mA
V
3
2.55
150
2.75
mV
Internal Reference
TA = 25°C
0.792
0.788
0.784
0.8
0.8
0.8
25
80
4
0.808
0.812
0.816
V
VCC = 2.75V to 5.5V, TA = 25°C
TA = -40oC to 85oC
VSENSE Bias Current
nA
dB
(1)
Open Loop Gain
VCOMP = 0.4V to 1.8V
70
(1)
Unity Gain Bandwidth
MHz
V/µs
(1)
Slew Rate
2
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SC4602A/B
POWER MANAGEMENT
Electrical Characteristics (Cont.)
o
o
Unless otherwise specified, VCC = 3.3V, TA = -40 C to 85 C, TA = TJ.
Parameter
Test Conditions
Min
Typ
Max
Unit
Error Amplifier (Cont.)
VCOMP High
I
COMP = -2mA
2.8
3.1
V
V
VCOMP Low
ICOMP = 2mA
0.15
0.3
Oscillator
Initial Accuracy (SC4602A)
Initial Accuracy (SC4602B)
SYNC/SLEEP Low Threshold
SYNC/SLEEP High Threshold
Ramp Peak to Valley (1)
Ramp Peak Voltage (1)
Ramp Valley Voltage (1)
Sleep, Soft Start, Current Limit
Sleep Input Bias Current
Soft Start Time (1)
TA = 25°C, VSYNC = HIGH
TA = 25°C, VSYNC = HIGH
260
480
300
550
340
620
0.8
kHz
kHz
V
2.0
1.3
V
1.5
1.85
0.35
1.7
1.9
V
V
0.3
V
VSYNC/SLEEP = 0V
SC4602A
-1
2.4
µA
ms
SC4602B
1.2
Current Limit Threshold (2)
Current Limit Blank Time (1)
Reference to VCC, TJ = 25°C
Temperature coefficient
-300
0.4
mV
%/°C
ns
150
N-Channel and P-Channel Driver Outputs
Pull Up Resistance (PDRV) (2)
Pull Down Resistance (PDRV) (2)
Pull Up Resistance (NDRV) (2)
Pull Down Resistance (NDRV) (2)
Vcc = 3.3V, IOUT = -100mA (source)
3
3
3
3
ohms
ohms
ohms
ohms
ns
Vcc = 3.3V, IOUT = 50mA (sink)
Vcc = 3.3V, IOUT = -100mA (source)
Vcc = 3.3V, IOUT = 100mA (sink)
Vgs = 3.3V, COUT = 1.0nF
(1)
PDRV Output Rise Time
9
(1)
PDRV Output Fall Time
Vgs = 3.3V, COUT = 1.0nF
12
ns
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SC4602A/B
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless otherwise specified, VCC = 3.3V, TA = -40 C to 85 C, TA = TJ.
o
o
Parameter
Test Conditions
Min
Typ
Max
Unit
N-channel and P-Channel Driver Outputs (Cont.)
(1)
NDRV Output Rise Time
NDRV Output Fall Time
Deadtime Delay
Vgs = 3.3V, COUT = 1.0nF
Vgs = 3.3V, COUT = 1.0nF
15
15
ns
ns
(1)
adaptive
(PDRV high to NDRV high) (1)
Deadtime Delay
50
ns
(NDRV low to PDRV low) (1)
Notes:
(1) Guaranteed by design.
(2) Guaranteed by characterization.
(3) Dead time delay from PDRV high to NDRV high is adaptive. As the phase node voltage drops below 600mV due to PDRV
high, NDRV will start to turn high.
Marking Information
yyww = Date Code (Example: 0012)
xxxxxxxx = Semtech Lot No. (Example: E901
01-1)
yyww = Date Code (Example: 0012)
xxxxxxxx = Semtech Lot No. (Example: E901
01-1)
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SC4602A/B
POWER MANAGEMENT
Pin Configuration
Ordering Information
Part Number(1)
SC4602AIMSTR
SC4602AIMSTRT(2)
SC4602BIMSTR
SC4602BIMSTRT(2)
SC4602AEVB
kHz
Device
Top View
300
550
MSOP-8
MSOP-8
(8 Pin MSOP)
Evaluation Board
SC4602BEVB
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
Pin Descriptions
VCC: Positive supply rail for the IC. Bypass this pin to
GND with a 0.1 to 4.7µF low ESL/ESR ceramic capaci-
tor.
PHASE: This input is connected to the junction between
the two external power MOSFET transistors. The voltage
drop across the upper P-channel device is monitored by
PHASE during conduction and forms the current limit
comparator. Logic sets the PWM latch and terminates
the output pulse. The controller stops switching and goes
through a soft start sequence once the converter out-
put voltage drops below 68.75% its nominal voltage. This
prevents excess power dissipation in the PMOSFET dur-
ing a short circuit. The reverse current comparator senses
the drop across the lower N-channel MOSFET during its
conduction and disables the drive signal if a small posi-
tive voltage is present. To disable the overcurrent com-
parator, connect PHASE to VCC.
GND: All voltages are measured with respect to this pin.
All bypass and timing capacitors connected to GND should
have leads as short and direct as possible.
SYNC/SLEEP: The oscillator of SC4602A and SC4602B
are set to 300kHz and 550kHz respectively when SYNC/
SLEEP is pulled and held above 2V. Synchronous mode
operation is activated as the SYNC/SLEEP is driven by an
external clock. The oscillator and PWM are designed to
provide practical operation to 450kHz for SC4602A and
to 700kHz for SC4602B when synchronized. Sleep mode
is invoked if SYNC/SLEEP is pulled and held below 0.8V
which can be accomplished by an external gate or tran-
sistor. Sleepmode supply current is 10µA typical.
PDRV, NDRV: The PWM circuitry provides complemen-
tary drive signals to the output stages. Cross conduc-
tion of the external MOSFETS is prevented by monitoring
the voltage on the P-channel and N-channel driver pins
in conjunction with a time delay optimized for FET turn-
off characteristics.
VSENSE: This pin is the inverting input of the voltage
amplifier and serves as the output voltage feedback point
for the Buck converter. It senses the output voltage through
an external divider.
COMP: This is the output of the voltage amplifier. The
voltage at this output is inverted internally and connected
to the non-inverting input of the PWM comparator. A lead-
lag network around the voltage amplifier compensates for
the two pole LC filter characteristic inherent to voltage mode
control and is required in order to optimize the dynamic
performance of the voltage mode control loop.
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SC4602A/B
POWER MANAGEMENT
Block Diagram
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SC4602A/B
POWER MANAGEMENT
Typical Characteristic (Cont.)
Current Limit Threshold Voltage
Current Limit Threshold Voltage
vs
vs
Temperature
Input Voltage
-280.00
-200.00
-250.00
-300.00
-350.00
-400.00
A
T
= 25°C
-285.00
-290.00
-295.00
-300.00
-305.00
-310.00
Vcc = 3.3V
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
80
Vcc (V)
Temperature (°C)
Sc4602A
Sc4602A
Oscillator Internal Accuracy
Oscillator Internal Accuracy
vs
vs
Input Voltage
Temperature
300.000
295.000
290.000
285.000
280.000
275.000
270.000
290.000
285.000
280.000
275.000
Vcc = 3.3V
TA = 25°C
-40
-20
0
20
40
60
80
2.5
3
3.5
4
4.5
5
5.5
Temperature (°C)
Vcc (V)
Sc4602A
Sense Voltage
vs
Sc4602A
Sense Voltage
vs
Input Voltage
Temperature
803.400
803.000
A
T
= 25°C
Vcc = 3.3V
803.200
803.000
802.800
802.600
802.400
802.200
802.000
802.000
801.000
800.000
799.000
798.000
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
80
Vcc (V)
Temperature (°C)
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SC4602A/B
POWER MANAGEMENT
Typical Characteristic (Cont.)
Sc4602B
Oscillator Internal Accuracy
vs
Sc4602B
Oscillator Internal Accuracy
vs
Input Voltage
Temperature
560.000
555.000
550.000
545.000
540.000
535.000
570.000
560.000
550.000
540.000
530.000
520.000
Vcc = 3.3V
530.000
525.000
TA = 25°C
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
80
Vcc (V)
Temperature (°C)
Sc4602B
Sense Voltage
vs
Sc4602B
Sense Voltage
vs
Input Voltage
Temperature
801.000
800.500
A
T
= 25°C
Vcc = 3.3V
800.800
800.600
800.400
800.200
800.000
799.800
799.600
800.000
799.500
799.000
798.500
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
80
Vcc (V)
Temperature (°C)
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SC4602A/B
POWER MANAGEMENT
Applications Information
Enable
during start up and over current to set the hiccup time.
The soft start time can be calculated by:
720
=
Pulling and holding the SYNC/SLEEP pin below 0.8V ini-
tializes the SLEEP mode of the SC4602A/B with its typi-
cal SLEEP mode supply current of 10uA. During the SLEEP
mode, the high side and low side MOSFETs are turned
off and the internal soft start voltage is held low.
TSOFT _START
fs
As can be seen here, the soft start time is switching fre-
quency dependant. For example, if fs = 300kHz, TSOFT
_
START
= 720/300k = 2.4ms. But if fs = 600kHz, TSOFT
720/600k = 1.2ms.
_
=
START
Oscillator
The SC4602A/B is a constant frequency, voltage mode,
and synchronous step down controller ideal for low volt-
age, high efficiency, precisely regulated output DC/DC
converters. Its internal free running oscillator sets the
PWM frequency at 300kHz for the SC4602A and 550kHz
for the SC4602B without any external components to
set the frequency. A 100% maximum duty cycle allows
the SC4602A/B to operate as a low dropout regulator in
the event of a low battery condition. An external clock
connected to SYNC/SLEEP activates its synchronous
mode and the frequency of the clock can be up to
450kHz for the SC4602A and 700kH for the SC4602B.
The SC4602A/B implements its soft start by ramping up
the error amplifier reference voltage providing a con-
trolled slew rate of the output voltage, then preventing
overshoot and limiting inrush current during its start up.
Over Current Protection
Over current protection for the SC4602A/B is imple-
mented by detecting the voltage drop of the high side P-
MOSFET during conduction, also known as high side RDS(ON)
detection. This loss-less detection eliminates the sense
resistor and its loss. The overall efficiency is improved,
and the number of components and cost of the con-
verter are reduced. RDS(ON) sensing is by default inaccu-
rate and is mainly used to protect the power supply dur-
ing a fault case. The over current trigger point will vary
from unit to unit as the RDS(ON) of P-MOSFET varies. Even
for the same unit, the over current trigger point will vary
as the junction temperature of P-MOSFET varies. The
SC4602A/B provides a built-in 300mV voltage source.
The over current trigger point can be determined based
on the internal 300mV voltage source and the RDS(ON) of
P-MOSFET as follows:
UVLO
When the SYNC/SLEEP pin is pulled and held above 2V,
the voltage on the Vcc pin determines the operation of
the SC4602A/B. As Vcc increases during start up, the
UVLO block senses Vcc and keeps the high side and low
side MOSFETs off and the internal soft start voltage low
until Vcc reaches 2.75V. If no faults are present, the
SC4602A/B will initiate a soft start when Vcc exceeds
2.75V. A hysteresis (150mV) in the UVLO comparator
provides noise immunity during its start up.
300mV
=
Itrigger
RDS(ON)
Soft Start
Kelvin sensing connections should be used at the drain
and source of P-MOSFET.
The soft start function is required for step down control-
lers to prevent excess inrush current through the DC bus
during start up. Generally this can be done by sourcing a
controlled current into a timing capacitor and then using
the voltage across this capacitor to slowly ramp up the
error amp reference. The closed loop creates narrow
width driver pulses while the output voltage is low and
allows these pulses to increase to their steady state duty
cycle as the output voltage reaches its regulated value.
With this, the inrush current from the input side is con-
trolled. The duration of the soft start in the SC4602A/B
is controlled by an internal timing circuit which is used
The RDS(ON) sensing used in the SC4602A/B has an addi-
tional feature that enhances the performance of the over
current protection. Because the RDS(ON) has a positive
temperature coefficient, the 300mV voltage source has
a positive coefficient of about 0.4%/C° providing first
order correction for current sensing vs temperature. This
compensation depends on the high amount of thermal
transferring that typically exists between the high side P-
MOSFET and the SC4602A/B due to the compact layout
of the power supply.
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SC4602A/B
POWER MANAGEMENT
Applications Information (Cont.)
tween two MOSFETs and minimizes the conduction loss
in the bottom diode for high efficiency applications.
When the converter detects an over current condition (I
> IMAX) as shown in Figure 1, the first action the SC4602A/
B takes is to enter cycle by cycle protection mode (Point
B to Point C), which responds to minor over current cases.
Then the output voltage is monitored. If the over current
and low output voltage (set at 68.75% of nominal out-
put voltage) occur at the same time, the Hiccup mode
operation (Point C to Point D) of the SC4602A/B is in-
voked and the internal soft start capacitor is discharged.
This is like a typical soft start cycle.
PMOSFET Gate Drive
NMOSFET Gate Drive
Ground
Phase node
td2
td1
Figure 2. Timing Waveforms for Gate Drives and Phase
Node
A
B
VO−nom
Inductor Selection
The factors for selecting the inductor include its cost,
efficiency, size and EMI. For a typical SC4602A/B appli-
cation, the inductor selection is mainly based on its value,
saturation current and DC resistance. Increasing the in-
ductor value will decrease the ripple level of the output
voltage while the output transient response will be de-
graded. Low value inductors offer small size and fast tran-
sient responses while they cause large ripple currents,
poor efficiencies and more output capacitance to smooth
out the large ripple currents. The inductor should be able
to handle the peak current without saturating and its
copper resistance in the winding should be as low as
possible to minimize its resistive power loss. A good trade-
off among its size, loss and cost is to set the inductor
ripple current to be within 15% to 30% of the maximum
output current.
0.6875⋅VO−nom
0.125⋅VO−nom
C
D
VO
IMA
IO
Figure 1. Over current protection characteristic of
SC4602A/B
Power MOSFET Drivers
The SC4602A/B has two drivers for external complemen-
tary power MOSFETs. The driver block consists of one
high side P-MOSFET, 4Ω driver, PDRV, and one low side
5Ω, N-MOSFET driver, NDRV, which are optimized for driv-
ing external power MOSFETs in a synchronous buck con-
verter. The output drivers also have gate drive non-over-
lap mechanism that gives a dead time between PDRV
and NDRV transitions to avoid potential shoot through
problems in the external MOSFETs. By using the proper
design and the appropriate MOSFETs, a 6A converter can
be achieved. As shown in Figure 2, td1, the delay from
the P-MOSFET off to the N-MOSFET on is adaptive by
detecting the voltage of the phase node. td2, the delay
from the N-MOSFET off to the P-MOSFET on is fixed, is
100ns for the SC4602A/B. This control scheme guaran-
tees avoiding the cross conduction or shoot through be-
The inductor value can be determined according to its
operating point and the switching frequency as follows:
VO (V − VO )
I
L =
V fs ∆I IOMAX
I
Where:
fs = switching frequency and
∆I = ratio of the peak to peak inductor current to the
maximum output load current.
The peak to peak inductor current is:
IP−P = ∆I• IOMAX
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SC4602A/B
POWER MANAGEMENT
Applications Information (Cont.)
After the required inductor value is selected, the proper
selection of the core material is based on the peak in-
ductor current and efficiency requirements. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation.
Input Capacitor Selection
The input capacitor selection is based on its ripple cur-
rent level, required capacitance and voltage rating. This
capacitor must be able to provide the ripple current by
the switching actions. For the continuous conduction
mode, the RMS value of the input capacitor can be cal-
culated from:
Ip−p
IPEAK = IOMAX
+
2
The power loss for the inductor includes its core loss and
copper loss. If possible, the winding resistance should
be minimized to reduce inductor’s copper loss. The core
loss can be found in the manufacturer’s datasheet. The
inductor’ copper loss can be estimated as follows:
VO (V − VO )
I
ICIN
= IOMAX
(RMS)
V2
I
This current gives the capacitor’s power loss as follows:
PCOPPER = I2
RWINDING
LRMS
PCIN = I2
RCIN(ESR)
CIN(RMS)
Where:
ILRMS is the RMS current in the inductor. This current can
be calculated as follows:
This capacitor’s RMS loss can be a significant part of the
total loss in the converter and reduce the overall con-
verter efficiency. The input ripple voltage mainly depends
on the input capacitor’s ESR and its capacitance for a
given load, input voltage and output voltage. Assuming
that the input current of the converter is constant, the
required input capacitance for a given voltage ripple can
be calculated by:
1
3
ILRMS = IOMAX 1+
∆I2
Output Capacitor Selection
Basically there are two major factors to consider in se-
lecting the type and quantity of the output capacitors.
The first one is the required ESR (Equivalent Series Re-
sistance) which should be low enough to reduce the volt-
age deviation from its nominal one during its load changes.
The second one is the required capacitance, which should
be high enough to hold up the output voltage. Before the
SC4602A/B regulates the inductor current to a new value
during a load transient, the output capacitor delivers all
the additional current needed by the load. The ESR and
ESL of the output capacitor, the loop parasitic inductance
between the output capacitor and the load combined
with inductor ripple current are all major contributors to
the output voltage ripple. Surface mount speciality poly-
mer aluminum electrolytic chip capacitors in UE series
from Panasonic provide low ESR and reduce the total
capacitance required for a fast transient response.
POSCAP from Sanyo is a solid electrolytic chip capacitor
which has a low ESR and good performance for high fre-
quency with a low profile and high capacitance. Above
mentioned capacitors are recommended to use in
SC4602A/B applications.
D (1−D)
fs (∆V −IOMAX RCIN
CIN = IOMAX
)
I
(ESR)
Where:
D = VO/VI , duty ratio and
DVI = the given input voltage ripple.
Because the input capacitor is exposed to the large surge
current, attention is needed for the input capacitor. If
tantalum capacitors are used at the input side of the
converter, one needs to ensure that the RMS and surge
ratings are not exceeded. For generic tantalum capaci-
tors, it is wise to derate their voltage ratings at a ratio of
2 to protect these input capacitors.
Power Mosfet Selection
The SC4602A/B can drive a P-MOSFET at the high side
and an N-MOSFET synchronous rectifier at the low side.
The use of the high side P-MOSFET eliminates the need
for an external charge pump and simplifies the high side
gate driver circuit.
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SC4602A/B
POWER MANAGEMENT
Applications Information (Cont.)
For the top MOSFET, its total power loss includes its con-
duction loss, switching loss, gate charge loss, output ca-
pacitance loss and the loss related to the reverse recov-
ery of the bottom diode, shown as follows:
Loop Compensation Design
For a DC/DC converter, it is usually required that the
converter has a loop gain of a high cross-over frequency
for fast load response, high DC and low frequency gain
for low steady state error, and enough phase margin for
its operating stability. Often one can not have all these
properties at the same time. The purpose of the loop
compensation is to arrange the poles and zeros of the
compensation network to meet the requirements for a
specific application.
PTOP_TOTAL = I2
RTOP_ON
TOP _RMS
ITOP_PEAK V fs
I
+
(QGD + QGS2 ) + QGT VGATE fs + (QOSS + Qrr ) V fs
I
V
GATE RG
Where:
RG = gate drive resistor,
QGD = the gate to drain charge of the top MOSFET,
QGS2 = the gate to source charge of the top MOSFET,
QGT = the total gate charge of the top MOSFET,
QOSS = the output charge of the top MOSFET and
Qrr = the reverse recovery charge of the bottom diode.
The SC4602A/B has an internal error amplifier and re-
quires the compensation network to connect among the
COMP pin and VSENSE pin, GND, and the output as
shown in Figure 3. The compensation network includes
C1, C2, R1, R7, R8 and C9.
For the top MOSFET, it experiences high current and high
voltage overlap during each on/off transition. But for the
bottom MOSFET, its switching voltage is the bottom
diode’s forward drop during its on/off transition. So the
switching loss for the bottom MOSFET is negligible. Its
total power loss can be determined by:
R9 is used to program the output voltage according to:
R7
R9
VO = 0.8 (1+
)
VCC
PDRV
PBOT _TOTAL = I2
RBOT _ON + QGB VGATE fs +ID _AVG VF
BOT _RMS
SYNC/SLEEP NDRV
COMP
GND
L1
Vo
VSENSE
PHASE
C2
SC4602A/B
Where:
C9
C4
R7
R9
C1
QGB = the total gate charge of the bottom MOSFET and
VF = the forward voltage drop of the bottom diode.
R8
R1
For a low voltage and high output current application such
as the 3.3V/1.5V@6A case, the conduction loss is often
dominant and selecting low RDS(ON) MOSFETs will notice-
ably improve the efficiency of the converter even though
they give higher switching losses.
Figure 3. Compensation network provides 3
poles and 2 zeros.
The gate charge loss portion of the top/bottom MOSFET’s
total power loss is derived from the SC4602A/B. This
gate charge loss is based on certain operating conditions
(fs, VGATE, and IO).
For voltage mode step down applications as shown in
Figure 3, the power stage transfer function is:
s
1+
The thermal estimations have to be done for both
MOSFETs to make sure that their junction temperatures
do not exceed their thermal ratings according to their
total power losses PTOTAL, ambient temperature Ta and their
thermal resistances Rθja as follows:
1
RC C4
1+ s + s2L1C4
GVD (s) = V
I
L1
R
PTOTAL
Tj(max) < Ta +
Rθja
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SC4602A/B
POWER MANAGEMENT
Applications Information (Cont.)
Where:
The design guidelines for the SC4602A/B applications
are as following:
R = load resistance and
RC = C4’s ESR.
1. Set the loop gain crossover corner frequency ωC for
given switching corner frequency ωS =2pfs,
2. Place an integrator at the origin to increase DC and
low frequency gains,
3. Select ωZ1 and ωZ2 such that they are placed near
ωO to damp the peaking and the loop gain has a
-20dB/dec rate to go across the 0dB line for
obtaining a wide bandwidth,
The compensation network will have the characteristic
as follows:
s
ωZ1
s
s
ωZ2
s
1+
1+
1+
1+
ωI
GCOMP(s) =
s
ωP1
ωP2
4. Cancel the zero from C4’s ESR by a compensator
pole ωP1 (ωP1 = ωESR = 1/( RCC4)),
Where:
5. Place a high frequency compensator pole ωp2 (ωp2
= pfs) to get the maximum attenuation of the
switching
1
ωI =
R7 (C1 + C2 )
ripple and high frequency noise with the adequate
phase lag at ωC.
1
ωZ1
=
R1 C2
1
The compensated loop gain will be as given in Figure 4:
ωZ2
=
(R7 + R8 ) C9
C1 + C2
=
ωP1
R1 C1 C2
T
ωZ1
Loop gain T(s)
o
ω
1
=
ωP2
ωZ2
R8 C9
-20dB/dec
Gd
c
ω
0dB
After the compensation, the converter will have the fol-
lowing loop gain:
ω
p1
ω
p2
Power stage GVD(s)
T(s) = GPWM GCOMP(s) GVD(s)
ωESR
s
1
-40dB/dec
1+
1
VM
s
ωZ1
s
s
ωZ2
s
ωI V 1+
1+
1+
I
RC C4
=
L1
s
1+
1+ s + s2L1C4
ωP1
ωP2
R
Figure 4. Asymptotic diagrams of power stage and its
loop gain
Where:
GPWM = PWM gain and
VM = 1.5V, ramp peak to valley voltage of SC4602A/B.
2006 Semtech Corp.
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SC4602A/B
POWER MANAGEMENT
Applications Information (Cont.)
Layout Guideline
5. Minimize the traces between PDRV/NDRV and the
gates of the MOSFETs to reduce their impedance to
drive the MOSFETs.
6. Minimize the loop including input capacitors, top/bot-
tom MOSFETs. This loop passes high di/dt current.
Make sure the trace width is wide enough to reduce
copper losses in this loop.
In order to achieve optimal electrical, thermal and noise
performance for high frequency converters, special at-
tention must be paid to the PCB layouts. The goal of lay-
out optimization is to identify the high di/dt loops and
minimize them. The following guideline should be used to
ensure proper functions of the converters.
1. A ground plane is recommended to minimize noises
and copper losses, and maximize heat dissipation.
2. Start the PCB layout by placing the power compo-
nents first. Arrange the power circuit to achieve a
clean power flow route. Put all the connections on
one side of the PCB with wide copper filled areas if
possible.
3. The Vcc bypass capacitor should be placed next to
the Vcc and GND pins.
4. The trace connecting the feedback resistors to the
output should be short, direct and far away from the
noise sources such as the phase node and switching
components.
7. The PHASE connection to P-MOSFET for current sens-
ing must use Kelvin connection.
8. Maximize the trace width of the loop connecting the
inductor, bottom MOSFET and the output capacitors.
9. Connect the ground of the feedback divider and the
compensation components directly to the GND pin
of the SC4602A/B by using a separate ground trace.
Then connect this pin to the ground of the output
capacitor as close as possible.
A Design Example: 3.3V to1.5V @6A application with SC4602B (NH020 footprint)
GND
1
2
3
4
5
6
R15
Vin = 3.3V
1
M1
M2
C10
22u
C11
22u
C12
C13
ON/OFF
22u
22u
J1
U1
R6
1.0
1
2
3
4
8
7
6
5
VCC
PDRV
L1
1.6u
1
2
3
4
5
C3
R2
Vo = 1.5V/6A
SYNC/SLEEP NDRV
4.7u
3.32K
COMP
GND
C9
C7
150u
C4
22u
VSENSE
PHASE
J2
3.3n
C2
R5
1.0
C1
R7
SC4602B
4.64k
6.8n
470p
R8
R1
5.11k
169
R10
100
TRIM
R9
5.36k
R11
100
ON/OFF
Figure 5. Schematic for 3.3V/1.5V@6A with SC4602B application
2006 Semtech Corp.
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SC4602A/B
POWER MANAGEMENT
Bill of Materials - 3.3V to 1.5V @ 6A
Item
Qty
1
Reference
Value
Part No./Manufacturer
1
2
3
4
C1
C2
C3
470pF
6.8nF
4.7uF
22uF
1
1
0805, ceramic
5
C4, C10, C11, C12, C13
TDK P/N: C3225X5R0J226M
SP capacitor, 150uF,
15 mohm, 6.3V
5
1
C7
Panasonic
6
7
8
1
1
1
C9
J1
J2
3.3nF
CON6
CON5
SMT power inductor,
1.6uH +/- 30%, 12.2A, 3.3
mohm max
Panasonic. P/N:
ETQP6F1R6S
9
1
L1
10
11
12
13
14
15
16
17
18
19
20
1
1
1
1
1
2
1
1
1
2
1
M1
FDS 6375, SO-8, Fairchild
SO-8 MOSFET P
M1
FDS 6680A, SO-8, Fairchild SO-8 MOSFET N
R1
5.11k
3.32k
1
R2
R15
R5, R6
R7
1.0
4.64k
169
R8
R9
5.36k
100
R10, R11
U1
SC4602B
Semtech P/N: SC4602BIMSTR
Key components:
U1: SC4602B, Semtech
M1: FDS 6375, SO-8, Fairchild
M2: FDS 6680A, SO-8, Fairchild
C7: SP capacitor, 150uF, 15 mohm, 6.3V, Panasonic
L1: SMT power inductor, 1.6uH +/- 30%, 12.2A, 3.3 mohn max. ETQP6F1R6S Panasonic.
Unless specified, all resistors and capacitors are in SMD 0603 package.
Resistors are +/-1% and all capacitors are +/-20%
2006 Semtech Corp.
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SC4602A/B
POWER MANAGEMENT
PCB Layout - 3.3V to 1.5V @ 6A
3.3V to1.5V @6A with SC4602B application (NH020 footprint)
PCB layout information for
Top
Bottom
Bottom
2006 Semtech Corp.
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SC4602A/B
POWER MANAGEMENT
Typical Characteristic
Over current protection characteristic of SC4602B for 3.3V to1.5V @6A application:
The over current protection curve below is obtained by applying a gradually increased load while the load current
and the output voltage are monitored and measured. When the load current is increased from 0 to 9A (over current
trigger point), the output voltage is 1.5V, corresponding from Point A to Point B. As the load current increases
further from 9A to 9.6A, the output voltage drops significantly from 1.5V (Point B) to 0.54V (Point C). Because an
over current and a lower output voltage (0.54V<68.75%*1.5V=1.03V) are present at Point C, the SC4602B enters
its HICCUP mode. Then the locus of the output current and the output voltage follows Line CD as shown in the
curve. Due to the over current applied, the HICCUP protection will go back and forth on Line CD. This prevents
excess power dissipation in the P-MOSFET during a short output conditio
Overcurrent protection
3
2.5
A
B
2
1.5
C
D
1
0.5
0
0
3
6
9
12
15
18
Output Current (A)
2006 Semtech Corp.
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SC4602A/B
POWER MANAGEMENT
Outline Drawing - MSOP-8
DIMENSIONS
INCHES MILLIMETERS
e/2
DIM
A
MIN NOM MAX MIN NOM MAX
A
-
-
-
-
-
-
-
-
-
-
-
-
.043
1.10
0.15
0.95
0.38
0.23
D
E
A1 .000
A2 .030
.006 0.00
.037 0.75
.015 0.22
.009 0.08
N
b
c
D
.009
.003
2X
E/2
.114 .118 .122 2.90 3.00 3.10
E1 .114 .118 .122 2.90 3.00 3.10
E1
E
e
.193 BSC
.026 BSC
4.90 BSC
0.65 BSC
PIN 1
INDICATOR
L
L1
N
.016 .024 .032 0.40 0.60 0.80
(.037)
8
-
(.95)
8
-
ccc C
2X N/2 TIPS
1 2
01
aaa
0°
8°
0°
8°
e
.004
.005
.010
0.10
0.13
0.25
bbb
ccc
B
D
H
aaa C
A2
A
c
GAGE
SEATING
PLANE
PLANE
A1
bxN
bbb
C
0.25
L
01
C
A-B D
(L1)
DETAIL A
SEE DETAIL A
SIDE VIEW
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MO-187, VARIATION AA.
Land Pattern - MSOP-8
X
DIMENSIONS
DIM
INCHES
(.161)
.098
MILLIMETERS
(4.10)
2.50
0.65
0.40
1.60
5.70
C
G
P
X
Y
Z
(C)
P
G
Y
Z
.026
.016
.063
.224
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp.
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