SK10E116PJ [SEMTECH]
Quint Differential Line Receiver; 昆特差动线路接收器
| 型号： | SK10E116PJ |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Quint Differential Line Receiver |
| 文件： | 总4页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SK10/100E116
Quint Differential
Line Receiver
HIGH-PERꢀORMANCE PRODUCTS
ꢀeatures
Description
The SK10/100E116 is a quint differential line receiver
designed for use in new, high-performance ECL systems.
•
•
•
•
•
•
•
500 ps Maximum Propagation Delay
Extended VEE Range of –4.2V to –5.5V
VBB Output for Single-Ended Reception
Internal 75KΩ Input Pull-Down Resistors
ESD Protection of >4000V
Fully Compatible with MC10E/100E116
Specified Over Industrial Temperature Range:
–40oC to +85oC
The receiver design features clamp circuitry to cause a
defined output state if both the inverting and non-inverting
inputs are left open; in this case the Q output goes low,
while the Q* output goes high. This feature makes the
device ideal for twisted pair applications.
•
Available in 28-Pin PLCC Package
If both inverting and non-inverting inputs are at an equal
potential of >–2.9V, the receiver does not go to a defined
state, but rather shares current in normal differential
amplifier fashion, producing output voltage levels midway
between high and low. This may even cause the device to
oscillate.
PIN Description
The SK10/100E116 provides VBB output for either single-
ended use or as a DC bias for AC coupling to the device.
The VBB output pin should be used only as a DC bias for
the E116 as its current sink/source capability is limited.
Whenever used, the VBB pin should be bypassed to VCC
via a 0.01 µF capacitor.
Pin
D0, D0*D4, D4*
Q0, Q0*-Q4, Q4*
VBB
ꢀunction
Differential Input Pairs
Differential Output Pairs
Reference Voltage Output
VCC to Output
VCC0
ꢀunctional Block Diagram
D0
Q0
D0*
Q0*
D1
Q1
D1*
Q1*
D3*
D2
26
27
28
1
18
17
16
15
14
13
12
Q3*
Q3
D2
Q2
D2*
VEE
VBB
D0
VCC
Q2*
Q2
D2*
Q2*
PLCC
TOPVIEW
2
D3
Q3
3
VCC0
Q1*
D3*
Q3*
D0*
4
D4
Q4
D4*
Q4*
VBB
www.semtech.com
Revision 1 /ꢀebruary 21, 2001
1
SK10/100E116
HIGH-PERꢀORMANCE PRODUCTS
Package Information
28-Pin PLCC Package
S
S
N
M
M
A
R
0.007 (0.180)
T
L – M
Y BRK
–N–
Z
S
S
N
0.007 (0.180)
T
L – M
PIN Descriptions
D
–L–
– M –
C
E
0.004 (0.100)
–T– SEATING PLANE
G
J
G1
VIEW S
D
W
S
S
S
N
0.010 (0.250)
T
L – M
V
28
1
0.007(0.180)
M
T
L – M
S
N
S
H
S
N
S
S
B
M
T
0.007 (0.180)
L - M
U
M
S
N
0.007 (0.180)
+
T
L - M
Z
K1
K
+
S
0.007 (0.180)
M
T L – M
N
S
F
G1
0.010 (0.250)
S
T L - M
S
N
S
X
NOTES:
1. Datums -L-, -M-, and -N- determined where top of lead
shoulder exits plastic body at mold parting line.
2. DIM G1, true position to be measured at Datum -T-,
Seating Plane.
3. DIM R and U do not include mold flash. Allowable
mold flash is 0.010 (0.250) per side.
4. Dimensioning and tolerancing per ANSI Y14.5M,
1982.
5. Controlling Dimension: Inch.
INCHES
MILLIMETERS
DIM
MIN
MAX
0.495
0.495
0.180
0.110
0.019
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
A
B
C
E
0.485
0.485
0.165
0.090
0.013
2.29
2.79
)
0.33
0.48
6. The package top may be smaller than the package
bottom by up to 0.012 (0.300). Dimensions R and U
are determined at the outermost extremes of the
plastic body exclusive of mold flash, tie bar burrs,
gate burrs and interlead flash, but including any
mismatch between the top and bottom of the plastic
body.
7. Dimension H does not include Dambar protrusion or
intrusion. The Dambar protrusion(s) shall not cause
the H dimension to be greater than 0.037 (0.940).
The Dambar intrusion(s) shall not cause the H
dimension to be smaller than 0.025 (0.635).
G
H
J
0.050 BSC
0.032
1.27 BSC
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
--
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
--
0.81
--
--
K
R
U
V
--
--
0.456
0.456
0.048
0.048
0.056
0.020
10o
11.58
11.58
1.21
1.21
1.42
0.50
10o
W
X
Y
Z
2o
2o
G1
K1
0.410
0.040
0.430
--
10.42
1.02
10.92
--
Revision 1 /ꢀebruary 21, 2001
www.semtech.com
2
SK10/100E116
HIGH-PERꢀORMANCE PRODUCTS
DC Characteristics
SK10/100E116 DC Electrical Characteristics (Notes 1, 2)
(V – V = 4.2V to 5.5V; V
loaded 50Ω to V – 2.0V)
CC
EE
OUT
CC
TA = –40oC
TA = 0oC
TA = +25oC
TA = +85oC
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
9
Output Reference Voltage
VBB
10E
1.43
1.38
1.30 1.38
1.26 1.38
1.27 1.35
1.26 1.38
1.25 1.31
1.26 1.38
1.19
1.26
V
V
100E
I
Input Current
-200
200
-200
200
-200
200
-200
200
µA
IN
Power Supply Current
I
10EL
35
35
35
35
35
35
35
40
mA
mA
EE
100EL
V
V
Power Supply Voltage
4.2
5.5
4.2
5.5
4.2
5.5
4.2
5.5
V
CC
EE
AC Characteristics
SK10/100EL116 AC Electrical Characteristics
(V
V
= +4.2V to +5.5V ; V
loaded 50Ω to V – 2.0V)
OUT CC
CC – EE
TA = –40oC
TA = 0oC
TA = +25oC
TA = +85oC
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
t
t
Propagation Delay to Output
D
PLH
PHL
365
445
385
505
310
530
315
495
ps
ps
6
Within-Device Skew
DN to Qn, Qn*
t
skew
50
50
50
50
7
Duty Cycle Skew
t
tskew
t
±10
±10
±10
±10
ps
PLH
PHL
3
V
Minimum Input Swing CLK
150
190
1000
580
150
210
1000
580
150
210
1000
580
150
210
1000
580
mV
PP
Output Rise/)all Times
(20% to 80%ꢀ
t , t
r
ps
V
f
VCC -
2.0
VCC VCC -
0.6 2.0
VCC VCC -
0.6 2.0
VCC VCC -
0.6 2.0
VCC
0.6
4
V
Common Mode Range
CMR
Revision 1 /ꢀebruary 21, 2001
3
www.semtech.com
SK10/100E116
HIGH-PERꢀORMANCE PRODUCTS
AC Characteristics (continued)
Notes:
1. 10EL circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has
been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
airflow greater than 500 lfpm is maintained. Outputs are terminated through a 50Ω resistor to VCC–2.0V.
2. 100K circuits are designed to meet the DC specification shown in the table where transverse airflow
greater than 500 lfpm is maintained.
3. Minimum input swing for which AC parameters guaranteed.
4. CMR range is referenced to the most positive side of the differential input signal. Normal operation is
obtained if the high level falls within the specified range and the peak-to-peak voltage lies between
VPP
and 1V. The lower end of the CMR range varies 1:1 with VCC and is equal to VCC - 2.0V.
(min)
5. Voltages referenced to VCC = 0V (ECL mode).
6. Within device skew is defined as indentical transition on similar path through a device.
7. Duty cycle is defined only for differential operation when the delays are measured from the crosspoint of
the inputs to the crosspoints of the outputs.
8. For standard ECL DC Specifications, refer to the ECL Logic Family Standard DC Specifications Data
Sheet.
9. Voltages are referenced to VCC = 0V (ECL Mode).
10. For part ordering description, see HPP Part Ordering Information Date Sheet.
Ordering Information
Temperature
Ordering Code
Package ID
Range
SK10E116PJ
SK10E116PJT
SK100E116PJ
SK100E116PJT
28-PLCC
28-PLCC
28-PLCC
28-PLCC
Industrial
Industrial
Industrial
Industrial
Contact Information
Semtech Corporation
High-Performance Products Division
Division Headquarters
10021 Willow Creek Road
San Diego, CA 92131
Phone: (858) 695-1808
Marketing Group
1111 Comstock Street
Santa Clara, CA 95054
Phone: (408) 566-8776
FAX:
(858) 695-2633
FAX: (408) 727-8994
Revision 1 /ꢀebruary 21, 2001
www.semtech.com
4
相关型号：
SK10E142JT
Parallel In Parallel Out, 10E Series, 9-Bit, Right Direction, True Output, ECL, PQCC28, PLASTIC, LCC-28
SEMTECH
©2020 ICPDF网 联系我们和版权申明