SGM5532L [SGMICRO]
Dual Low Noise Operational Amplifier;
| 型号： | SGM5532L |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | Dual Low Noise Operational Amplifier |
| 文件： | 总14页 (文件大小：812K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM5532L
Dual Low Noise Operational Amplifier
GENERAL DESCRIPTION
FEATURES
The SGM5532L is a dual, low noise operational amplifier,
which operates on a wide supply range from 5V to 36V.
● Ultra-Low Input Voltage Noise:
6nV/ Hz (TYP) at 1kHz
√
● Unity-Gain Bandwidth: 9.5MHz (TYP)
● High Slew Rate: 18V/μs (TYP)
The SGM5532L offers an ultra-low noise of 6nV/ Hz
√
with low distortion. It features unity-gain bandwidth for
maximum output swing condition, high slew rate and
high output current. The device also provides ESD
diodes to protect the input and has output short-circuit
protection. The SGM5532L is unity-gain stable.
● CMRR: 140dB (TYP)
● High Open-Loop Gain: 145dB (TYP)
● -40℃ to +85℃ Operating Temperature Range
● Available in a Green SOIC-8 Package
The SGM5532L is available in a Green SOIC-8 package.
It operates over an ambient temperature range of -40℃
to +85℃.
APPLICATIONS
High-End A/V Receiving Machines
Professional Audio Mixers
Video Broadcasting
Video Transcoders for Multichannel Applications
Laptops
Embedded Computers
SG Micro Corp
NOVEMBER 2022 - REV. A
www.sg-micro.com
SGM5532L
Dual Low Noise Operational Amplifier
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SGM
SGM5532L
SOIC-8
SGM5532LYS8G/TR
5532LYS8
XXXXX
Tape and Reel, 4000
-40℃ to +85℃
MARKING INFORMATION
NOTE: XXXXX = Date Code and Vendor Code.
X X X X X
Vendor Code
Date Code - Week
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, +VS to -VS...............................................40V
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
Input Common Mode Voltage Range
.................................................... (-VS) - 0.3V to (+VS) + 0.3V
Junction Temperature .................................................+150℃
Storage Temperature Range........................-65℃ to +150℃
Lead Temperature (Soldering, 10s) ............................+260℃
ESD Susceptibility
DISCLAIMER
SG Micro Corp reserves the right to make any change in
HBM.............................................................................5000V
CDM ............................................................................1000V
circuit design, or specifications without prior notice.
PIN CONFIGURATION
RECOMMENDED OPERATING CONDITIONS
Supply Voltage, +VS to -VS......................................5V to 36V
Operating Temperature Range ......................-40℃ to +85℃
(TOP VIEW)
OUTA
-INA
+INA
-VS
1
2
3
4
8
7
6
5
+VS
OVERSTRESS CAUTION
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
_
OUTB
-INB
+INB
_
+
+
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
SOIC-8
SG Micro Corp
www.sg-micro.com
NOVEMBER 2022
2
SGM5532L
Dual Low Noise Operational Amplifier
ELECTRICAL CHARACTERISTICS
(VS = ±15V, RL = 2kΩ connected to 0V, Full = -40℃ to +85℃, typical values are at TA = +25℃, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
Input Characteristics
3
550
650
+25℃
Full
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
VOS
ΔVOS/ΔT
IB
VCM = 0V
μV
μV/℃
nA
Full
0.6
510
650
750
70
+25℃
Full
VCM = 0V
VCM = 0V
1.3
+25℃
Full
Input Offset Current
IOS
nA
V
100
13
Input Common Mode Voltage Range
Common Mode Rejection Ratio
VCM
Full
-13
128
124
128
124
110
105
140
145
128
+25℃
Full
CMRR VS = ±15V, -13V < VCM < 13V
dB
+25℃
Full
VS = ±15V, VOUT = ±10V, RL = 2kΩ
AOL
Open-Loop Voltage Gain
Output Characteristics
dB
+25℃
Full
VS = ±15V, VOUT = ±10V, RL = 600Ω
150
550
±36
220
300
+25℃
Full
VS = ±15V, RL = 2kΩ
VOUT
Output Voltage Swing from Rail
mV
mA
800
+25℃
Full
VS = ±15V, RL = 600Ω
1100
Output Short-Circuit Current
Power Supply
ISC
VS = ±15V
±26
5
+25℃
Operating Voltage Range
VS
IQ
Full
+25℃
Full
36
8
V
5.5
Quiescent Current
IOUT = 0A
mA
9
115
112
135
+25℃
Full
Power Supply Rejection Ratio
PSRR
VS = 5V to 36V
dB
Dynamic Performance
Gain-Bandwidth Product
Slew Rate
GBP
SR
16
18
MHz
V/μs
μs
+25℃
+25℃
+25℃
+25℃
+25℃
Overload Recovery Time
Maximum Output-Swing Bandwidth
Unity-Gain Bandwidth
ORT
BOM
B1
VIN × G = VS
1.2
280
9.5
VS = ±15V, VOUT = ±10V, RL = 600Ω
VIN = 1mVP-P, RL = 600Ω, G = +100
kHz
MHz
VS = ±15V, VOUT = 10VP-P, f = 1kHz,
G = +1, RL = 600Ω
Total Harmonic Distortion + Noise
THD+N
0.00005
%
+25℃
Noise
Input Voltage Noise
f = 0.1Hz to 10Hz
f = 30Hz
0.3
15
6
μVP-P
+25℃
+25℃
+25℃
+25℃
+25℃
Input Voltage Noise Density
Input Current Noise Density
en
in
nV/√Hz
f = 1kHz
f = 30Hz
3
pA/√Hz
f = 1kHz
1
SG Micro Corp
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NOVEMBER 2022
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SGM5532L
Dual Low Noise Operational Amplifier
TYPICAL PERFORMANCE CHARACTERISTICS
At TA = +25℃, VS = ±15V and RL = 2kΩ, unless otherwise noted.
Large-Signal Step Response
Small-Signal Step Response
G = +1, f = 1kHz, RL = 2kΩ, VOUT = 10VP-P
G = +1, f = 1kHz, RL = 2kΩ, VOUT = 100mVP-P
Time (50μs/div)
Time (50μs/div)
Positive Overload Recovery
Negative Overload Recovery
0V
VIN
VIN
0V
VOUT
0V
VOUT
0V
Time (500ns/div)
Time (500ns/div)
Input Offset Voltage vs. Input Common Mode Voltage
Output Voltage vs. Output Current
160
140
120
100
80
20
15
10
5
VOH
0
-5
VOL
-10
-15
-20
60
40
0
5
10
15
20
25
30
0
10
20
30
40
50
Input Common Mode Voltage (V)
Output Current (mA)
SG Micro Corp
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SGM5532L
Dual Low Noise Operational Amplifier
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
At TA = +25℃, VS = ±15V and RL = 2kΩ, unless otherwise noted.
Output Voltage Swing from Rail vs. Temperature
Output Voltage Swing from Rail vs. Temperature
RL = 600Ω
200
170
140
110
80
800
700
600
500
400
300
200
RL = 2kΩ
VOH
VOH
VOL
VOL
50
-40
-15
10
35
60
85
-40
-15
10
35
60
85
Temperature (℃)
Temperature (℃)
CMRR vs. Temperature
PSRR vs. Temperature
-130
-135
-140
-145
-150
-155
-160
-130
-135
-140
-145
-150
-155
-160
-40
-15
10
35
60
85
-40
-15
10
35
60
85
Temperature (℃)
Temperature (℃)
Input Offset Current vs. Temperature
Input Bias Current vs. Temperature
12
10
8
-300
-400
-500
-600
-700
-800
6
4
2
-40
-15
10
35
60
85
-40
-15
10
35
60
85
Temperature (℃)
Temperature (℃)
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NOVEMBER 2022
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SGM5532L
Dual Low Noise Operational Amplifier
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
At TA = +25℃, VS = ±15V and RL = 2kΩ, unless otherwise noted.
Input Offset Voltage vs. Temperature
0.1Hz to 10Hz Noise
120
100
80
60
40
20
-40
-15
10
35
60
85
Time (5s/div)
Temperature (℃)
Input Current Noise Density vs. Frequency
Input Voltage Noise Density vs. Frequency
10
100
10
1
1
0.1
10
100
1000
10000
10
100
1000
10000
Frequency (Hz)
Frequency (Hz)
THD+N vs. Frequency
VOUT = 10VP-P
G = +1
RL = 600Ω
THD+N vs. Output Amplitude
-105
-110
-115
-120
-125
-130
-40
-60
f = 1kHz
G = +1
RL = 600Ω
-80
-100
-120
-140
10
100
1000
10000
100000
0.001
0.01
0.1
1
10
Frequency (Hz)
Output Amplitude (VRMS
)
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NOVEMBER 2022
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SGM5532L
Dual Low Noise Operational Amplifier
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
At TA = +25℃, VS = ±15V and RL = 2kΩ, unless otherwise noted.
CMRR vs. Frequency
Open-Loop Voltage Gain and Phase vs. Frequency
-30
-50
125
100
75
180
150
120
90
RL = 600Ω
-70
Phase
50
-90
25
60
Open-Loop Voltage Gain
-110
0
30
-25
0
-130
0.1
1
10
100
1000 10000 100000
0.01 0.1
1
10
100 1000 10000100000
Frequency (kHz)
Frequency (kHz)
Output Impedance vs. Frequency
Input Offset Voltage Production Distribution
0.5
0.4
0.3
0.2
0.1
0
25
20
15
10
5
3540 Samples
1 Production Lot
0
0.1
1
10
100
1000
10000
Frequency (kHz)
Input Offset Voltage (μV)
SG Micro Corp
NOVEMBER 2022
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SGM5532L
Dual Low Noise Operational Amplifier
DETAILED DESCRIPTION
The AC and DC characteristics of SGM5532L are
excellent since it is a high-performance amplifier. There
are a lot of advantages for the device: high output
current, high slew rate, high bandwidth for maximum
output swing condition, low output noise and distortion.
The device also provides ESD diodes to protect the
input and has output short-circuit protection. The
SGM5532L is unity-gain stable.
mode signal. It is defined by the ratio between the
change of the input common mode voltage and the
change of the input offset voltage in decibels. The
CMRR of SGM5532L is 140dB.
Slew Rate
The slew rate is the time period for the output change
when input signal is changed. The slew rate of
SGM5532L is 18V/μs.
Unity-Gain Bandwidth
The definition of unity-gain bandwidth is the maximum
supported frequency which can be amplified by an
amplifier without distortion. The unity-gain bandwidth of
SGM5532L is 9.5MHz.
Device Functional Modes
The SGM5532L can be operated as it is powered by a
DC power supply. The amplifier can be operated in
single-supply or dual-supply mode.
Common Mode Rejection Ratio
The common mode rejection ratio illustrates the ability
of an amplifier to reject the unwanted input common
SG Micro Corp
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SGM5532L
Dual Low Noise Operational Amplifier
APPLICATION INFORMATION
The differential output is required in some specific
applications. The following circuit in Figure 1 can
convert the 2V to 10V single-ended input signal to ±8V
output. In order to maximize the linearity of the circuit,
the output is limited intentionally. There are two
amplifiers in the circuit: the Amplifier A is a buffer and
provides VOUT+, the Amplifier B provides VOUT- from an
inverting input and a reference voltage. The range of
VOUT+ and VOUT- is from 2V to 10V so that the VDIFF
(VOUT+ - VOUT-) is ranged from ±8V.
value of VIN and each output of the amplifier are equal
to VREF, which means that the maximum value of the
VDIFF is equal to 2VREF. Moreover, the common mode
output voltage is equal to VREF/2, as shown in Equation
7.
(3)
R
R1
R4
R3
4
VDIFF = VOUT+ - VOUT- = V
×
1 +
- VREF
×
×
1 +
IN
R3
R1 + R2
(4)
(5)
(6)
VOUT+ = V
IN
VOUT- = VREF - V
IN
VDIFF = 2 × V - VREF
IN
V
REF = 12V
V
+ V
2
1
2
OUT+
OUT-
VCM
=
=
VREF
(7)
15V
B
R2
R1
+
Amplifier Selection
VOUT-
For DC accuracy, the linearity of the amplifier should be
taken into consideration. Also, the maximum output
swing and the input common mode range are the
determination of the linearity, which means that a
rail-to-rail amplifier is necessary for the application. On
the other hand, the bandwidth should be also taken into
account. Because the unity-gain bandwidth of the
SGM5532L is 9.5MHz, the circuit can work only for an
input signal less than 9.5MHz.
_
+
VIN
+
R3
R4
VDIFF
A
_
_
VOUT+
Figure 1. Schematic for Single-Ended Input to Differential
Output Conversion
Passive Component Selection
Detailed Design Procedure
The transfer function of VOUT- is related to the tolerance
of the selected resistors, which means that the selected
resistors should be kept as less tolerance as possible.
For the following design, the selected resistors are
36kΩ with less than 2% tolerance. For those users who
care about the noise of the system, the smaller
resistance can be taken into account to make sure that
the resistor noise is smaller than that of the amplifier.
The VOUT+ and VOUT- of the circuit are generated by the
amplified VIN and VREF. VOUT+ is connected directly to
the buffered VIN so that the relationship is shown in
Equation 1. VOUT- is the output of the Amplifier B, which
is obtained by adding a reference and amplified the
buffered VIN. The relationship among VOUT-, VIN and
VREF are shown in Equation 2.
(1)
(2)
VOUT+ = V
IN
R1
R
R4
R3
Power Supply Recommendations
4
VOUT- = VREF
×
×
1 +
- V
×
IN
R1 + R2
R3
The power supply range for SGM5532L is from ±2.5V
to ±18V. Once the power supply voltage exceeds the
±18V range, the device will be permanently damaged.
For noisy power supply conditions, a 100nF bypass
capacitor should be placed close to the power supply
pin to reduce any error coupling. Furthermore, the
Layout Guidelines section provides more information
about the bypass capacitor.
The VDIFF is the difference between two single-ended
outputs, VOUT+ and VOUT-. The transfer function between
the VDIFF and VIN is shown in Equation 3. For
simplification, if R1 = R2 and R3 = R4, the signal gain of
the Amplifier B is one and the corresponding equation
is shown in Equation 6. On the conditions of R1 = R2
and R3 = R4, the transfer function can be simply given
by Equation 6. For normal operation, the maximum
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SGM5532L
Dual Low Noise Operational Amplifier
APPLICATION INFORMATION (continued)
• The external devices (resistors or capacitors) should
Layout
be kept as close as possible to the SGM5532L. To
minimize the impact of parasitic capacitance, the RF
and RG should be placed as close as possible to the
inverting input pin, as shown in Figure 2 and Figure 3.
Layout Guidelines
The following layout suggestions should be considered
for good performance:
• Noise from the power supply is propagated through
the amplifier and degrades the performance of the
corresponding circuit. A bypass capacitor is necessary
for reducing the influence of the noise and providing a
low-impedance path for the noise component.
• For PCB layout, the input traces should be designed
as short as possible to avoid any parasitic capacitor as
the input trace is the most sensitive part.
• The low-impedance guard ring could be taken into
account around the critical traces of the circuit, which
can decrease the leakage currents from the nearby
traces.
• A 100nF low ESR, ceramic bypass capacitor should
be placed as close as possible to the power supply pin
of SGM5532L. For the single-supply applications, the
bypass capacitor should be placed between +VS and
GND.
Layout Example
• For decreasing the influence of the noise, the analog
and digital ground should be separated. The GND
planes are usually used in the application of multi-layer
layout, which can reduce the EMI and noise pickup.
The analog and digital ground should be separated
physically, and the direction of the ground current
should be also taken into consideration.
RIN
VIN
+
VOUT
_
RF
RG
• The distance between the input traces and the power
supply traces should be maximized to reduce the
parasitic coupling. However, if the sensitive traces are
impossible to be kept away from the noisy trace, place
them perpendicular to the noisy traces.
Figure 2. Non-Inverting Operational Amplifier Schematic
The RF and RG should be
placed as close as possible
to the inverting input pin to
minimize the impact of
parasitic capacitance.
+VS
RF
OUTA
+VS
A low ESR, ceramic
bypass capacitor
The distance between the
input traces and the power
supply traces should be
maximized to reduce the
parasitic coupling.
RG
GND
VIN
-INA
+INA
-VS
OUTB
-INB
should be placed as
close as possible to the
power supply pin.
GND
SGM5532L
RIN
+INB
Only for
dual-supply
operation
GND
-VS (or GND for single-supply operation)
Ground (GND) plane on another layer
Figure 3. Non-Inverting Operational Amplifier Board Layout
SG Micro Corp
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NOVEMBER 2022
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SGM5532L
Dual Low Noise Operational Amplifier
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (NOVEMBER 2022) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
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11
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOIC-8
0.6
D
e
2.2
E1
E
5.2
b
1.27
RECOMMENDED LAND PATTERN (Unit: mm)
L
A
A1
c
θ
A2
Dimensions
In Millimeters
Dimensions
In Inches
Symbol
MIN
MAX
1.750
0.250
1.550
0.510
0.250
5.100
4.000
6.200
MIN
MAX
0.069
0.010
0.061
0.020
0.010
0.200
0.157
0.244
A
A1
A2
b
1.350
0.100
1.350
0.330
0.170
4.700
3.800
5.800
0.053
0.004
0.053
0.013
0.006
0.185
0.150
0.228
c
D
E
E1
e
1.27 BSC
0.050 BSC
L
0.400
0°
1.270
8°
0.016
0°
0.050
8°
θ
NOTES:
1. Body dimensions do not include mode flash or protrusion.
2. This drawing is subject to change without notice.
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PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
SOIC-8
13″
12.4
6.40
5.40
2.10
4.0
8.0
2.0
12.0
Q1
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PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
13″
386
280
370
5
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TX20000.000
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