SI4827-A10-CS [SILICON]
Audio Single Chip Receiver,;
| 型号： | SI4827-A10-CS |
| 厂家： | 
SILICON |
| 描述： | Audio Single Chip Receiver, 商用集成电路 |
| 文件： | 总25页 (文件大小：272K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si4827-A10
BROADCAST ANALOG TUNING DIGITAL DISPLAY
AM/FM/SW RADIO RECEIVER
Features
Worldwide FM band support
(64–109 MHz)
Minimal BOM components with no
manual alignment
Worldwide AM band support
(504–1750 kHz)
SW band support (2.3–28.5 MHz)
Excellent real-world performance
China TV channels audio carrier
reception in FM band
Selectable support for all AM/FM/SW 2.0 to 3.6 V supply voltage
regional bands
Wide range of ferrite loop sticks and
air loop antenna support
16-pin SOIC package
RoHS compliant
Not EN55020 compliant *
Enhanced FM/SW band coverage
2-wire control interface
Mono output
Ordering Information:
See page 19.
Valid station indicator
*Note: For consumer applications that
require EN 55020 compliance, use
Si4844-B.
Digital volume support
Bass/Treble support
Pin Assignments
Applications
Si4827-A10 (SOIC)
Table and portable radios
Boom boxes
Clock radios
Modules for consumer electronics
Toys, lamps, and any application
needing an AM/FM/SW radio
1
16
15
14
13
12
11
10
9
AOUT
GND
IRQ
TUNE1
TUNE2
BAND
NC
2
3
4
5
6
7
8
VDD
Description
XTALI
XTALO/LNA_EN
SCLK
The Si4827 is an entry level analog-tuned digital-display digital CMOS AM/FM/SW
radio receiver IC that integrates the complete receiver function from antenna input
to audio output. Working with Host MCU (I2C-compatible 2-wire control interface),
frequencies information can be displayed on LCD while the analog-tune features
are kept. The Si4827 enhances the FM and SW band coverage, and further
supports China TV channels audio reception in FM band. The superior control
algorithm integrated in the Si4827 provides an easy and reliable control interface
while eliminating all the manual tuned external components used in traditional
solutions.
FMI
RFGND
AMI
SDIO
RST
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
Functional Block Diagram
7,272,373;
7,355,476;
7,339,503; 7,339,504.
7,272,375;
7,426,376;
7,321,324;
7,471,940;
Si4827
ADC
ADC
AMI
AM
ANT
LNA
AGC
DSP
DAC
ADC
AOUT
RFGND
FM
ANT
FMI
0/90
TUNE1/2
BAND
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD
XTAL
OSC
Rev. 1.0 5/13
Copyright © 2013 by Silicon Laboratories
Si4827-A10
Si4827-A10
2
Rev. 1.0
Si4827-A10
TABLE OF CONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.7. Bass and Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.8. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.9. High Fidelity DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.10. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.11. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.12. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.13. Memorizing Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.14. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
6. Pin Descriptions: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
8. Package Outline: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
9. PCB Land Pattern: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
10. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
10.1. Si4827-A10 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
10.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
11. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Rev. 1.0
3
Si4827-A10
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol
Test Condition
Min
2.0
10
0
Typ
—
Max
3.6
—
Unit
V
3
Supply Voltage
V
DD
DDRISE
Power Supply Powerup Rise Time
Ambient Temperature Range
Notes:
V
—
µs
T
25
70
°C
A
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
FM Mode
Symbol
Test Condition
Min
—
Typ
21.0
20.0
10
Max
—
Unit
mA
mA
µA
*
Supply Current
AM/SW Mode
Supply Current
I
FM
*
I
—
—
AM
Supplies and Interface
V
Powerdown
I
—
—
DD
DDPD
Current
*Note: Specifications are guaranteed by characterization.
4
Rev. 1.0
Si4827-A10
Table 3. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
RSTB Pulse Width
Symbol
Min
100
100
100
Typ
—
Max
—
Unit
µs
t
PRST
2-wire Bus Idle Time After RSTB Rises
t
—
—
µs
SDIO
SRST
2-wire Bus Idle Time Before RSTB Rises, and VDD Valid
Time Before RSTB Rises
t
—
—
µs
RSTB Low Time Before VDD Becomes Invalid
t
0
—
—
µs
RRST
Notes:
1. RSTB must be held low for at least 100 µs after the voltage supply has been ramped up.
2. RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down.
tSRST
tPRST
VDD
tRRST
tSDIO
tSDIO
RSTB
SCLK
SDIO
Normal
Operation
Normal
Operation
POWER_UP
POWER_UP
Figure 1. Reset Timing
Rev. 1.0
5
Si4827-A10
Table 4. 2-Wire Control Interface Characteristics1,2,3
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
SCLK Frequency
Symbol Test Condition
Min
0
Typ
—
Max
400
—
Unit
kHz
µs
f
SCLK
SCLK Low Time
SCLK High Time
t
1.3
0.6
0.6
—
LOW
HIGH
t
—
—
µs
SCLK Input to SDIO Setup
t
t
—
—
µs
SU:STA
(START)
SCLK Input to SDIO Hold
0.6
—
—
µs
HD:STA
(START)
SDIO Input to SCLK Setup
t
t
100
0
—
—
—
—
900
—
ns
ns
µs
SU:DAT
4,5
SDIO Input to SCLK Hold
HD:DAT
SU:STO
SCLK input to SDIO Setup
t
0.6
(STOP)
STOP to START Time
SDIO Output Fall Time
t
1.3
—
—
—
µs
ns
BUF
t
250
f:OUT
Cb
----------
1pF
20 + 0.1
SDIO Input, SCLK Rise/Fall Time
t
t
—
300
ns
f:IN
r:IN
Cb
----------
1pF
20 + 0.1
SCLK, SDIO Capacitive Loading
Input Filter Pulse Suppression
Notes:
C
—
—
—
—
50
50
pF
ns
b
t
SP
1. When VD = 0 V, SCLK and SDIO are low impedance.
2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is
high) does not occur within 300 ns before the rising edge of RST.
3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high
until after the first start condition.
4. The Si4827 delays SDIO by a minimum of 300 ns from the VIH threshold of SCLK to comply with the minimum tHD:DAT
specification.
5. The maximum tHD:DAT has only to be met when fSCLK = 400 kHz. At frequencies below 400 kHz, tHD:DAT may be
violated as long as all other timing parameters are met.
6
Rev. 1.0
Si4827-A10
tSU:STA tHD:STA
tLOW
tHIGH
tr:IN
tf:IN
tSP
tSU:STO
tBUF
70%
30%
SCLK
SDIO
70%
30%
tf:IN,
tf:OUT
START
tHD:DAT tSU:DAT
tr:IN
STOP
START
Figure 2. 2-Wire Control Interface Read and Write Timing Parameters
SCLK
SDIO
A6-A0,
R/W
D7-D0
D7-D0
START
ADDRESS + R/W
ACK
DATA
ACK
DATA
ACK
STOP
Figure 3. 2-Wire Control Interface Read and Write Timing Diagram
Rev. 1.0
7
Si4827-A10
Table 5. FM Receiver Characteristics1,2
(V = 2.7 to 3.6 V, TA = 0 to 70 °C)
DD
Parameter
Input Frequency
Symbol
Test Condition
Min
64
Typ
—
Max
109
—
Unit
MHz
f
RF
Sensitivity with Headphone
(S+N)/N = 26 dB
—
4.0
µV EMF
3
Network
4,5
—
—
—
—
—
—
—
—
—
15
—
10
—
4
5
—
—
—
—
—
—
—
—
30
—
0.5
—
50
k
LNA Input Resistance
4,5
pF
dB
LNA Input Capacitance
4,5,6,7
m = 0.3
50
105
45
60
72
45
—
—
0.1
—
—
AM Suppression
4,8
dBµV EMF
dB
Input IP3
4
±200 kHz
±400 kHz
Adjacent Channel Selectivity
4
dB
Alternate Channel Selectivity
5,6,7,12
mV
Audio Output Voltage
RMS
5,6,7,9,10
dB
Audio Mono S/N
4
–3 dB
–3 dB
Hz
kHz
%
Audio Frequency Response Low
4
Audio Frequency Response High
5,6,11
Audio THD
4,10
R
Single-ended
Single-ended
k
pF
Audio Output Load Resistance
L
L
4,10
C
Audio Output Load Capacitance
Notes:
1. Additional testing information is available in “AN603: Si4822/26/27/40/44-DEMO Board Test Procedure”
Volume = maximum for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. Frequency is 64~109 MHz.
4. Guaranteed by characterization.
5. V
6. F
= 1 mV.
EMF
= 1 kHz, MONO, and L = R unless noted otherwise.
MOD
7. f = 22.5 kHz.
8. |f – f | > 2 MHz, f = 2 x f – f .
2
1
0
1
2
9. B = 300 Hz to 15 kHz, A-weighted.
AF
10. At A
pin.
OUT
11. f = 75 kHz.
12. Tested in Digital Volume Mode.
8
Rev. 1.0
Si4827-A10
Table 6. AM/SW Receiver Characteristics1, 2
(V = 2.7 to 3.6 V, TA = 0 to 70 °C)
DD
Parameter
Symbol
Test Condition
Medium Wave (AM)
Short Wave (SW)
(S+N)/N = 26 dB
Min
504
2.3
—
Typ
—
Max
1750
28.5
—
Unit
kHz
Input Frequency
f
RF
—
MHz
3,4,5
30
µV EMF
Sensitivity
5
THD < 8%
—
—
300
40
—
—
mV
Large Signal Voltage Handling
RMS
RMS
5
∆V = 100 mVRMS, 100 Hz
dB
Power Supply Rejection Ratio
DD
3,6,8
—
54
—
mV
Audio Output Voltage
3,4,6
—
45
—
dB
Audio S/N
3,6
—
0.1
—
—
%
Audio THD
5,7
180
450
µH
Antenna Inductance
Notes:
1. Additional testing information is available in “AN603: Si4822/26/27/40/44 DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 6 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. B = 300 Hz to 15 kHz, A-weighted.
AF
5. Guaranteed by characterization.
6. V = 5 mVrms.
IN
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
8. Tested in Digital Volume Mode.
Table 7. Reference Clock and Crystal Characteristics
(V = 2.7 to 3.6 V, TA = 0 to 70 °C)
DD
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Reference Clock
XTALI Supported Reference Clock
Frequencies*
31.130
–100
32.768
—
40,000
100
kHz
Reference Clock Frequency
Tolerance for XTALI
ppm
REFCLK_PRESCALE
REFCLK
1
—
4095
31.130
32.768
34.406
kHz
Crystal Oscillator
Crystal Oscillator Frequency
—
–100
—
32.768
—
—
100
3.5
kHz
ppm
pF
Crystal Frequency Tolerance
Board Capacitance
—
*Note: The Si4827-A10 divides the RCLK input by REFCLK_PRESCALE to obtain REFCLK. There are some RCLK
frequencies between 31.130 kHz and 40 MHz that are not supported. For more details, see Table 9 of "AN610:
Si48xx ATDD Programming Guide.”
Rev. 1.0
9
Si4827-A10
Table 8. Thermal Conditions
Parameter
Thermal Resistance*
Ambient Temperature
Junction Temperature
Symbol
Min
—
0
Typ
80
Max
—
Unit
°C/W
°C
JA
T
25
70
A
T
—
—
77
°C
J
*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad.
Table 9. Absolute Maximum Ratings1,2
Parameter
Supply Voltage
Symbol
Value
–0.5 to 5.8
10
Unit
V
V
I
DD
IN
3
Input Current
mA
°C
Operating Temperature
Storage Temperature
T
–40 to 95
–55 to 150
0.4
OP
T
°C
STG
4
RF Input Level
V
PK
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4827-A10 devices are high-performance RF integrated circuits with certain pins having an ESD rating of
< 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, SDIO, SCLK, XTALO/LNA_EN, XTALI, BAND, TUNE2, TUNE1 and IRQ.
4. At RF input pins, FMI, and AMI.
10
Rev. 1.0
Si4827-A10
2. Typical Application Schematic
TUNE1
R1
203k 1%
SW
FMI
R2
50k 1%
S1
1
VR1
100k
BAND
2
3
4
AM
R3
180k 1%
IRQ
To host MCU
C5
FM
0.47u
R4
67k 1%
C5
AMI
0.47u
Optional
ANT2
RFGND
T1
AOUT
C1
0.1u
Optional: AM air loop antenna
C4
0.1u
RESET
SDIO
VDD
2.0 TO 3.6V
To host MCU
SCLK
Y1
32.768KHz
C3
22p
C2
22p
Optional
Notes:
1. Place C4 close to VDD and GND pins.
2. All grounds connect directly to GND plane on PCB.
3. Pin 5 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Labs will evaluate the schematics and layouts for qualified
customers.
5. Pin 6 connects to the FM antenna interface and pin 8 connects to the AM antenna interface.
6. Place Si4827 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the Si4827.
8. Keep the AM ferrite loop antenna away from MCU, audio amplifier, and other circuits which have AM interference.
9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4827.
Rev. 1.0
11
Si4827-A10
3. Bill of Materials
Table 10. Si4827-A10 Bill of Materials
Component(s)
Value/Description
Supplier
Murata
C1
C4
Reset capacitor 0.1 µF, ±20%, Z5U/X7R
Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Ferrite bead 2.5 k/100 MHz
Murata
C5
Murata
B1
Murata
VR1
U1
Variable resistor (POT), 100 k, ±10%
Kennon
Si4827-A AM/FM/SW Analog Tune Digital Display Radio
Tuner
Silicon Laboratories
ANT1
Ferrite stick,180–450 μH
Jiaxin
Optional Components
C2, C3
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
Venkel
Y1
ANT2
S1
32.768 kHz crystal (Optional: for crystal oscillator option)
Air loop antenna, 10–20 μH
Epson or equivalent
Various
Band switch
Any, depends on
customer
R1
R2
R3
R4
Resistor, 203 k
Resistor, 50 k, ±1%,
Resistor, 180 k, ±1%
Resistor, 67 k, ±1%
Venkel
Venkel
Venkel
Venkel
12
Rev. 1.0
Si4827-A10
4. Functional Description
Si4827
ADC
ADC
AMI
AM
ANT
LNA
DSP
DAC
AOUT
RFGND
FM
ANT
AGC
FMI
0/90
TUNE1/2
BAND
ADC
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD
XTAL
OSC
Figure 4. Si4827-A10 Functional Block Diagram
Like other successful audio products from Silicon Labs,
Si4827 offers unmatched integration and PCB space
savings with minimum external components and a small
board area on a single side PCB. The high integration
and complete system production test simplifies design-
in, increases system quality, and improves
manufacturability. The receiver has very low power
consumption, runs off two AAA batteries, and delivers
the performance benefits of high performance digital
radio experience with digital display to the legacy
analog-tuned radio market.
4.1. Overview
The Si4827-A10 is the entry level analog-tuned digital-
display digital CMOS AM/FM/SW radio receiver IC that
integrates the complete receiver function from antenna
input to audio output. Working with an external MCU
with LCD/LED driver, Si4827 can output the AM/FM/SW
frequencies and band and volume information to display
on LCD/LED, while using a simple potentiometer at the
front end for analog-tune. Leveraging Silicon
Laboratories' proven and patented digital low
intermediate frequency (low-IF) receiver architecture,
the Si4827 delivers superior RF performance and
interference rejection in AM, FM and SW bands.
Additionally, the digital core provides advanced audio
conditioning for all environments, removing pops, clicks,
and loud static in variable signal conditions. The
superior control algorithm integrated in Si4827 provides
easy and reliable control interface while eliminating all
The Si4827 provides good flexibility in using the chip.
The frequency range of FM/AM/SW bands, de-
emphasis value, AM tuning step, and AM soft mute
level/rate can be either configured by the MCU or by
using external hardware to make a selection. The
reference clock of the FM tuner can be provided by
either the crystal or by the host MCU within tolerance.
the manual tuned external components used in The Si4827 also has flexibility in selecting bands and
traditional solutions.
configuring band properties, enabling masked Host
MCU for multiple projects, and reducing the cost of
development. Four tuning preferences are available to
meet different tuning preference requirements.
Rev. 1.0
13
Si4827-A10
4.2. FM Receiver
4.4. SW Receiver
The Si4827-A10 integrates a low noise amplifier (LNA) The Si4827 supports short wave band receptions from
supporting the worldwide FM broadcast band (64 to 2.3 to 28.5 MHz in 5 kHz step size increments. It can
109 MHz) and the TV audio stations within the also be configured to have wide SW band that can be
frequency range in China area are also supported. The used in SW radio with 1 or 2 SW bands. The Si4827
FM band can also be configured to be wider range such supports extensive short wave features such as minimal
as 64–108 MHz in one band.
discrete components and no factory adjustments. The
Si4827 supports using the FM antenna to capture short
wave signals. Refer to “AN610: Si48xx ATDD
Programming Guide” and "AN602: Si4822/26/27/40/44
Antenna, Schematic, Layout, and Design Guidelines"
for more details.
Pre-emphasis and de-emphasis is a technique used by
FM broadcasters to improve the signal-to-noise ratio of
FM receivers by reducing the effects of high frequency
interference and noise. When the FM signal is
transmitted,
a
pre-emphasis filter is applied to
accentuate the high audio frequencies. All FM receivers
incorporate a de-emphasis filter which attenuates high
frequencies to restore a flat frequency response. Two
time constants are used in various regions. The de-
emphasis time constant can be chosen to be 50 or
75 μs. Refer to "AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines."
4.5. Frequency Tuning
A
valid channel can be found by tuning the
potentiometer that is connected to the TUNE1 and
TUNE2 pin of the Si4827-A10 chip.
To offer easy tuning, the Si4827-A10 also outputs the
tuned information to the MCU with LCD/LED driver to
display. It will light up the icon on display if the RF signal
quality passes a certain threshold when tuned to a valid
station. Refer to "AN610: Si48xx ATDD Programming
Guide" for more details.
4.3. AM Receiver
The highly integrated Si4827-A10 supports worldwide
AM band reception from 504 to 1750 kHz with five sub-
bands using a digital low-IF architecture with a minimum
number of external components and no manual
alignment required. This patented architecture allows
for high-precision filtering, offering excellent selectivity
and SNR with minimum variation across the AM band.
Similar to the FM receiver, the Si4827-A10 optimizes
sensitivity and rejection of strong interferers, allowing
better reception of weak stations.
4.6. Band Select
The Si4827-A10 supports worldwide AM band with five
sub-bands, US/Europe/Japan/China FM band with five
sub-bands, and SW band with 16 sub-bands. Si4827-
A10 provides the flexibility to configure the band and
band properties at either the MCU side or the tuner
side, enabling masked MCU for multiple projects. For
details on band selection, refer to "AN602:
Si4822/26/27/40/44 Antenna, Schematic, Layout, and
Design Guidelines" and "AN610: Si48xx ATDD
Programming Guide".
To offer maximum flexibility, the receiver supports a
wide range of ferrite loop sticks from 180–450 μH. An
air loop antenna is supported by using a transformer to
increase the effective inductance from the air loop.
Using a 1:5 turn ratio inductor, the inductance is
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
20 μH.
A 9, 10 kHz tuning step can be chosen by the external
resistor or host MCU according to the different regions,
and AM soft mute level can be programmed by the host
MCU to have different tuning experiences. One of the
AM bands can be configured as a universal AM band
that simultaneously supports 9 kHz and 10 kHz channel
spaces for all regional AM standards. Refer to “AN610:
Si48xx ATDD Programming Guide” and "AN602:
Si4822/26/27/40/44 Antenna, Schematic, Layout, and
Design Guidelines" for more details.
14
Rev. 1.0
Si4827-A10
4.12. Reset, Powerup, and Powerdown
4.7. Bass and Treble
Setting the RSTB pin low will disable analog and digital
circuitry, reset the registers to their default settings, and
disable the bus. Setting the RSTB pin high will bring the
device out of reset.
The Si4827-A10 supports Bass/Treble tone control for
superior sound quality. The Si4827-A10 can be set to be
default normal, or programmed by the host MCU I C-
compatible 2-wire mode. FM has nine levels
Bass/Treble effect and AM/SW has seven levels
Bass/Treble effect. For further configuration details,
refer to "AN610: Si48xx ATDD Programming Guide".
2
Figure 1 shows typical reset, startup, and shutdown
timings for the Si4827. RSTB must be held low
(asserted) during any power supply transitions and kept
asserted as specified in Figure 1 after the power
supplies are ramped up and stable. Failure to assert
RSTB as indicated here may cause the device to
malfunction and may result in permanent device
damage.
4.8. Volume Control
The Si4827-A10 not only allows users to use the
traditional PVR wheel volume control through an
external speaker amplifier, it also supports digital
volume control programmed by the host MCU. Si4827-
A10 can be programmed to be Bass/Treble mode only
or digital volume mode only; it can also be programmed
to have the digital volume coexist with Bass/Treble in
two modes. Refer to "AN610: Si48xx ATDD
Programming Guide" and "AN602: Si4822/26/27/40/44
Antenna, Schematic, Layout, and Design Guidelines"
for more details.
A powerdown mode is available to reduce power
consumption when the part is idle. Putting the device in
powerdown mode will disable analog and digital circuitry
while keeping the bus active.
4.13. Memorizing Status
The Si4827-A10 provides the feature to memorize
status from the last power down with a simple design on
PCB, including frequency of the FM/AM/SW station.
Refer to "AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines" for details.
4.9. High Fidelity DAC
High-fidelity digital-to-analog converters (DACs) drive
analog audio signals onto the AOUT pin. The audio
output may be muted.
4.14. Programming with Commands
To ease development time and offer maximum
customization, the Si4827 provides a simple yet
powerful software interface to program the receiver. The
device is programmed using commands, arguments,
properties, and responses.
4.10. Soft Mute
The soft mute feature is available to attenuate the audio
outputs and minimize audible noise in very weak signal
conditions. Advanced algorithm is implemented to get a
better analog tuning experience. The soft mute feature
is triggered by the SNR metric. The SNR threshold for
activating soft mute is programmable, as are soft mute
attenuation levels and attack and decay rates.
To perform an action, the user writes a command byte
and associated arguments, causing the chip to execute
the given command. Commands control an action such
as powerup the device, shut down the device, or get the
current tuned frequency. Arguments are specific to a
given command and are used to modify the command.
4.11. Reference Clock
The Si4827-A10 supports RCLK input (to XTALI pin)
with the spec listed in Table 7. It can be shared with the
host MCU to save extra crystal.
Properties are a special command argument used to
modify the default chip operation and are generally
configured immediately after powerup. Examples of
properties are de-emphasis level and soft mute
attenuation threshold.
An onboard crystal oscillator is available to generate the
32.768 kHz reference when an external crystal and
load capacitors are provided. Refer to "AN602:
Si4822/26/27/40/44 Antenna, Schematic, Layout, and
Design Guidelines" for more details.
Responses provide the user information and are
echoed after a command and associated arguments are
issued. All commands provide a 1-byte status update,
indicating interrupt and clear-to-send status information.
For a detailed description of the commands and
properties for the Si4827, see "AN610: Si48xx ATDD
Programming Guide".
Rev. 1.0
15
Si4827-A10
5. Commands and Properties
Table 11. Si4827-A10 FM Receiver Command Summary
Cmd
0xE0
0xE1
0xE2
0x10
0x11
0x12
0x13
Name
Description
Get tune freq, band and etc., status of the device.
Power up device, band selection, and band properties setup.
Audio output mode: get/set audio mode and settings.
Returns the revision information of the device.
Power down device.
ATDD_GET_STATUS
ATDD_POWER_UP
ATDD_AUDIO_MODE
GET_REV
POWER_DOWN
SET_PROPERTY
GET_PROPERTY
Sets the value of a property.
Retrieve a property's value.
Note: The Si4827 has its own power up and get status commands which are different from previous si47xx tuner parts. To
differentiate, we use "ATDD_POWER_UP" and ATDD_GET_STATUS to denote the ATDD specific commands instead
of the general si47xx "POWER_UP" and "STATUS" commands.
Table 12. Si4827-A10 FM Receiver Property Summary
Prop
Name
Description
Default
0x0201
REFCLK_FREQ
Sets frequency of reference clock in Hz.
The range is 31130 to 34406 Hz, or 0 to disable the AFC.
Default is 32768 Hz.
0x8000
0x0202
0x1100
0x1300
REFCLK_PRESCALE
FM_DEEMPHASIS
Sets the prescaler value for RCLK input.
0x0001
0x0002
0x0040
Sets deemphasis time constant. Default is 75 μs.
FM_SOFT_MUTE_RATE Sets the attack and decay rates when entering and leaving
soft mute.
0x1301 FM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenua-
tion per dB SNR below the soft mute SNR threshold. Default
value is 2.
0x0002
0x1302
FM_SOFT_MUTE_
MAX_ATTENUATION
Sets maximum attenuation during soft mute (dB). Set to 0 to
disable soft mute. Default is 16 dB.
0x0010
0x0004
0x003F
0x1303
FM_SOFT_MUTE_
SNR_THRESHOLD
Sets SNR threshold to engage soft mute. Default is 4 dB.
0x4000
0x4001
RX_VOLUME
Sets the output volume.
RX_HARD_MUTE
Mutes the audio output. L and R audio outputs may be muted 0x0000
independently.
0x4002
0x4003
RX_BASS_TREBLE
Sets the output bass/treble level.
Read the actual output volume.
0x0004
0x003F
RX_ACTUAL_VOLUME
16
Rev. 1.0
Si4827-A10
Table 13. Si4827-A10 AM/SW Receiver Command Summary
Cmd
0xE0
0xE1
0xE2
0x10
0x11
0x12
0x13
Name
Description
ATDD_GET_STATUS
ATDD_POWER_UP
ATDD_AUDIO_MODE
GET_REV
Get tune freq, band and etc status of the device
Power up device, band selection, and band properties setup
Audio output mode: get/set audio mode settings.
Returns the revision information of the device.
Power down device.
POWER_DOWN
SET_PROPERTY
GET_PROPERTY
Sets the value of a property.
Retrieve a property's value.
Note: The Si4827 has its own power up and get status commands which are different from previous si47xx tuner parts. To
differentiate, we use "ATDD_POWER_UP" and ATDD_GET_STATUS to denote the ATDD specific commands instead
of the general Si47xx "POWER_UP" and "STATUS" commands.
Table 14. Si4827-A10 AM/SW Receiver Property Summary
Prop
Name
Description
Default
0x0201
REFCLK_FREQ
Sets frequency of reference clock in Hz.
The range is 31130 to 34406 Hz, or 0 to disable the AFC.
Default is 32768 Hz.
0x8000
0x0202
0x4000
0x4001
REFCLK_PRESCALE
RX_VOLUME
Sets the prescaler value for RCLK input.
Sets the output volume.
0x0001
0x003F
0x0000
RX_HARD_MUTE
Mutes the audio output. L and R audio outputs may be muted
independently.
0x4002
0x4003
RX_BASS_TREBLE
Sets the output bass/treble level.
Read the actual output volume.
0x0003
0x003F
0x0040
RX_ACTUAL_VOLUME
0x3300 AM_SOFT_MUTE_RATE Sets the attack and decay rates when entering and leaving
soft mute.
0x3301 AM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenua-
tion per dB SNR below the soft mute SNR threshold.
0x0002.,
0x0010
0x3302
AM_SOFT_MUTE_
Sets maximum attenuation during soft mute (dB). Set to 0 to
disable soft mute.
MAX_ATTENUATION
0x3303
AM_SOFT_MUTE_
SNR_THRESHOLD
Sets SNR threshold to engage soft mute.
0x0008
Rev. 1.0
17
Si4827-A10
6. Pin Descriptions: Si4827-A10
1
AOUT
GND
16
15
14
13
12
11
10
9
IRQ
2
TUNE1
3
TUNE2
VDD
4
XTALI
BAND
5
NC
XTALO/LNA_EN
SCLK
6
FMI
7
RFGND
SDIO
8
AMI
RST
Pin Number(s)
Name
IRQ
Description
1
2
Interrupt request.
Frequency tuning.
Frequency tuning.
TUNE1
TUNE2
BAND
NC
3
4
Band selection and de-emphasis selection.
No connect. Leave floating.
5
6
FMI
FM RF inputs. FMI should be connected to the antenna trace.
RF ground. Connect to ground plane on PCB.
AM RF input. AMI should be connected to the AM antenna.
Device reset (active low) input.
7
RFGND
AMI
8
9
RST
10,
11
12
SDIO
SCLK
Serial data input/output.
Serial clock input.
XTALO/LNA_EN Crystal oscillator output, enable the SW external LNA in SW mode when not
used as XTALO.
13,
14
15
16
XTALI
VDD
Crystal oscillator input/external reference clock input
Supply voltage. May be connected directly to battery.
Ground. Connect to ground plane on PCB.
Audio output.
GND
AOUT
18
Rev. 1.0
Si4827-A10
7. Ordering Guide
1,2
Description
Package Type
Operating
Temperature/Voltage
Part Number
Si4827-A10-CS
AM/FM/SW Broadcast Analog Tune
Digital Display Radio Receiver
16L SOIC Pb-free
0 to 70 °C
2.0 to 3.6 V
Notes:
1. Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for V voltage ramped down to 2.0 V.
DD
2. The -C suffix in the part number indicates Consumer Grade product. Visit www.silabs.com to get more information on
product grade specifications.
Rev. 1.0
19
Si4827-A10
8. Package Outline: Si4827-A10
The 16-pin SOIC illustrates the package details for the Si4827-A10. Table 15 lists the values for the dimensions
shown in the illustration.
Figure 5. 16-Pin SOIC
Table 15. Package Dimensions
Dimension
Min
—
0.10
1.25
0.31
0.17
Max
1.75
0.25
—
0.51
0.25
A
A1
A2
b
c
D
E
E1
e
9.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
L
0.40
1.27
L2
h
θ
0.25 BSC
0.25
0°
0.50
8°
aaa
bbb
ccc
ddd
0.10
0.20
0.10
0.25
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MS-012, Variation AC.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
20
Rev. 1.0
Si4827-A10
9. PCB Land Pattern: Si4827-A10
Figure 6 illustrates the PCB land pattern details for the Si4827-A10-CS SOIC. Table 16 lists the values for the
dimensions shown in the illustration.
Figure 6. PCB Land Pattern
Table 16. PCB Land Pattern Dimensions
Dimension
Feature
(mm)
5.40
1.27
0.60
1.55
C1
E
Pad Column Spacing
Pad Row Pitch
Pad Width
X1
Y1
Pad Length
Notes:
1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X165-16N
for Density Level B (Median Land Protrusion).
2. All feature sizes shown are at Maximum Material Condition (MMC) and a card
fabrication tolerance of 0.05 mm is assumed.
Rev. 1.0
21
Si4827-A10
10. Top Markings
10.1. Si4827-A10 Top Marking
10.2. Top Marking Explanation
Mark Method:
Pin 1 Mark:
Laser
Mold Dimple (Bottom-Left Corner)
0.71 mm (2.0 Point) Right-Justified
Font Size:
Line 1 Marking:
Customer Part Number
Si4827A10
Circle = 1.3 mm Diameter
“e3” Pb-Free Symbol
YY = Year
WW = Work week
Assigned by the Assembly House. Corresponds to the year
and work week of the mold date.
Line 2 Marking:
Manufacturing Code from the Assembly Purchase Order form.
TTTTTT = Manufacturing code
22
Rev. 1.0
Si4827-A10
11. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines
AN603: Si4822/26/27/40/44-DEMO Board Test Procedure
Si4827-DEMO Board User’s Guide
AN610: Si48xx ATDD Programming Guide
Rev. 1.0
23
Si4827-A10
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.8
Updated "Features"
Added ambient temperature range to "Table 1.
Recommended Operating Conditions"
Updated Table 6, "AM/SW Receiver Characteristics"
Updated Table 7, "Reference Clock and Crystal
Characteristics"
Updated Section "2.Typical Application Schematic"
Updated Section “4.3. AM Receiver"
Updated Section “4.7. Bass and Treble"
Updated Section 6 "Pin Descriptions: Si4827-A10"
Updated Section “8. Package Outline: Si4827-A10”
Revision 0.8 to Revision 1.0
Updated Table 3. "Reset Timing Characteristics"
Updated "Pin Assignment"
Inserted Section 4.12. "Reset, Powerup, and
Powerdown"
24
Rev. 1.0
Si4827-A10
CONTACT INFORMATION
Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Email: FMinfo@silabs.com
Internet: www.silabs.com
Patent Notice
Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-
intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team.
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-
plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
Rev. 1.0
25
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