SI4835-B30-GU [SILICON]
Receiver IC, PDSO24, ROHS COMPLIANT, MO-137AE, SSOP-24;
| 型号： | SI4835-B30-GU |
| 厂家： | 
SILICON |
| 描述： | Receiver IC, PDSO24, ROHS COMPLIANT, MO-137AE, SSOP-24 光电二极管 商用集成电路 |
| 文件： | 总20页 (文件大小：1210K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si4831/35-B30
BROADCAST MECHANICAL TUNING AM/FM/SW RADIO RECEIVER
Features
Worldwide FM band support
(64–109 MHz)
Worldwide AM band support
(504–1750 kHz)
SW band support (Si4835 only)
(5.6–22 MHz)
Excellent real-world performance
EN55020-compliant
Automatic frequency control (AFC)
Integrated LDO regulator
2.0 to 3.6 V supply voltage
Wide range of ferrite loop sticks and air
loop antennas supported
24-pin SSOP
RoHS-compliant
Supports station and stereo LED
indicators
No manual alignment necessary
Flexible band selections
Ordering Information:
Direct volume control
Bass and treble tone control
See page 13.
Applications
Pin Assignments
Table and portable radios
Stereos
Mini/micro systems
CD/DVD players
Boom boxes
Modules
Clock radios
Mini HiFi
Si4831/35-B30 (SSOP)
Entertainment systems
1
2
24
23
22
21
20
19
18
17
16
15
14
13
STEREO
STATION
TUNE1
TUNE2
BAND
NC
LOUT
ROUT
Description
3
DBYP
4
VDD2
The Si4831/35-B30 is the 2nd generation mechanical-tuned digital CMOS
AM/FM/SW radio receiver IC that integrates the complete receiver function from
antenna input to audio output. Like other successful audio products from Silicon
Labs, Si4831/35-B30 offers unmatched integration and PCB space savings with
minimum external components and a small board area. The Si4831/35-B30
requires a simple application circuit and removes any requirements for manually
tuning components during the manufacturing process. The Si4831/35-B30 is a
very simple product to design, manufacture, and support across multiple product
lines. The receiver has very low power consumption, runs off two AAA batteries,
and delivers the performance benefits of digital tuning to the analog radio market.
5
VDD1
6
XTALI
7
NC
XTALO
VOL-/BASS
VOL+/TREBLE
RST
8
FMI
9
RFGND
NC
10
11
12
NC
GND
AMI
GND
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
Functional Block Diagram
Si4831/35
ADC
ADC
DAC
LOUT
ROUT
AMI
AM
7,272,373;
7,355,476;
7,272,375;
7,426,376;
7,321,324;
7,471,940;
LNA
AGC
DSP
ANT
RFGND
DAC
7,339,503; 7,339,504.
FM/SW
ANT
FMI
0/90
TUNE 1/2
BAND
ADC
AFC
REG
XTALI
2.0~3.6V
CONTROL
INTERFACE
VDD1/2
XTAL
OSC
Rev. 1.0 1/11
Copyright © 2011 by Silicon Laboratories
Si4831/35-B30
Si4831/35-B30
2
Rev. 1.0
Si4831/35-B30
TABLE OF CONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.7. Bass and Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.8. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
5. Pin Descriptions: Si4831/35-B30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
7. Package Markings (Top Marks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
7.1. Si4831/35-B30 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
7.2. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
8. Package Outline: Si4831/35-B30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
9. PCB Land Pattern: Si4831/35-B30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Rev. 1.0
3
Si4831/35-B30
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol Test Condition
Min
2
Typ
—
Max
3.6
—
Unit
V
3
Supply Voltage
V
DD
Power Supply Powerup Rise Time
V
10
—
µs
DDRISE
Ambient Temperature
T
–15
25
85
C
A
Note:
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. Absolute Maximum Ratings1,2
Parameter
Supply Voltage
Symbol
Value
–0.5 to 5.8
10
Unit
V
V
I
DD
IN
3
Input Current
mA
C
Operating Temperature
Storage Temperature
T
–40 to 95
–55 to 150
0.4
OP
T
C
STG
4
RF Input Level
V
PK
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4831/35-B30 devices are high-performance RF integrated circuits with certain pins having an ESD rating of
< 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, VOL+/TREBLE, VOL–/BASS, XTALO, XTALI, BAND, TUNE2, TUNE1, STATION, and STEREO.
4. At RF input pins, FMI and AMI.
4
Rev. 1.0
Si4831/35-B30
Table 3. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
FM Mode
Symbol
Test Condition
Min
Typ
Max
Unit
1
I
—
—
21.0
21.5
—
—
mA
mA
Supply Current
FM
2
I
Low SNR level
Supply Current
FM
AM/SW Mode
1
I
—
—
17.0
10
—
—
mA
µA
Supply Current
AM
Supplies and Interface
V
Powerdown Current
I
DD
DDPD
Notes:
1. Specifications are guaranteed by characterization.
2. LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
Table 4. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Min
100
30
Typ
—
Max
—
Unit
µs
RST Pulse Width and TUNE1, TUNE2 Setup to RST
TUNE1, TUNE2 Hold from RST
t
SRST
t
—
—
ns
HRST
tHRST
tSRST
70%
RST
30%
70%
TUNE1
30%
70%
TUNE2
30%
Figure 1. Reset Timing
Rev. 1.0
5
Si4831/35-B30
Table 5. FM Receiver Characteristics1,2
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Unit
MHz
Symbol
Test Condition
Min
64
Typ
—
Max
109
—
Input Frequency
f
RF
Sensitivity with Headphone
(S+N)/N = 26 dB
—
2.2
µV EMF
3
Network
4,5
—
—
—
—
—
—
—
—
—
—
15
—
—
10
—
—
4
5
—
—
—
—
—
—
—
—
—
30
—
—
0.5
—
50
110
k
LNA Input Resistance
4,5
pF
dB
LNA Input Capacitance
4,5,6,7
m = 0.3
50
105
50
65
80
55
55
—
—
42
0.1
—
—
—
AM Suppression
4,8
dBµV EMF
dB
Input IP3
4
4
±200 kHz
±400 kHz
Adjacent Channel Selectivity
dB
Alternate Channel Selectivity
5,6,7
mV
Audio Output Voltage
RMS
5,6,7,9,10
dB
Audio Mono S/N
3,4,5,7,9,10,
dB
Hz
kHz
dB
%
Audio Stereo S/N
–3 dB
–3 dB
Audio Frequency Response Low
Audio Frequency Response High
5,11
Audio Stereo Separation
6,5,11
Audio THD
4,10
R
Single-ended
Single-ended
k
pF
Audio Output Load Resistance
Audio Output Load Capacitance
L
L
4,10
C
4
ms
Powerup/Band Switch Time
Notes:
1. Additional testing information is available in “AN569: Si4831/35-DEMO Board Test Procedure.” Volume = maximum
for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B Antenna, Schematic,
Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers.
3. Frequency is 76~109 MHz.
4. Guaranteed by characterization.
5. VEMF = 1 mV.
6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise.
7. f = 22.5 kHz.
8. |f2 – f1| > 2 MHz, f = 2 x f – f .
0
1
2
9. BAF = 300 Hz to 15 kHz, A-weighted.
10. At LOUT and ROUT pins.
11. f = 75 kHz.
6
Rev. 1.0
Si4831/35-B30
Table 6. AM/SW Receiver Characteristics1, 2
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Input Frequency
Symbol
Test Condition
Medium Wave (AM)
Short Wave (SW)
(S+N)/N = 26 dB
Min
504
5.60
—
Typ
—
Max
1750
22.0
—
Unit
kHz
f
RF
—
MHz
3,4,5
30
µV EMF
Sensitivity
5
THD < 8%
—
—
300
40
60
55
0.1
—
—
—
mV
Large Signal Voltage Handling
RMS
RMS
5
∆V = 100 mVRMS, 100 Hz
dB
Power Supply Rejection Ratio
DD
3,6
—
—
mV
Audio Output Voltage
3,4,6
—
—
dB
Audio S/N
3,6
—
0.5
450
110
%
Audio THD
5,7
180
—
µH
ms
Antenna Inductance
5
From powerdown
—
Powerup/Band Switch Time
Notes:
1. Additional testing information is available in “AN569: Si4831/35-DEMO Board Test Procedure.” Volume = maximum
for all tests. Tested at RF = 520 kHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B Antenna, Schematic,
Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. BAF = 300 Hz to 15 kHz, A-weighted.
5. Guaranteed by characterization.
6. VIN = 5 mVrms.
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
Table 7. Reference Clock and Crystal Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Reference Clock
XTALI Supported Reference Clock
Frequencies
—
32.768
—
—
kHz
Reference Clock Frequency
Tolerance for XTALI
–100
100
ppm
Crystal Oscillator
Crystal Oscillator Frequency
—
–100
—
32.768
—
—
100
3.5
kHz
ppm
pF
Crystal Frequency Tolerance
Board Capacitance
—
Rev. 1.0
7
Si4831/35-B30
2. Typical Application Schematic
TUNE1
FMI
R3
253k
S2
VR1
(Si4835 only)
100k
AM
FM
BAND
1
2
3
R2
R4
180k
10k
C5
STATION_LED
STEREO_LED
AMI
0.47u
R5
67k
C5
U1
AMI
0.47u
ANT2
RFGND
T1
LOUT
ROUT
C4
Optional: AM air loop antenna
0.1u
VDD
VDD
2.0 TO 3.6V
2.0 TO 3.6V
R1
100k
C1
0.1u
Y1
32.768KHz
C3
C2
22p
22p
Optional
Notes:
1. Place C4 close to VDD2 and DBYP pins.
2. All grounds connect directly to GND plane on PCB.
3. Pin 6 and 7 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in "AN555: Si483x-B Antenna, Schematic,
Layout, and Design Guidelines." Silicon Labs will evaluate the schematics and layouts for qualified customers.
5. Pin 8 connects to the FM antenna interface and pin 12 connects to the AM antenna interface.
6. Place Si483x as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
8
Rev. 1.0
Si4831/35-B30
3. Bill of Materials
Table 8. Si4831/35-B30 Bill of Materials
Value/Description
Component(s)
Supplier
Murata
Murata
Murata
Murata
Kennon
Venkel
Venkel
Venkel
Venkel
C1
C4
C5
B1
Reset capacitor 0.1 uF, ±20%, Z5U/X7R
Supply bypass capacitor, 0.1 uF, ±20%, Z5U/X7R
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Ferrite bead 2.5k/100 MHz
Variable resistor (POT), 100k, ±10%
VR1
R1
R2
R3
R4
Reset timing resistor, 100k, ±5%
Resistor, 10k, ±5%
Resistor, 253k, ±1%
Resistor, 180k, ±1%
R5
U1
Resistor, 67k, ±1%
Venkel
Si4831/35-B30 Mechanical Tuning Radio Receiver
Silicon Laboratories
S2
Band switch
Any, depends on
customer
ANT1
Ferrite stick,180-450 µH
Jiaxin
Optional Components
C2, C3
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
Venkel
Y1
32.768 kHz crystal (Optional: for crystal oscillator option)
Air loop antenna, 10–20 µH
Epson or equivalent
Various
ANT2
Rev. 1.0
9
Si4831/35-B30
4. Functional Description
Si4831/35
ADC
ADC
DAC
LOUT
ROUT
AMI
AM
ANT
LNA
DSP
RFGND
DAC
FM/SW
ANT
AGC
FMI
0/90
TUNE 1/2
BAND
ADC
AFC
REG
XTALI
2.0~3.6V
CONTROL
INTERFACE
VDD1/2
XTAL
OSC
Figure 2. Si4831/35-B30 Functional Block Diagram
4.2. FM Receiver
4.1. Overview
The Si4831/35-B30 is the industry's most advanced The Si4831/35-B30 integrates a low noise amplifier
fully integrated, mechanical-tuned 100% CMOS (LNA) supporting the worldwide FM broadcast band (64
AM/FM/SW radio receiver IC. Offering unmatched to 109 MHz).
integration and PCB space savings, the Si4831/35-B30
Pre-emphasis and de-emphasis is a technique used by
requires minimum external components and a small
FM broadcasters to improve the signal-to-noise ratio of
board area. The Si4831/35-B30 AM/FM/SW radio
FM receivers by reducing the effects of high frequency
provides space savings and low power consumption
interference and noise. When the FM signal is
while delivering the high performance and design
simplicity desired for all AM/FM/SW solutions.
transmitted,
a
pre-emphasis filter is applied to
accentuate the high audio frequencies. All FM receivers
Leveraging Silicon Laboratories' proven and patented incorporate a de-emphasis filter which attenuates high
digital low intermediate frequency (low-IF) receiver frequencies to restore a flat frequency response. Two
architecture, the Si4831/35-B30 delivers superior RF time constants are used in various regions. The de-
performance and interference rejection in AM, FM, and emphasis time constant can be chosen to be 50 or
SW bands. The high integration and complete system 75 µs. Refer to "AN555: Si483x-B Antenna, Schematic,
production test simplifies design-in, increases system Layout, and Design Guidelines."
quality, and improves manufacturability.
The Si4831/35-B30 also has advanced stereo blending
that employs adaptive noise suppression. As a signal
quality degrades, the Si4831/35-B30 gradually
combines the stereo left and right audio channels to a
mono audio signal to maintain optimum sound fidelity
under varying reception conditions. The Si4831/35-B30
can drive a stereo light with the stereo/mono information
so that the user can easily discern the signal quality.
10
Rev. 1.0
Si4831/35-B30
The stereo light up criteria is defined using both RSSI
and the Left and Right separation levels as these two
specifications are the primary factors for stereo
listening. The criteria can be set between two
conditions: the Left and Right channels are separated
by more than 6 dB with RSSI at >20 dB or Left and
Right channels are separated by more than 12 dB with
RSSI at >28 dB. The selection can be set up using
different values of the external resister. Refer to
"AN555: Si483x-B Antenna, Schematic, Layout, and
Design Guidelines."
4.5. Frequency Tuning
A
valid channel can be found by tuning the
potentiometer that is connected to the TUNE1 and
TUNE2 pin of the Si4831/35-B30 chip.
To offer easy tuning, the Si4831/35-B30 also supports a
station LED light. It will light up the LED if the RF signal
quality passes the LED sensitivity threshold when tuned
to a valid station.
4.6. Band Select
The Si4831/35-B30 supports worldwide AM band with
five sub-bands, US/Europe/Japan/China FM band with
five sub-bands, and SW band with 16 sub-bands. For
details on band selection, refer to "AN555: Si483x-B
Antenna, Schematic, Layout, and Design Guidelines."
4.3. AM Receiver
The highly integrated Si4831/35-B30 supports
worldwide AM band reception from 504 to 1750 kHz
with five sub-bands using a digital low-IF architecture
with a minimum number of external components and no
manual alignment required. This patented architecture
allows for high-precision filtering, offering excellent
selectivity and SNR with minimum variation across the
AM band. Similar to the FM receiver, the Si4831/35-B30
optimizes sensitivity and rejection of strong interferers,
allowing better reception of weak stations.
4.7. Bass and Treble
The Si4831/35-B30 further supports bass and treble
tone control for superior sound quality. Pins 16 and 17
can be configured for tone control, allowing customers
to use either two buttons or one slide-switch to adjust
the bass and treble. For further configuration details,
refer to "AN555: Si483x-B Antenna, Schematic, Layout,
and Design Guidelines."
To offer maximum flexibility, the receiver supports a
wide range of ferrite loop sticks from 180–450 µH. An
air loop antenna is supported by using a transformer to
increase the effective inductance from the air loop.
Using a 1:5 turn ratio inductor, the inductance is
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
20 µH.
4.8. Volume Control
The Si4831/35-B30 not only allows customers to use
the traditional PVR wheel volume control through an
external speaker amplifier, it also supports direct digital
volume control through pins 16 and pin 17 by using
volume up and down buttons. Refer to "AN555: Si483x-
B Antenna, Schematic, Layout, and Design Guidelines."
4.4. SW Receiver
The Si4835 supports 16 short wave (SW) band
receptions from 5.60 to 22.0 MHz. Si4835 supports
extensive short wave features such as minimal discrete
components and no factory adjustments. The Si4835
supports using the FM antenna to capture short wave
signals.
Rev. 1.0
11
Si4831/35-B30
5. Pin Descriptions: Si4831/35-B30
1
24
23
22
21
20
19
18
17
16
15
14
13
STEREO
LOUT
2
STATION
ROUT
3
TUNE1
DBYP
4
TUNE2
VDD2
5
BAND
VDD1
6
NC
XTALI
7
NC
XTALO
VOL-/BASS
VOL+/TREBLE
RST
8
FMI
9
RFGND
10
NC
11
NC
GND
12
AMI
GND
Pin Number(s)
Name
STEREO
STATION
TUNE1
TUNE2
BAND
NC
Description
1
2
Stereo indicator
Station indicator
Frequency tuning
Frequency tuning
3
4
5
Band selection and De-emphasis/Stereo separation selection
No connect. Leave floating.
6,7
8
FMI
FM RF inputs. FMI should be connected to the antenna trace.
RF ground. Connect to ground plane on PCB.
Unused. Tie these pins to GND.
9
RFGND
NC
10,11
12
13,14
AMI
AM RF input. AMI should be connected to the AM antenna.
Ground. Connect to ground plane on PCB.
GND
15
16
17
18
19
20
21
22
23
24
RST
Device reset (active low) input
VOL+/TREBLE Volume button up/Treble
VOL–/BASS
XTALO
XTALI
Volume button down/Bass
Crystal oscillator output
Crystal oscillator input
VDD1
Supply voltage. May be connected directly to battery.
Supply voltage. May be connected directly to battery.
Dedicated bypass for VDD
VDD2
DBYP
ROUT
Right audio line output in analog output mode
Left audio line output in analog output mode
LOUT
12
Rev. 1.0
Si4831/35-B30
6. Ordering Guide
Part Number*
Description
Package
Operating
Type
Temperature/Voltage
Si4831-B30-GU AM/FM Broadcast Radio Receiver
Si4835-B30-GU AM/FM/SW Broadcast Radio Receiver
24L SSOP
Pb-free
–15 to 85 °C
2.0 to 3.6 V
24L SSOP
Pb-free
–15 to 85 °C
2.0 to 3.6 V
*Note: Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for VDD voltage ramped down to 2.0 V.
Rev. 1.0
13
Si4831/35-B30
7. Package Markings (Top Marks)
7.1. Si4831/35-B30 Top Mark
4831B30GU
YYWWTTTTTT
4835B30GU
YYWWTTTTTT
7.2. Top Mark Explanation
Mark Method:
YAG Laser
4831B30GU = Si4831-B30
4835B30GU = Si4835-B30
Line 1 Marking:
Device identifier
YY = Year
Line 2 Marking:
WW = Work week
TTTTTT = Manufacturing code
Assigned by the Assembly House.
14
Rev. 1.0
Si4831/35-B30
8. Package Outline: Si4831/35-B30
The 24-pin SSOP illustrates the package details for the Si4831/35-B30. Table 9 lists the values for the dimensions
shown in the illustration.
Figure 3. 24-Pin SSOP
Table 9. Package Dimensions
Dimension
Min
—
Nom
—
Max
1.75
0.25
0.30
0.25
A
A1
b
0.10
0.20
0.10
—
—
c
—
D
8.65 BSC
6.00 BSC
3.90 BSC
0.635 BSC
—
E
E1
e
L
0.40
0°
1.27
8°
θ
—
aaa
bbb
ccc
ddd
0.20
0.18
0.10
0.10
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-137, Variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
Rev. 1.0
15
Si4831/35-B30
9. PCB Land Pattern: Si4831/35-B30
Figure 4, “PCB Land Pattern,” illustrates the PCB land pattern details for the Si4831/35-B30-GU SSOP. Table 10
lists the values for the dimensions shown in the illustration.
Figure 4. PCB Land Pattern
Table 10. PCB Land Pattern Dimensions
Dimension
Min
Max
C
E
5.20
5.40
0.65 BSC
X1
Y1
0.35
1.55
0.45
1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
16
Rev. 1.0
Si4831/35-B30
10. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
EN55020 Compliance Test Certificate
AN555: Si483x-B Antenna, Schematic, Layout, and Design Guidelines
AN569: Si4831/35-DEMO Board Test Procedure
Si4831/35-DEMO Board User’s Guide
Rev. 1.0
17
Si4831/35-B30
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.7
Updated block diagram.
Updated application schematic.
Updated bill of materials.
Updated Section “4.2. FM Receiver”.
Updated Section “4.3. AM Receiver”.
Updated Section “4.6. Band Select”.
Revision 0.7 to Revision 1.0
Updated block diagram
1 2
Updated Table 2, “Absolute Maximum Ratings , ,”
on page 4
1 2
Updated Table 5, “FM Receiver Characteristics , ,”
on page 6
1,
Updated Table 6, “AM/SW Receiver Characteristics
2
,” on page 7
Updated “4. Functional Description”
Updated “10. Additional Reference Resources”
18
Rev. 1.0
Si4831/35-B30
NOTES:
Rev. 1.0
19
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相关型号：
SI4835CDY-T1-E3
TRANSISTOR 7.4 A, 0.03 ohm, P-CHANNEL, Si, POWER, MOSFET, ROHS COMPLIANT, SO-8, FET General Purpose Power
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