SP3223CA [SIPEX]
Intelligent +3.0V to +5.5V RS-232 Transceivers; 智能+ 3.0V至+ 5.5V的RS - 232收发器
| 型号： | SP3223CA |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | Intelligent +3.0V to +5.5V RS-232 Transceivers |
| 文件： | 总23页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP3223/3243
Intelligent +3.0V to +5.5V RS-232 Transceivers
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ AUTO ON-LINE® circuitry automatically
wakes up from a 1µA shutdown
■ Minimum 120Kbps data rate under load
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ ESD Specifications:
+2kV Human Body Model
DESCRIPTION
The SP3223 and SP3243 products are RS-232 transceiver solutions intended for portable or
hand-held applications such as notebook and palmtop computers. The SP3223 and SP3243
useaninternalhigh-efficiency,charge-pumppowersupplythatrequiresonly0.1µFcapacitors
in 3.3V operation. This charge pump and Sipex's driver architecture allow the SP3223/
SP3243 series to deliver compliant RS-232 performance from a single power supply ranging
from +3.3V to +5.0V. The SP3223 is a 2-driver/2-receiver device, and the SP3243 is a
3-driver/5-receiver device ideal for laptop/notebook computer and PDA applications.
The SP3243 includes one complementary receiver that remains alert to monitor an external
device's Ring Indicate signal while the device is shutdown.
The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shutdown
statewhenanRS-232cableisconnectedandaconnectedperipheralisturnedon. Otherwise,
the device automatically shuts itself down drawing less than 1µA.
SELECTION TABLE
Device
Power Supplies RS-232
RS-232
External
Components
TTL 3-State
No. of
Pins
AUTO ON-LINE®
Drivers Receivers
Circuitry
SP3223
SP3243
+3.0V to +5.5V
+3.0V to +5.5V
2
3
2
5
4 capacitors
4 capacitors
YES
YES
YES
YES
20
28
Applicable U.S. Patents - 5,306,954; and other patents pending.
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
1
Power Dissipation per package
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
28-pin PDIP (derate 16.0mW/oC above+70oC).....1300mW
20-pin SSOP (derate 9.25mW/oC above +70oC)....750mW
20-pin TSSOP (derate 11.1mW/oC above +70oC)..900mW
28-pin SOIC (derate 12.7mW/oC above +70oC)...1000mW
28-pin SSOP (derate 11.2mW/oC above +70oC)....900mW
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, ONLINE,
SHUTDOWN, EN (SP3223).................-0.3V to +6.0V
RxIN...................................................................+15V
Output Voltages
TxOUT...............................................................+15V
RxOUT, STATUS.......................-0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65°C to +150°C
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
SPECIFICATIONS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
DC CHARACTERISTICS
µA
Supply Current,
AUTO ON-LINE®
1.0
10
All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, TxIN=VCC or
GND,VCC = +3.3V, TAMB = +25° C
µA
Supply Current, Shutdown
1.0
0.3
10
SHUTDOWN = GND, TxIN=VCC or
GND, VCC = +3.3V, TAMB = +25° C
Supply Current,
AUTO ON-LINE® Disabled
1.0
mA
ONLINE = SHUTDOWN = VCC,
no load, VCC = +3.3V, TAMB = +25° C
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
VCC = +3.3V or +5.0V, TxIN,
EN (SP3223), ONLINE,
SHUTDOWN
0.8
V
HIGH
2.0
µA
Input Leakage Current
±0.01
±0.05
±1.0
TxIN, EN, ONLINE, SHUTDOWN,
TAMB = +25° C
µA
V
Output Leakage Current
Output Voltage LOW
Output Voltage HIGH
±10
0.4
Receivers disabled
IOUT = 1.6mA
VCC - 0.6 VCC - 0.1
V
IOUT = -1.0mA
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
2
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
DRIVER OUTPUTS
Output Voltage Swing
±5.0
300
±5.4
V
All driver outputs loaded with 3KΩ
to GND, TAMB = +25° C
Ω
Output Resistance
VCC = V+ = V- = 0V, VOUT = ±2V
Output Short-Circuit Current
±35
±70
±60
±100
V
V
OUT = 0V
OUT = ±15V
mA
µA
Output Leakage Current
±25
VCC = 0V or 3.0V to 5.5V,
VOUT = ±12V, Drivers disabled
RECEIVER INPUTS
Input Voltage Range
Input Threshold LOW
Input Threshold LOW
Input Threshold HIGH
Input Threshold HIGH
Input Hysteresis
-15
0.6
0.8
15
V
V
1.2
1.5
1.5
1.8
0.3
5
VCC = 3.3V
V
VCC = 5.0V
VCC = 3.3V
VCC = 5.0V
2.4
2.4
V
V
V
Input Resistance
3
7
kΩ
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC
)
STATUS Output Voltage LOW
STATUS Output Voltage HIGH
Receiver Threshold to Drivers
0.4
V
V
IOUT = 1.6mA
IOUT = -1.0mA
Figure 15
V
CC - 0.6
µS
200
0.5
Enabled (tONLINE
)
µS
µS
Receiver Positive or Negative
Threshold to STATUS HIGH
Figure 15
Figure 15
(tSTSH
)
Receiver Positive or Negative
Threshold to STATUS LOW
20
(tSTSL
)
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
3
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN. TYP. MAX. UNITS CONDITIONS
TIMING CHARACTERISTICS
Maximum Data Rate
120
235
kbps
RL = 3KΩ, CL = 1000pF, one driver active
Receiver Propagation Delay
tPHL
tPLH
0.3
0.3
µs
Receiver input to Receiver output, CL = 150pF
Receiver Output Enable Time
Receiver Output Disable Time
Driver Skew
200
200
100
200
ns
ns
Normal operation
Normal operation
500
1000
30
ns
| tPHL - tPLH |, TAMB = 25oC
Receiver Skew
ns
| tPHL - tPLH
|
Transition-Region Slew Rate
V/µs
V
CC= 3.3V, RL = 3KΩ, TAMB = 25oC,
measurements taken from -3.0V to +3.0V or
+3.0V to -3.0V
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120Kbps data rate, all drivers
loaded with 3KΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
14
6
12
4
10
Vout+
Vout-
2
8
6
4
2
0
0
-2
-4
-6
0
500
1000
1500
+Slew
-Slew
Load Capacitance [pF]
0
500
1000
1500
2000
Load Capacitance [pF]
Figure 2. Slew Rate VS. Load Capacitance for the
SP3223
Figure 1. Transmitter Output Voltage VS. Load
Capacitance for the SP3223
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
4
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120Kbps data rate, all drivers
loaded with 3KΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
40
118KHz
60KHz
10KHz
35
30
25
20
15
10
5
6
4
Vout+
Vout-
2
0
0
500
1000
1500
2000
2500
-2
-4
-6
Load Capacitance [pF]
0
0
500
1000
1500
2000
Load Capacitance [pF]
Figure 4. Transmitter Output Voltage VS. Load
Capacitance for the SP3243
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3223
80
16
14
12
10
8
118KHz
60KHz
10KHz
70
60
50
40
30
20
10
0
6
+ Slew
- Slew
4
2
0
2500
0
500
1000
1500
2000
3000
0
500
1000
1500
2000
2500
3000
Load Capacitance [pF]
Load Capacitance [pF]
Figure 6. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3243
Figure 5. Slew Rate VS. Load Capacitance for the
SP3243
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
5
PIN NUMBER
SP3223 SP3243
NAME
FUNCTION
Receiver Enable. Apply logic LOW for normal operation. Apply logic HIGH
to disable the receiver outputs (high-Z state).
EN
1
-
C1+
V+
Positive terminal of the voltage doubler charge-pump capacitor.
Regulated +5.5V output generated by the charge pump.
Negative terminal of the voltage doubler charge-pump capacitor.
Positive terminal of the inverting charge-pump capacitor.
Negative terminal of the inverting charge-pump capacitor.
Regulated -5.5V output generated by the charge pump.
RS-232 receiver input.
2
3
28
27
24
1
C1-
4
C2+
5
C2-
6
2
V-
7
3
R1IN
16
9
4
R2IN
RS-232 receiver input.
5
R3IN
RS-232 receiver input.
-
6
R4IN
RS-232 receiver input.
-
7
R5IN
RS-232 receiver input.
-
8
R1OUT
R2OUT
R2OUT
R3OUT
R4OUT
R5OUT
STATUS
T1IN
TTL/CMOS receiver output.
15
10
-
19
18
20
17
16
15
21
14
13
12
TTL/CMOS receiver output.
Non-inverting receiver-2 output, active in shutdown.
TTL/CMOS receiver output.
-
TTL/CMOS receiver output.
-
TTL/CMOS receiver output.
-
TTL/CMOS Output indicating online and shutdown status.
TTL/CMOS driver input.
11
13
12
-
T2IN
TTL/CMOS driver input.
T3IN
TTL/CMOS driver input.
Apply logic HIGH to override AUTO ON-LINE circuitry keeping drivers
active (SHUTDOWN must also be logic HIGH, refer to Table 2).
ONLINE
14
23
T1OUT
T2OUT
T3OUT
GND
RS-232 driver output.
RS-232 driver output.
RS-232 driver output.
Ground.
17
8
9
10
11
25
26
-
18
19
VCC
+3.0V to +5.5V supply voltage.
Apply logic LOW to shut down drivers and charge pump. This overrides all
AUTO ON-LINE® circuitry and ONLINE (refer to Table 2).
SHUTDOWN
20
22
Table 1. Device Pin Description
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
6
EN
1
2
3
4
5
6
7
20
19
18
17
16
15
SHUTDOWN
V
CC
C1+
V+
GND
C1-
T1OUT
R1IN
SP3223
C2+
C2-
V-
R1OUT
14
13
ONLINE
T1IN
T2OUT
R2IN
8
9
12 T2IN
10
R2OUT
STATUS
11
Figure 7. SP3223 Pinout Configuration
1
2
3
4
5
6
7
28
27
26
C2+
C2-
C1+
V+
V
CC
V-
25 GND
R1IN
R2IN
R3IN
24
C1-
SP3243
23
ONLINE
22
21
20
19
R4IN
R5IN
SHUTDOWN
STATUS
R2OUT
8
T1OUT 9
10
T2OUT
T3OUT
R1OUT
11
18 R2OUT
17
T3IN 12
R3OUT
13
14
16
T2IN
T1IN
R4OUT
15
R5OUT
Figure 8. SP3243 Pinout Configuration
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
7
+3V to +5V
+
+
19
CC
0.1µF
0.1µF
C5
C1
V
2
3
7
C1+
V+
V-
+
+
0.1µF
0.1µF
C3
C4
4
5
C1-
SP3223
C2+
+
C2
0.1µF
6
13
12
C2-
T1OUT
T2OUT
T1IN
17
8
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T2IN
R1OUT
R1IN
15
10
16
9
5KΩ
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R OUT
R2IN
2
5KΩ
1
EN
V
CC
20
SHUTDOWN
14
11
ONLINE
STATUS
To µP Supervisor
Circuit
GND
18
Figure 9. SP3223 Typical Operating Circuit
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
8
V
CC
+
+
26
CC
0.1µF
0.1µF
C5
C1
V
28
27
3
C1+
V+
+
+
0.1µF
0.1µF
C3
C4
24
1
C1-
SP3243
C2+
V-
+
C2
0.1µF
2
14
13
C2-
T1OUT
T2OUT
T3OUT
T1IN
9
T IN
10
11
RS-232
OUTPUTS
2
TTL/CMOS
INPUTS
T3IN
12
R2OUT
20
19
R1IN
R2IN
R3IN
R4IN
R5IN
R OUT
4
5
6
7
8
1
5KΩ
R OUT
18
17
16
15
2
5KΩ
TTL/CMOS
OUTPUTS
R3OUT
R4OUT
R5OUT
RS-232
INPUTS
5KΩ
5KΩ
5KΩ
V
CC
22
23
SHUTDOWN
ONLINE
To µP Supervisor
Circuit
21
STATUS
GND
25
Figure 10. SP3243 Typical Operating Circuit
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
9
DESCRIPTION
The SP3223 and SP3243 transceivers meet the
EIA/TIA-232 and ITU-T V.28/V.24 communica-
tion protocols and can be implemented in bat-
tery-powered, portable, or hand-held applica-
tions such as notebook or palmtop computers.
TheSP3223andSP3243devicesfeatureSipex's
proprietary and patented (U.S.-- 5,306,954) on-
board charge pump circuitry that generates
±5.5VRS-232voltagelevelsfromasingle+3.0V
to+5.5Vpowersupply.TheSP3223andSP3243
TheSP3223andSP3243seriesisanidealchoice
for power sensitive designs. The SP3223 and
SP3243 devices feature AUTO ON-LINE®
circuitry which reduces the power supply drain
to a 1µA supply current. In many portable or
hand-held applications, an RS-232 cable can be
disconnected or a connected peripheral can be
turned off. Under these conditions, the internal
charge pump and the drivers will be shut down.
Otherwise, the system automatically comes
online. This feature allows design engineers to
address power saving concerns without major
design changes.
devices
can
operate
at
a typical data rate of 235kbps fully loaded.
The SP3223 is a 2-driver/2-receiver device, and
the SP3243 is a 3-driver/5-receiver device
ideal for portable or hand-held applications.
The SP3243 includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
THEORY OF OPERATION
The SP3223 and SP3243 series is made up
of four basic circuit blocks:
1.Drivers, 2.Receivers, 3.theSipexproprietary
charge pump, and 4. AUTO ON-LINE® cir-
cuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232F and all
previous RS-232 versions. Unused driver inputs
should be connected to GND or VCC.
V
CC
+
+
26
CC
0.1µF
0.1µF
C5
C1
V
28
27
3
C1+
V+
+
+
C3
C4
0.1µF
0.1µF
24
1
C1-
C2+
SP3243
V-
+
C2
0.1µF
2
14
13
C2-
T
1OUT
T1IN
9
TxD
RTS
DTR
T2OUT
T
2IN
3IN
10
11
RS-232
OUTPUTS
T
3OUT
T
12
R2OUT
20
19
UART
or
Serial µC
R1IN
R1OUT
4
5
RxD
CTS
5KΩ
R2IN
R2OUT
18
17
16
15
5KΩ
R3OUT
R3IN
DSR
DCD
RI
6
7
8
RS-232
INPUTS
5KΩ
5KΩ
5KΩ
Thedriverscanguaranteeadatarateof120Kbps
fully loaded with 3KΩ in parallel with 1000pF,
ensuring compatibility with PC-to-PC commu-
nication software.
R4OUT
R
4IN
5IN
R5OUT
R
VCC
22
23
SHUTDOWN
ONLINE
21
STATUS
GND
25
µP
Supervisor
IC
V
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
RESET
IN
Figure 11. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
10
+3V to +5V
19
DEVICE: SP3223
+
+
0.1µF
0.1µF
C5
C1
V
CC
SHUTDOWN
EN
0
TXOUT
High Z
High Z
Active
Active
RXOUT
Active
High Z
Active
High Z
2
3
7
C1+
V+
V-
+
+
C3
C4
0.1µF
0.1µF
4
5
C1-
0
C2+
SP3223
SP3243
+
C2
0.1µF
6
C2-
0
1
T
1OUT
T
1IN
TTL/CMOS
INPUTS
1
0
TXIN
TXOUT
1
1
R1OUT
R1IN
TTL/CMOS
OUTPUTS
5KΩ
DEVICE: SP3243
RXOUT
RXIN
5KΩ
1
1000pF
1000pF
EN
V
CC
SHUTDOWN
TXOUT
High Z
Active
RXOUT
High Z
Active
R2OUT
Active
Active
20
SHUTDOWN
14
11
ONLINE
STATUS
0
1
To µP Supervisor
Circuit
GND
18
Figure 12. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE® Mode where ONLINE =
GND and SHUTDOWN = VCC, the device will shut down
if there is no activity present at the Receiver inputs.
mission rate of 120Kbps provides compatibility
with many designs in personal computer periph-
erals and LAN applications.
Figure 12 shows a loopback test circuit used to
testtheRS-232Drivers.Figure13showsthetest
results of the loopback circuit with all three
drivers active (SP3243) at 120Kbps with typical
RS-232 loads in parallel with 1000pF capacitors.
Figure14 shows the test results where one driver
was active at 235Kbps and all three drivers
loaded with an RS-232 receiver in parallel with
a 1000pF capacitor. A solid RS-232 data trans-
Receivers
The receivers convert ±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
Receivers have an inverting output that can be
disabled by using the EN pin.
T1 IN
T1 IN
T1 OUT
T1 OUT
R1 OUT
R1 OUT
Figure 13. Loopback Test Circuit Result at 120Kbps
(All Drivers Fully Loaded)
Figure 14. Loopback Test Circuit result at 235Kbps
(All Drivers Fully Loaded)
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
11
Receivers are active when the AUTO ON-LINE®
circuitry is enabled or when in shutdown.
Duringtheshutdown, thereceiverswillcontinue
to be active. If there is no activity present at the
receivers for a period longer than 100µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1µA.
DrivingENtoalogicHIGHforcestheoutputsof
the receivers into high-impedance. The truth
table logic of the SP3223 and SP3243 driver and
receiver outputs can be found in Table 2.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. Thisoscillatorcontrolsthefourphases
of the voltage shifting. A description of each
phase follows.
Phase 1
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. Cl+ is
then switched to GND and the charge in C1– is
The SP3243 includes an additional non-invert-
ingreceiverwithanoutputR2OUT. R2OUTisan
extra output that remains active and monitors
activity while the other receiver outputs are
forced into high impedance. This allows Ring
Indicator (RI) from a peripheral to be monitored
without forward biasing the TTL/CMOS inputs
of the other devices connected to the receiver
outputs.
–
+
transferred to C2 . Since C2 is connected to
VCC, the voltage potential across capacitor C2 is
now 2 times VCC
.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
haveatypicalhysteresismarginof300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, aninternal 5KΩpulldownresistor
to ground will commit the output of the receiver
to a HIGH state.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
+
Charge Pump
side of capacitor C2. Since C2 is at VCC, the
voltage potential across C2 is 2 times VCC
.
The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
12
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
besymmetrical. Olderchargepumpapproaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operatesat250kHz. Theexternalcapacitorscan
be as low as 0.1µF with a 16V breakdown
voltage rating.
S
H
U
T
+2.7V
0V
-2.7V
RECEIVER
RS-232 INPUT
VOLTAGES
D
O
W
N
VCC
STATUS
0V
t
STSL
t
STSH
t
ONLINE
+5V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
-5V
Figure 15. AUTO ON-LINE® Timing Waveforms
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
13
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure 16. Charge Pump — Phase 1
V
= +5V
CC
C
4
+
–
3
V
Storage Capacitor
Storage Capacitor
DD
SS
+
+
C
C
2
1
–
–
+
–
V
C
–10V
Figure 17. Charge Pump — Phase 2
[
T
]
+6V
a) C2+
T
T
0V
0V
1
2
2
b) C2-
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V
Figure 18. Charge Pump Waveforms
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure 19. Charge Pump — Phase 3
V
= +5V
CC
C
+10V
4
+
–
+
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
V
SS
C
3
Figure 20. Charge Pump — Phase 4
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
14
6
4
Vout+
Vout-
2
0
-2
-4
-6
Load Current Per Transmitter [mA]
Figure 21. SP3243 Driver Output Voltages vs. Load
Current per Transmitter
V
CC
+
26
CC
0.1µF
0.1µF
C5
C1
V
28
27
3
C1+
V+
+
+
+
+
C3
C4
0.1µF
0.1µF
24
1
C1-
SP3243
C2+
V-
C2
0.1µF
2
14
13
C2-
T1OUT
T2OUT
T3OUT
T1IN
9
T IN
2
10
11
T3IN
12
R2OUT
20
19
R1IN
R2IN
R3IN
R4IN
R5IN
R OUT
1
4
5
5KΩ
R2OUT
R3OUT
R4OUT
R5OUT
18
17
16
15
5KΩ
6
7
8
5KΩ
5KΩ
5KΩ
DB-9
Connector
VCC
22
23
SHUTDOWN
ONLINE
1
2
3
4
5
6
To µP Supervisor
Circuit
21
STATUS
GND
25
7
8
9
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
Figure 22. Circuit for the connectivity of the SP3243 with a DB-9 connector
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
15
RS-232 SIGNAL
AT RECEIVER
INPUT
SHUTDOWN
INPUT
TRANSCEIVER
STATUS
ONLINE INPUT
STATUS OUTPUT
Normal Operation
(AUTO ON-LINE® )
YES
NO
HIGH
HIGH
HIGH
LOW
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
LOW
Normal Operation
Shutdown
(AUTO ON-LINE® )
NO
LOW
Shutdown
Shutdown
YES
NO
HIGH/LOW
HIGH/LOW
Table 3. AUTO ON-LINE® Logic
R INACT
X
Inactive Detection Block
RS-232
Receiver Block
R OUT
X
R IN
X
Figure 23. Stage I of AUTO ON-LINE® Circuitry
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
STATUS
R1INACT
R4INACT
R5INACT
R2INACT
R3INACT
SHUTDOWN
Figure 24. Stage II of AUTO ON-LINE® Circuitry
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
16
AUTO ON-LINE® Circuitry
The second stage of the AUTO ON-LINE®
circuitry, shown in Figure 24, processes all the
receiver's RXINACT signals with an accumu-
lated delay that disables the device to a 1µA
supply current.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmitters
are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is
around 20µs.
The SP3223 and SP3243 devices have a patent
pending AUTO ON-LINE® circuitry on board
that saves power in applications such as laptop
computers,palmtop(PDA)computers,andother
portable systems.
The SP3223 and SP3243 devices incorporate an
AUTO ON-LINE® circuit that automatically
enables itself when the external transmitters are
enabled and the cable is connected. Conversely,
the AUTO ON-LINE® circuit also disables
most of the internal circuitry when the device is
not being used and goes into a standby mode
where the device typically draws 1µA. This
function can also be externally controlled by the
ONLINE pin. When this pin is tied to a logic
LOW, theAUTOON-LINE® functionisactive.
Once active, the device is enabled until there is
no activity on the receiver inputs. The receiver
input typically sees at least ±3V, which are
generated from the transmitters at the other end
of the cable with a ±5V minimum. When the
external transmitters are disabled or the cable is
disconnected, the receiver inputs will be pulled
down by their internal 5kΩ resistors to ground.
When this occurs over a period of time, the
internal transmitters will be disabled and the
device goes into a shutdown or standy mode.
When ONLINE is HIGH, the AUTO ON-LINE®
mode is disabled.
When the SP3223 and SP3243 drivers or inter-
nal charge pump are disabled, the supply current
is reduced to 1µA. This can commonly occur in
hand-held or portable applications where the
RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.
The AUTO ON-LINE® mode can be disabled
by the SHUTDOWN pin. If this pin is a logic
LOW,the AUTO ON-LINE® function will not
operate regardless of the logic state of the
ONLINE pin. Table 3 summarizes the logic of the
AUTO ON-LINE® operating modes. The truth
table logic of the SP3223 and SP3243 driver and
receiver outputs can be found in Table 2.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
The AUTO ON-LINE® circuit has two stages:
1) Inactive Detection
When the SP3223 and SP3243 devices
are shut down, the charge pumps are turned off.
V+ charge pump output decays to VCC, the
V- output decays to GND. The decay time will
depend on the size of capacitors used for the
charge pump. Once in shutdown, the time
required to exit the shut down state and have
valid V+ and V- levels is typically 200µs.
2) Accumulated Delay
The first stage, shown in Figure 23, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit
is duplicated for each of the other receivers.
For easy programming, the STATUS can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE® circuitry so
this connection acts like a shutdown input pin.
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
17
ESD TOLERANCE
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 25. This method will test the
IC’s capability to withstand an ESD transient
duringnormalhandlingsuchasinmanufacturing
areaswheretheICstendtobehandledfrequently.
The SP3223/3243 series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients.
FortheHumanBodyModel, thecurrentlimiting
resistor (R ) and the source capacitor (CS) are
1.5kΩ andS100pF, respectively.
The Human Body Model has been the generally
acceptedESDtestingmethodforsemiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
R
R
S
S
R
R
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
Figure 25. ESD Test Circuit for Human Body Model
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
18
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1
E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
(0.381min.)
D
A = 0.210" max.
(5.334 max).
C
A2
Ø
L
B1
B
e
= 0.300 BSC
(7.620 BSC)
e = 0.100 BSC
(2.540 BSC)
A
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
28–PIN
20–PIN
16–PIN
0.068/0.078
(1.73/1.99)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
A2
0.002/0.008
(0.05/0.21)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
B
0.010/0.015
(0.25/0.38)
0.045/0.070
0.045/0.070
B1
C
(1.143/1.778)
(1.143/1.778)
0.397/0.407
(10.07/10.33)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.205/0.212
(5.20/5.38)
0.980/1.060
(24.892/26.924)
0.780/0.800
(19.812/20.320)
D
0.0256 BSC
(0.65 BSC)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
E
0.301/0.311
(7.65/7.90)
0.240/0.280
0.240/0.280
E1
L
(6.096/7.112)
(6.096/7.112)
0.022/0.037
(0.55/0.95)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0°/8°
(0°/8°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
Ø
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
19
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
24–PIN
20–PIN
28–PIN
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
A
A1
B
D
E
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.317/0.328
(8.07/8.33)
0.278/0.289
(7.07/7.33)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
e
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
H
L
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
0°/8°
(0°/8°)
Ø
0°/8°
(0°/8°)
0°/8°
(0°/8°)
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
20
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
28–PIN
0.093/0.104
A
A1
B
D
E
(2.352/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.697/0.713
(17.70/18.09)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
e
0.394/0.419
H
L
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
Ø
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
21
PACKAGE: PLASTIC THIN SMALL
OUTLINE
(TSSOP)
E2
E
D
A
Ø
A1
L
e
B
DIMENSIONS
in inches (mm)
20–PIN
Minimum/Maximum
- /0.043
(- /1.10)
A
0.002/0.006
(0.05/0.15)
A1
B
0.007/0.012
(0.19/0.30)
0.252/0.260
(6.40/6.60)
D
0.169/0.177
(4.30/4.50)
E
0.026 BSC
(0.65 BSC)
e
0.126 BSC
(3.20 BSC)
E2
L
0.020/0.030
(0.50/0.75)
0°/8°
Ø
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
22
ORDERING INFORMATION
Model
Temperature Range
0°C to +70°C
Package Types
20-pin PDIP
20-pin SSOP
20-pin TSSOP
20-pin PDIP
SP3223CP
SP3223CA
SP3223CY
SP3223EP
SP3223EA
SP3223EY
0°C to +70°C
0ºC to +70ºC
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
20-pin SSOP
20-pin TSSOP
SP3243CT
SP3243CA
SP3243ET
SP3243EA
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
28-pin Wide SOIC
28-pin SSOP
28-pin Wide SOIC
28-pin SSOP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
ANALOG EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Rev. 6/30/03
SP3223 +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
23
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