SP7650ER-L [SIPEX]
Switching Regulator, Voltage-mode, 3A, 360kHz Switching Freq-Max, 7 X 4 MM, LEAD FREE, DFN-26;
| 型号： | SP7650ER-L |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | Switching Regulator, Voltage-mode, 3A, 360kHz Switching Freq-Max, 7 X 4 MM, LEAD FREE, DFN-26 开关 |
| 文件： | 总16页 (文件大小：1789K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SP7650
Wide Input Voltage Range 3A,
300kHz, Buck Regulator
TM
Power
Blox
SP7650
DFN PACKAGE
7mm x 4mm
FEATURES
■ 2.5Vto28VStepDownAchievedUsingDualInput
26
P
1
2
LX
LX
LX
GND
BOTTOM VIEW
■ OutputVoltagedownto0.8V
P
GND
25
Heatsink Pad 1
■ 3AOutputCapability
P
24
3
GND
Connect to Lx
■ BuiltinLowRDSON PowerSwitches(40m1 typ)
■ HighlyIntegratedDesign,MinimalComponents
■ 300kHzFixedFrequencyOperation
■ UVLODetectsBothV andV
23
Pin 27
GND
4
5
LX
CC
V
22
FB
V
6
7
COMP
21
GND
Heatsink Pad 2
CC
IN
Connect to GND
UV
IN
20
GND
■ OverTemperatureProtection
GND
8
19
GND
■ ShortCircuitProtectionwithAuto-Restart
■ WideBWAmpAllowsTypeIIorIIICompensation
■ ProgrammableSoftStart
Pin 28
SS
9
18
BST
V
10
NC
LX
17
IN
Heatsink Pad 3
Connect to VIN
V
■ FastTransientResponse
11
12
13
IN
16
■ HighEfficiency:Greaterthan95% Possible
■ AsynchronousStart-UpintoaPre-ChargedOutput
■ Small7mmx4mmDFNPackage
■ U.S.Patent#6,922,041
V
IN
LX 15
Pin 29
V
14
LX
IN
Now Available in Lead Free Packaging
DESCRIPTION
TheSP7650isasynchronousstep-downswitchingregulator optimizedforhighefficiency. Thepartisdesignedtobe
especiallyattractivefordualsupply,12Vor24Vdistributedpowersystemssteppeddownwith5Vusedtopowerthe
controller.ThislowerV voltageminimizespowerdissipationinthepartandisusedtodrivethetopswitch.The
CC
SP7650isdesignedtoprovideafullyintegratedbuckregulatorsolutionusingafixed300kHzfrequency,PWMvoltage
mode architecture. Protection features include UVLO, thermal shutdown and output short circuit protection. The
SP7650isavailableinthespacesavingDFNpackage.
TYPICAL APPLICATION CIRCUIT
U1
SP7650
L1
1
2
26
25
24
23
22
21
20
19
18
17
16
15
14
PGND
PGND
PGND
GND
VFB
LX
LX
VOUT
3.3V
0-3A
2.2uH, Irate=4.78A
RZ2
CZ2
RZ3
7.15k1 ,1%
3
LX
1,000pF 15k
CP1
1 ,1%
C3
4
+5V VCC
LX
R1
47uF
6.3V
5
68.1k1 ,1%
VCC
GND
GND
GND
BST
NC
CZ3
22pF
6
150pF
COMP
UVIN
GND
SS
CVCC
2.2uF
7
CF1
ENABLE
8
100pF
DBST
9
RSET
21.5k
(note 2)
1 ,1%
10
11
12
13
SD101AWS
VIN
CSS
47nF
VIN
LX
CBST
6800pF
VIN
LX
VIN
LX
VIN
12V
fs=300Khz
Notes:
C1
22uF
16V
1. U1 Bottom-Side Layout should
have three contacts isolated from
one another:
GND
Vin, SWNODE and GND.
2. RSET=54.48/(Vout-0.8V)
(KOhm)
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ
ABSOLUTE MAXIMUM RATINGS
Thesearestressratingsonlyandfunctionaloperationofthedeviceattheseratingsoranyotherabovethoseindicatedintheoperationsectionsofthe
specificationsbelowisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsoftimemayaffectreliability.
V
CC ................................................................................................... 7V
Allotherpins .......................................................... -0.3VtoV +0.3V
CC
V ........................................................................................................................................... 30V
IN
I
...............................................................................................................................................5A
StorageTemperature..................................................-65°Cto150°C
LX
BST...............................................................................................35V
LX-BST ............................................................................. -0.3Vto7V
LX....................................................................................... -1Vto30V
PowerDissipation ...................................... InternallyLimitedviaOT
P
E
S
DRating ..........................................................................2kVH
B
M
ThermalResistanceV .................................................................................... 5°C/W
JC
ELECTRICAL SPESCTI=FLIXC+A5VT,ILOXN=S
Unlessotherwisespecified:-40°C<TAMB <85°C,-40°C<Tj<125°C,4.5V<V <5.5V,3V<Vin<28V,B
CC
G
N
D=0.0V,UVIN=3.0V,CV =1µF,CCOMP =0.1µF,C =50nF,TypicalmeasuredatV =5V. Thez denotesthe
CC
SS
CC
specificationswhichapplyoverthefulltemperaturerange,unlessotherwisespecified.
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
QUIESCENT CURRENT
V
1.5
4
3
6
mA
mA
mA
mA
V =0.9V
FB
SupplyCurrent(Noswitching)
CC SupplyCurrent(switching)
V
z
z
BSTSupplyCurrent(Noswitching)
BSTSupplyCurrent(switching)
0.2
4
0.4
6
V =0.9V
FB
4
PROTECTION: UVLO
V
4.00
100
2.3
4.25
200
2.5
4.5
300
2.65
400
1
V
mV
V
CC UVLOStartThreshold
V UVLOHysteresis
CC
z
UVIN StartThreshold
UVIN Hysteresis
200
300
mV
µA
UVIN InputCurrent
UVIN =3.0V
ERROR AMPLIFIER REFERENCE
2XGainConfig.,Measure
V ;V = 5 V, T = 25˚C
ErrorAmplifierReference
0.792 0.800 0.808
0.788 0.800 0.812
V
V
FB
CC
ErrorAmplifierReference
z
OverLineandTemperature
ErrorAmplifierTransconductance
ErrorAmplifierGain
6
mA/V
60
dB
NoLoad
COMPSinkCurrent
150
150
µA
V
FB=0.9V,COMP=0.9V
COMPSourceCurrent
µA
V
FB=0.7V,COMP=2.2V
V InputBiasCurrent
50
4
200
nA
V
FB=0.8V
FB
InternalPole
MHz
V
COMPClamp
2.5
-2
VFB=0.7V,TA = 25˚C
COMPClampTemp.Coefficient
mV/˚C
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
2
ELECTRICAL SPESCTI=FLIXC+A5VT,IONS
Unlessotherwisespecified:-40°C<TAMB <85°C,-40°C<Tj<125°C,4.5V<V <5.5V,3V<Vin<28V,B
CC
LX=G
N
D=0.0V,UVIN=3.0V,CV =1µF,CCOMP =0.1µF,C =50nF,TypicalmeasuredatV =5V.
CC
SS
CC
Thez denotesthespecificationswhichapplyoverthefulltemperaturerange,unlessotherwisespecified.
PARAMETER
MIN. TYP. MAX.
UNITS
CONDITIONS
CONTROL LOOP: PWM COMPARATOR, RAMP & LOOP DELAY PATH
RampAmplitude
RAMPOffset
0.92 1.1 1.28
V
V
T = 25˚C, RAMP COMP
A
1.1
-2
untilGHstartsSwitching
RAMP offsetTemp.Coefficient
mV/˚C
GHMinimumPulseWidth
90
97
180
ns
z
z
MaximumDutyRatioMeasured
justbeforepulsingbegins
MaximumControllableDutyRatio
MaximumDutyRatio
92
%
100
%
Validfor20cycles
InternalOscillatorRatio
TIMERS: SOFTSTART
SSChargeCurrent:
240 300 360
kHz
10
1
µA
z
z
SSDischargeCurrent:
mA
FaultPresent,SS=0.2V
MeasuredV (0.8V)-V
PROTECTION: SHORT CIRCUIT & THERMAL
ShortCircuitThresholdVoltage
HiccupTimeout
0.2 0.25 0.3
V
V =0.5V REF
FB
200
20
ms
FB
NumberofAllowableClockCycles
at100%DutyCycle
Cycles
MinimumGLPulseAfter20Cycles
ThermalShutdownTemperature
ThermalRecoveryTemperature
ThermalHysteresis
0.5
145
135
10
Cycles
V =0.7V
FB
˚C
V =0.7V
FB
˚C
˚C
OUTPUT: POWER STAGE
HighSideSwitchR
40
40
mΩ
mΩ
A
V
CC =5V;I =3A; TAMB =25˚C
DSON
OUT
SynchrousLowsideSwitchR
V
CC =5V;I =3A;TAMB =25˚C
DSON
OUT
MaximumOutputCurrent
3
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
3
PIN DESCRIPTION
Pin #
Pin Name
Description
1-3
4,8,19-21
P
GND
G
N
D
Groundconnectionforthesynchronousrectifier
GroundPin.ThecontrolcircuitryoftheICandlowerpowerdriverare
referencedtothispin.Returnseparatelyfromothergroundtracestothe(-)
terminalofCout.
FeedbackVoltageandShortCircuitDetectionpin.Itistheinvertinginputof
theErrorAmplifierandservesastheoutputvoltagefeedbackpointforthe
BuckConverter.Theoutputvoltageissensedandcanbeadjustedthrough
anexternalresistordivider. WheneverV drops0.25Vbelowthepositive
5
V
F
B
FB
reference,ashortcircuitfaultisdetectedandtheICentershiccupmode.
OutputoftheErrorAmplifier.Itisinternallyconnectedtotheinvertinginputof
6
7
COMP
UVIN
SS
thePWMcomparator. Anoptimalfiltercombinationischosenandconnected
tothispinandeithergroundorV
F
B
tostabilizethevoltagemodeloop.
UVLOinputforVinvoltage.ConnectaresistordividerbetweenV andUV
IN
IN
tosetminimumoperatingvoltage.
SoftStart.ConnectanexternalcapacitorbetweenSSandGNDtosetthe
softstartratebasedonthe10µAsourcecurrent.TheSSpinisheldlowviaa
1mA(min)currentduringallfaultconditions.
9
InputconnectiontothehighsideN-channelMOSFET.Placeadecoupling
capacitorbetweenthispinandPGND.
10-13
V
IN
14-16,23-26
LX
ConnectaninductorbetweenthispinandV UT
O
17
NC
NoConnect
Highsidedriversupplypin. ConnectBSTtotheexternalboostdiodeand
capacitorasshownintheTypicalApplicationCircuitonpage1. Highside
driveris connectedbetweenBSTpinandSWNpin.
18
22
BST
Vcc
Inputforexternal5Vbiassupply
THEORY OF OPERATION
General Overview
The SP7650 is a fixed frequency, voltage mode,
synchronousPWMregulatoroptimizedforhigh
efficiency. The part has been designed to be
especially attractive for high voltage applica-
tions utilizing 5V to power the controller and
2.5V to 28V for step down conversion.
The SP7650 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during start up, to prohibit the low side
switch from pulling down the output until the
high side switch has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side switch is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the BST
capacitor during very large duty ratios.
The heart of the SP7650 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference, present
on the positive terminal of the error amplifier
permits the programming of the output voltage
down to 0.8V via the VFB pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp, and
PWM control logic are governed by the internal
oscillator that accurately sets the PWM fre-
quency to 300kHz.
The SP7650 also contains a number of valuable
protection features. Programmable VIN UVLO
allows the user to set the exact value at which
the conversion voltage can safely begin down
conversion, and an internal VCC UVLO which
ensures that the controller itself has enough
voltage to operate properly. Other protection
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢁ
THEORY OF OPERATION
Thermal and Short-Circuit
features include thermal shutdown and short-
circuit detection. In the event that either a ther-
mal, short-circuit, or UVLO fault is detected,
the SP7650 is forced into an idle state where the
output drivers are held off for a finite period
before a restart is attempted.
Protection
Because the SP7650 is designed to drive large
output current, there is a chance that the power
converter will become too hot. Therefore, an
internal thermal shutdown (145°C) has been
included to prevent the IC from malfunctioning
at extreme temperatures.
Soft Start
“Soft Start” is achieved when a power converter
ramps up the output voltage while controlling
the magnitude of the input supply source cur-
rent. In a modern step down converter, ramping
up the positive terminal of the error amplifier
controls soft start. As a result, excess source
current can be defined as the current required to
charge the output capacitor.
A short-circuit detection comparator has also
been included in the SP7650 to protect against
an accidental short at the output of the power
converter. This comparator constantly monitors
the positive and negative terminals of the error
amplifier, and if the VFB pin falls more than
250mV (typical) below the positive reference, a
short-circuit fault is set. Because the SS pin
overridestheinternal0.8Vreferenceduringsoft
start, the SP7650 is capable of detecting short-
circuit faults throughout the duration of soft
start as well as in regular operation.
I
VIN = COUT * (6VOUT / 6TSOFT-START)
The SP7650 provides the user with the option to
program the soft start rate by tying a capacitor
from the SS pin to GND. The selection of this
capacitor is based on the 10uA pull up current
present at the SS pin and the 0.8V reference
voltage. Therefore, the excess source can be
redefined as:
Handling of Faults:
Upon the detection of power (UVLO), thermal,
or short-circuit faults, the SP7650 is forced into
an idle state where the SS and COMP pins are
pulled low and both switches are held off. In the
eventofUVLOfault, theSP7650remainsinthis
idle state until the UVLO fault is removed.
Upon the detection of a thermal or short-circuit
fault, aninternal200ms timerisactivated. Inthe
event of a short-circuit fault, a re-start is at-
tempted immediately after the 200ms timeout
expires. Whereas, when a thermal fault is de-
tected the 200ms delay continuously recycles
and a re-start cannot be attempted until the
thermal fault is removed and the timer expires.
IVIN = COUT * (6VOUT *10µA / (CSS * 0.8V)
Under Voltage Lock Out (UVLO)
The SP7650 contains two separate UVLO com-
parators to monitor the bias (VCC) and conver-
sion (VIN) voltages independently. The VCC
UVLO threshold is internally set to 4.25V,
whereas the VIN UVLO threshold is program-
mable through the UVIN pin. When the UVIN
pinisgreaterthan2.5V, theSP7650ispermitted
to start up pending the removal of all other
faults. Both the VCC and VIN UVLO compara-
tors have been designed with hysteresis to pre-
vent noise from resetting a fault.
Error Amplifier and Voltage Loop
Since the heart of the SP7650 voltage error loop
isahighperformance,widebandwidthtranscon-
ductance amplifier. Because of the amplifier’s
current limited (+/-150µA) transconductance,
there are many ways to compensate the voltage
loop or to control the COMP pin externally. If
a simple, single pole, single zero response is
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
5
THEORY OF OPERATION
desired, then compensation can be as simple as
an RC circuit to Ground. If a more complex
compensation is required, then the amplifier has
enough bandwidth (45° at 4 MHz) and enough
gain (60dB) to run Type III compensation
schemes with adequate gain and phase margins
at crossover frequencies greater than 50kHz.
V
B
ST
G
H
Voltage
V
S
WN
V(V
C
C)
GL
Voltage
The common mode output of the error amplifier
is 0.9V to 2.2V. Therefore, the PWM voltage
ramp has been set between 1.1V and 2.2V to
ensureproper0%to100%dutycyclecapability.
The voltage loop also includes two other very
important features. One is an asynchronous
startup mode. Basically, the synchronous recti-
fier cannot turn on unless the high side switch
has attempted to turn on or the SS pin has
exceeded 1.7V. This feature prevents the con-
troller from “dragging down” the output voltage
during startup or in fault modes. The second
feature is a 100% duty cycle timeout that en-
sures synchronized refreshing of the BST ca-
pacitor at very high duty ratios. In the event that
the high side NFET is on for 20 continuous
clock cycles, a reset is given to the PWM flip-
flop half way through the 21st cycle. This forces
GL to rise for the cycle, in turn refreshing the
BST capacitor. The boost capacitor is used to
generate a high voltage drive supply for the high
side switch, which is 5V above VIN.
0V
V(V )
IN
S
WN
Voltage
-0V
-V(Diode)V
V(V )+V(V
)
IN
CC
B
ST
Voltage
V(V
)
C
C
TIME
Setting Output Voltages
The SP7650 can be set to different output volt-
ages. The relationship in the following formula
is based on a voltage divider from the output to
thefeedbackpinVFB, whichissettoaninternal
reference voltage of 0.80V. Standard 1% metal
film resistors of surface mount size 0603 are
recommended.
Power MOSFETs
The SP7650 contains a pair of integrated low
resistanceN-channelswitchesdesignedtodrive
up to 3A of output current. Care should be taken
to de-rate the output current based on the ther-
mal conditions in the system such as ambient
temperature, airflow and heat sinking. Maxi-
mum output current could be limited by thermal
limitations of a particular application by taking
advantage of the integrated-over-temperature
protective scheme employed in the SP7650.
The SP7650 incorporates a built-in over-tem-
peratureprotectiontopreventinternaloverheat-
ing.
Vout = 0.80V ( R1 / R2 + 1 ) =>
R2 = R1 / [ ( Vout / 0.80V ) – 1 ]
Where R1 = 68.1K1 and for Vout = 0.80V
setting, simply remove R2 from the board.
Furthermore, one could select the value of the
R1 and R2 combination to meet the exact
output voltage setting by restricting R1
resistance range such that 50K1 < R1 <
100K1 for overall system loop stability.
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
6
APPLICATIONS INFORMATION
Inductor Selection
IPP
There are many factors to consider in selecting
the inductor including core material, inductance
vs. frequency, current handling capability, effi-
ciency, size and EMI. In a typical SP7650 cir-
cuit, the inductor is chosen primarily for value,
saturationcurrentandDCresistance. Increasing
the inductor value will decrease output voltage
ripple, but degrade transient response. Low in-
ductor values provide the smallest size, but
cause large ripple currents, poor efficiency and
require more output capacitance to smooth out
the larger ripple current. The inductor must be
able to handle the peak current at the switching
frequency without saturating, and the copper
resistance in the winding should be kept as low
as possible to minimize resistive power loss. A
good compromise between size, loss and cost is
to set the inductor ripple current to be within
20% to 40% of the maximum output current.
IPEAK = IOUT (max)
+
2
...and provide low core loss at the high switch-
ing frequency. Low cost powdered iron cores
have a gradual saturation characteristic but can
introduce considerable AC core loss, especially
whentheinductorvalueisrelativelylowandthe
ripplecurrentishigh.Ferritematerials,although
more expensive, and have an abrupt saturation
characteristic with the inductance dropping
sharply when the peak design current is ex-
ceeded. Nevertheless, they are preferred at high
switchingfrequenciesbecausetheypresentvery
low core loss while the designer is only required
to prevent saturation. In general, ferrite or
molypermalloy materials are a better choice for
all but the most cost sensitive applications.
The switching frequency and the inductor oper-
ating point determine the inductor value as fol-
lows:
Optimizing Efficiency
The power dissipated in the inductor is equal to
the sum of the core and copper losses. To mini-
mizecopperlosses,thewindingresistanceneeds
to be minimized, but this usually comes at the
expense of a larger inductor. Core losses have a
more significant contribution at low output cur-
rent where the copper losses are at a minimum,
and can typically be neglected at higher output
currentswherethecopperlossesdominate.Core
loss information is usually available from the
magneticsvendor.Properinductorselectioncan
affect the resulting power supply efficiency by
more than 15%!
VOUT (VIN (max) <VOUT
)
L =
VIN (max) FS Kr IOUT (max)
where:
fS = switching frequency
Kr = ratio of the AC inductor ripple current to
the maximum output current
The peak to peak inductor ripple current is:
Thecopperlossintheinductorcanbecalculated
using the following equation:
VOUT (VIN (max) <VOUT
VIN(max) FS L
)
IPP =
PL(Cu) = IL2(RMS) RWINDING
where IL(RMS) is the RMS inductor current that
can be calculated as follows:
2
Once the required inductor value is selected, the
proper selection of core material is based on
peak inductor current and efficiency require-
ments. The core must be large enough not to
saturate at the peak inductor current...
1
3
IPP
IOUT(max)
IL(RMS) = IOUT(max) 1 +
(
)
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
7
APPLICATIONS INFORMATION
Output Capacitor Selection
FS = Switching Frequency
D = Duty Cycle
OUT = Output Capacitance Value
The required ESR (Equivalent Series Resis-
tance) and capacitance drive the selection of the
type and quantity of the output capacitors. The
ESR must be small enough that both the resis-
tive voltage deviation due to a step change in the
load current and the output ripple voltage do not
exceed the tolerance limits expected on the
output voltage. During an output load transient,
the output capacitor must supply all the addi-
tional current demanded by the load until the
SP7650 adjusts the inductor current to the new
value.
C
Input Capacitor Selection
The input capacitor should be selected for ripple
current rating, capacitance and voltage rating.
The input capacitor must meet the ripple current
requirement imposed by the switching current.
In continuous conduction mode, the source cur-
rent of the high-side MOSFET is approximately
a square wave of duty cycle VOUT/VIN. More
accurately the current wave form is trapezoidal,
given a finite turn-on and turn-off, switch tran-
sition slope. Most of this current is supplied by
the input bypass capacitors. The RMS current
handling capability of the input capacitors is
determined at maximum output current and
under the assumption that the peak to peak
inductor ripple current is low, it is given by:
ICIN(RMS) = IOUT(max)
In order to maintain VOUT ,the capacitance must
belargeenoughsothattheoutputvoltageisheld
up while the inductor current ramps to the value
corresponding to the new load current. Addi-
tionally, the ESR in the output capacitor causes
a step in the output voltage equal to the current.
Because of the fast transient response and inher-
ent 100%/0% duty cycle capability provided by
the SP7650 when exposed to output load tran-
sients, the output capacitor is typically chosen
for ESR, not for capacitance value.
3
D(1 - D)
The worse case occurs when the duty cycle D is
50% and gives an RMS current value equal to
The output capacitor’s ESR, combined with the
inductor ripple current, is typically the main
contributor to output voltage ripple. The maxi-
mum allowable ESR required to maintain a
specifiedoutputvoltageripplecanbecalculated
by:
I
OUT/2.
Select input capacitors with adequate ripple
current rating to ensure reliable operation.
The power dissipated in the input capacitor is:
RESR ) 6V UT
O
P
= IC2IN (rms) RESR(CIN)
CIN
I K-P
P
K
This can become a significant part of power
losses in a converter and hurt the overall energy
transfer efficiency. The input voltage ripple
primarily depends on the input capacitor ESR
and capacitance. Ignoring the inductor ripple
current, the input voltage ripple can be deter-
mined by:
where:
6VOUT = Peak to Peak Output Voltage Ripple
PK-PK = Peak to Peak Inductor Ripple Current
I
The total output ripple is a combination of the
ESR and the output capacitance value and can
be calculated as follows:
I
OUT (MAX )VOUT (VIN <VOUT )
6VIN = Iout(max) RESR(CIN )
+
2
FSCINVIN
6VOUT
=
2 + (IPPRESR
)
IPP (1 – D)
2
COUTFS
(
)
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢂ
APPLICATIONS INFORMATION
The first step of compensation design is to pick
the loop crossover frequency. High crossover
frequencyisdesirableforfasttransientresponse,
but often jeopardizes the power supply stability.
Crossover frequency should be higher than the
ESR zero but less than 1/5 of the switching
frequency or 60kHz. The ESR zero is contrib-
uted by the ESR associated with the output
capacitors and can be determined by:
The capacitor type suitable for the output capac-
itors can also be used for the input capacitors.
However, exercise additional caution when tanta-
lum capacitors are used. Tantalum capacitors are
known for catastrophic failure when exposed to
surge current, and input capacitors are prone to
such surge current when power supplies are con-
nected “live” to low impedance power sources.
Although tantalum capacitors have been success-
fully employed at the input, it is generally not
recommended.
1
ƒZ(ESR)
=
2/ COUT RESR
The next step is to calculate the complex conju-
gate poles contributed by the LC output filter,
Loop Compensation Design
1
The open loop gain of the whole system can be
divided into the gain of the error amplifier,
PWM modulator, buck converter output stage,
and feedback resistor divider. In order to cross
over at the desired frequency cut-off (FCO), the
gain of the error amplifier has to compensate for
the attenuation caused by the rest of the loop at
this frequency. The goal of loop compensation
is to manipulate loop frequency response such
that its crossover gain at 0db results in a slope of
-20db/dec.
ƒP(LC)
=
2/ L COUT
When the output capacitors are of a Ceramic
Type, the SP7650 Evaluation Board requires a
Type III compensation circuit to give a phase
boostof180°inordertocounteracttheeffectsof
anunderdampedresonanceoftheoutputfilterat
the double pole frequency.
Type III Voltage Loop
PWM Stage
GPWM Gain
Block
Output Stage
Compensation
G
OUT (s) Gain
GAMP (s) Gain Block
Block
V
(SRz
2
Cz
2
+
1)(SR1Cz
3
+
1)
(SRESRCOU +1)
V AIN
T S(R RT
+
R C)C UT
+
1]
+
_
VREF
(Volts)
VOUT
(Volts)
S
R1Cz2(SRz
3
Cz
3
+
1)(SRz
2
Cp
1
+
1)
[S^
2
LCOU
+
R M
P
_
P
P
E
S
D
O
Notes:R SR =OutputCa
pacitorEquivalentSeriesResistance.
E
R
DC =OutputIn
d
uctorD
C
Resistance.
V AM PP =SP6
1
3
2InternalR
A
M
P
A
mplitu
d
ePeaktoPeakVolta
g
e.
R
_
Co
n
dition:CPz2>>Cp1&R1>>Rz
3
OutputLo
a
dResistance>>R SR &R C
E
D
Voltage Feedback
FBK Gain Block
G
R
V E
R F
2
or
V U
O T
(R R )
1
+
2
VFBK
(Volts)
SP7650 Voltage Mode Control Loop with Loop Dynamic
Definitions:
R
R
R
ESR = Output Capacitor Equivalent Series Resistance
DC = Output Inductor DC Resistance
RAMP_PP = SP7650 internal RAMP Amplitude Peak to Peak Voltage
Conditions:
CZ2 >> Cp1 and R1 >> Rz3
Output Load Resistance >> RESRandRDC
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢃ
APPLICATIONS INFORMATION
SP765X Thermal Resistance
The SP765X family has been tested with a
variety of footprint layouts along with different
copper area and thermal resistance has been
measured. The layouts were done on 4 layer
FR4 PCB with the top and bottom layers using
3oz copper and the power and ground layers
using 1oz copper.
Using a minimum of 0.1 square inches of (3
ounces of) Copper on the top layer with no vias
connecting to the 3 other layers produced a
thermal resistance of 44°C/W. This thermal
impedance is only 22% higher than the medium
andlargefootprintlayouts, indicatingthatspace
constrained designs can still benefit thermally
from the Powerblox family of ICs. This indi-
cates that a minimum footprint of 0.1 square
inch, if used on a 4 layer board, can produce
44°C/W thermal resistance. This approach is
still very worthwhile if used in a space con-
strained design.
FortheMinimumfootprint,onlyabout0.1square
inch (of 3 ounces of) Copper was used on the top
or footprint layer, and this layer had no vias to
connect to the 3 other layers. For the Medium
footprint, about 0.7 square inches (of 3 ounces
of) Copper was used on the top layer, but vias
were used to connect to the other 3 layers. For
the Maximum footprint, about 1.0 square inch
(of 3 ounces of) Copper was used on the top
layer and many vias were used to connect to the
3 other layers.
The following page shows the footprint layouts
from an ORCAD file. The thermal data was
taken for still air, not with forced air. If forced
air is used, some improvement in thermal resis-
tance would be seen.
The results show that only about 0.7 square
inches (of 3 ounces of) Copper on the top layer
and vias connecting to the 3 other layers are
needed to get the best thermal resistance of
36°C/W. Adding area on the top beyond the 0.7
square inches did not reduce thermal resistance.
SP765XThermalResistance
4LayerBoard:
TopLayer3ouncesCopper
GNDLayer1ounceCopper
PowerLayer1ounceCopper
BottomLayer3ouncesCopper
MinimumFootprint:44°C/W
TopLayer:0.1squareinch
NoViastoother3Layers
MediumFootprint:36°C/W
TopLayer:0.7squareinch
Viastoother3Layers
MaximumFootprint:36°C/W
TopLayer:1.0squareinch
Viastoother3Layers
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ0
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀꢀ
APPLICATIONS INFORMATION
Gain
(dB)
ErrorAmplifierGain
BandwidthProduct
Condition:
C22>>CP1,R1>>RZ3
20Log(RZ2/R1)
Frequency
(Hz)
Bode Plot of Type III Error Amplifier Compensation.
CP1
RZ2
CZ2
RZ3
CZ3
V
OUT
5
-
R1
6
VFB
68.1k,1%
+
COMP
R
SET
CF1
+
0.8V
-
R
-0.8)
(k1)
=54.48/(V
OUT
SET
Type III Error Amplifier Compensation Circuit
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ2
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load at 3.3Vin
Efficiency vs Load at 5.0Vin
100
95
90
85
80
75
70
65
60
100
95
90
85
Vout=3.3V
Vout=2.5V
Vout=1.8V
Vout=1.2V
80
75
70
65
60
Vout=2.5V
Vout=1.8V
Vout=1.2V
0.0
0.5
1.0
1.5
Output Load (A)
2.0
2.5
3.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Load (A)
Efficiency vs Load at 24Vin
Efficiency vs Load at 12Vin
100
100
95
90
85
80
75
70
65
60
95
90
85
80
75
70
65
60
Vout=12V
Vout=5.0V
Vout=3.3V
Vout=2.5V
Vout=5.0V
Vout=3.3V
Vout=2.5V
Vout=1.8V
Vout=1.2V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Load (A)
Output Load (A)
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ3
TYPICAL PERFORMANCE CHARACTERISTICS
S
P7
6
5
0V
o
utv.sIoutPlots@
SP7650Effi.v.sIoutPlots@
Vin=12V,andVout=3.3V
Vin
=
1
2
V,a
n
dV
o
ut=3.3
V
3.34
3.33
3.32
3.31
3.3
95.0
90.0
85.0
80.0
75.0
70.0
0
0.5
1.0
1.5
2.0
2.5
3.0
0.5
1.0
1.5
2.0
2.5
3.0
L
oa
dCurrent(A)
LoadCurrent(A)
SP7650Effi.v.sIoutPlots@
Vin=12V,andVout=5.0V
SP7650Voutv.sIoutPlots@
Vin=12V,andVout=5.0V
94.0
92.0
90.0
88.0
86.0
84.0
82.0
80.0
78.0
76.0
74.0
4.9710
4.9700
4.9690
4.9680
4.9670
4.9660
4.9650
0
0.5
1.0
1.5
2.0
2.5
3.0
0.5
1.0
1.5
2.0
2.5
3.0
LoadCurrent(A)
LoadCurrent(A)
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀꢁ
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ5
Part Number
Temperature
Package
SP7650ER.................................................-40°Cto+85°C................................. 26Pin7X4DFN
SP7650ER-L..............................................-40°Cto+85°C.............(LeadFree)26Pin 7X4DFN
SP7650ER/TR ...........................................-40°Cto+85°C................................. 26Pin7X4DFN
SP7650ER-L/TR........................................-40°Cto+85°C.............(LeadFree)26Pin 7X4DFN
BulkPackminimumquantityis500.
/TR=TapeandReel. Packquantityis3,000DFN.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Solved by Sipex
tm
Milpitas, CA ꢃ5035
TEL: (ꢁ0ꢂ) ꢃ3ꢁ-7500
FAX: (ꢁ0ꢂ) ꢃ35-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume
any liability arising out of the application or use of any product or circuit described herein; neither does it convey
any license under its patent rights nor the rights of others.
Date: ꢀꢀ/ꢀ5/06
SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator
© Copyright 2006 Sipex Corporation
ꢀ6
相关型号：
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