S72XS256RE0AHBJ13 [SPANSION]
Memory Circuit, Flash+SDRAM, 16MX16, CMOS, PBGA133, 8 X 8 MM, 0.50 MM PITCH, LEAD FREE, FBGA-133;
| 型号： | S72XS256RE0AHBJ13 |
| 厂家： | 
SPANSION |
| 描述： | Memory Circuit, Flash+SDRAM, 16MX16, CMOS, PBGA133, 8 X 8 MM, 0.50 MM PITCH, LEAD FREE, FBGA-133 动态存储器 内存集成电路 |
| 文件： | 总10页 (文件大小：437K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S72XS-R Based MCPs
MirrorBit® Flash Memory and DRAM
128/256 Mb (8/16M x 16 bit), 1.8 Volt-Only, Address-High,
Address-Low, Data Multiplexed Simultaneous Read/Write,
Burst Mode Flash Memory
S72XS-R Based MCPs Cover Sheet
128/256 Mb (8/16M x 16 bit) DDR DRAM on Split Bus
Data Sheet (Advance Information)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions.
Publication Number S72XS-R_00
Revision 09
Issue Date April 17, 2012
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
Notice On Data Sheet Designations
Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of
product information or intended specifications throughout the product life cycle, including development,
qualification, initial production, and full production. In all cases, however, readers are encouraged to verify
that they have the latest information before finalizing their design. The following descriptions of Spansion data
sheet designations are presented here to highlight their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion Inc. is developing one or more specific
products, but has not committed any design to production. Information presented in a document with this
designation is likely to change, and in some cases, development on the product may discontinue. Spansion
Inc. therefore places the following conditions upon Advance Information content:
“This document contains information on one or more products under development at Spansion Inc.
The information is intended to help you evaluate this product. Do not design in this product without
contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a commitment
to production has taken place. This designation covers several aspects of the product life cycle, including
product qualification, initial production, and the subsequent phases in the manufacturing process that occur
before full production is achieved. Changes to the technical specifications presented in a Preliminary
document should be expected while keeping these aspects of production under consideration. Spansion
places the following conditions upon Preliminary content:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. The Preliminary status of this document indicates that product qualification has been
completed, and that initial production has begun. Due to the phases of the manufacturing process that
require maintaining efficiency and quality, this document may be revised by subsequent versions or
modifications due to changes in technical specifications.”
Combination
Some data sheets contain a combination of products with different designations (Advance Information,
Preliminary, or Full Production). This type of document distinguishes these products and their designations
wherever necessary, typically on the first page, the ordering information page, and pages with the DC
Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first
page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal changes
are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include
those affecting the number of ordering part numbers available, such as the addition or deletion of a speed
option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a
description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following
conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. Spansion Inc. deems the products to have been in sufficient production volume such
that subsequent versions of this document are not expected to change. However, typographical or
specification corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local sales office.
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S72XS-R Based MCPs
S72XS-R_00_09 April 17, 2012
S72XS-R Based MCPs
MirrorBit® Flash Memory and DRAM
128/256 Mb (8/16M x 16 bit), 1.8 Volt-Only, Address-High,
Address-Low, Data Multiplexed Simultaneous Read/Write,
Burst Mode Flash Memory
128/256 Mb (8/16M x 16 bit) DDR DRAM on Split Bus
Data Sheet (Advance Information)
Features
Power supply voltage of 1.7 V to 1.95 V
Packages
– 8.0 x 8.0 mm, 133-ball MCP
Burst Speeds
– Flash = 83 MHz, 104 MHz, or 108 MHz
– DDR DRAM = 166 MHz
Operating Temperature
– Wireless, –25°C to +85°C
– Industrial, –40°C to +85°C
General Description
This document contains information on the S72XS-R MCP stacked products. Refer to the S29VS/XS-R data sheet
(S29VS_XS-R_00) for full electrical specifications of the Flash memory component.
The S72XS Series is a product line of stacked products (MCPs), and consists of:
S29XS family Address-High, Address-Low, Data Multiplexed Flash memory die
DDR DRAM
The products covered by this document are listed in the tables below.
DRAM Density
Flash Density
128 Mb
128 Mb
256 Mb
S72XS128RD0
256 Mb
S72XS256RE0
DDR Specification Reference
Spansion Documentation
Publication Number
SDM128D166D1R
Density
128 Mb
256 Mb
Reference Name
128 Mb (8M x 16 bit) LPDDR333 SDRAM
256 Mb (16M x 16-bit) DDR DRAM
SDM256D166D1R/D3R
Publication Number S72XS-R_00
Revision 09
Issue Date April 17, 2012
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
1. Ordering Information
The order number (Valid Combination) is formed by the following:
S72XS
128
R
D0
AH
B
HE
3
PACKING TYPE
0 = Tray
3 = 13-inch Tape and Reel
MODEL NUMBER
See Valid Combinations table
PACKAGE MODIFIER
B = 133-ball, 8x8 mm, FBGA MCP
PACKAGE AND MATERIAL TYPE
AH = Thin profile Fine-pitch BGA Pb-free Low-Halogen MCP (0.5 mm pitch)
DDR DRAM AND DATA FLASH DENSITY
D0 = 128 Mb DDR, No Data Flash
E0 = 256 Mb DDR, No Data Flash
PROCESS TECHNOLOGY
R = 65 nm, MirrorBit Technology
CODE FLASH DENSITY
128 = 128 Mb
256 = 256 Mb
PRODUCT FAMILY
S72XS Multi-Chip Product (MCP)
1.8 V Address-High, Address-Low, Data Multiplexed, SRW, Burst Mode Flash and DDR
DRAM on Split Bus
1.1
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult your local
sales office to confirm availability of specific valid combinations and to check on newly released
combinations.
Electronic
Serial
Number
DDR
Flash DRAM
Model Packing Flash
Temp
Range
Flash
Density
DRAM
Specification
Base OPN
Package
DRAM Speed Speed
Density (MHz) (MHz)
Package
Number
Type
Boot
HE
HD
H1
J1
Top
Top
Yes
Yes
Yes
No
83
166
166
S72XS128RD0
128 Mb 128 Mb
256 Mb 256 Mb
SDM128D166D1R
SDM256D166D1R
SDM256D166D3R
104
Wireless
Industrial
8.0 x 8.0 mm
133-ball MCP
(RSC133)
Top
0, 3
AHB
(Note 1)
Bottom
Top
S72XS256RE0
108
166
HH
JH
Yes
Yes
Bottom
Notes:
1. Packing Type 0 is standard. Specify other options as required.
2. BGA package marking omits leading “S” and packing type designator from ordering part number.
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D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
2. Electronic Serial Number
For applicable devices, the Factory Secured Silicon Area contains a random, 128-bit ESN, stored in the
address range 000000h-000007h.
3. Product Block Diagram
F-RS T#
A DQ15-A DQ0
F-V P P
F-CLK
F-RDY
NOR
F-CE #
F-OE #
F-W E #
F-A V D#
FLASH
XS-R
(AADM )
F-V CC
F-V CCQ
V S S
D-RA S #
D-CA S #
D-B A 0
D-CLK
D-CLK #
D-LDQS
D-UDQS
D-LDQM
D-UDQM
DDR
DRAM
M EM ORY
D-B A 1
D-CK E
D-W E #
D-CE #
D-A m ax - D-A 0
D-V CC
D-DQ15 - D-DQ0
V S S
D-V CCQ
Notes:
1. Amax indicates highest address bit for memory component:
a. Amax = A11 for 128 Mb DDR DRAM, A12 for 256 Mb DDR DRAM.
2. For Flash, A15 - A0 is tied to DQ15 - DQ0.
April 17, 2012 S72XS-R_00_09
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D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
4. Connection Diagrams
Figure 4.1 133-ball Fine-Pitch Ball Grid Array MCP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Legend
A
B
C
D
E
F
Index Location
DNU
DNU
DNU
VSS D-VCCQ D-DQ9 D-DQ8
VSS D-VCC D-VCC D-DQ5 D-DQ3
VSS
DNU
DNU
VSS D-DQ13 D-UDQS D-DQ10 VSS D-VCCQD-VCCQD-LDQM D-DQ6 D-DQ4 D-DQ1 D-VCCQ DNU
Do Not Use
D-VCC D-DQ15 D-DQ14 D-DQ12 D-DQ11 D-UDQM VSS D-VCC VSS
D-DQ7 D-LDQS D-DQ2 D-DQ0
VSS
No Connect
RFU
RFU
NC
NC
INDEX
F-OE# ADQ8 D-VCC
DRAM Only
RFU
RFU
RFU
RFU
ADQ9 ADQ1 ADQ0
Code Flash Only
Reserved for Future Use
VSS
RFU
VSS
ADQ3 ADQ2
G
F-CE#
RFU F-WE#
F-VCCQ ADQ11 ADQ10
H
J
F-VPP F-VCC F-CLK
ADQ13 ADQ12 ADQ4
RFU
VSS
NC
NC
VSS
VSS
ADQ5
K
L
RFU F-AVD#
NC
ADQ7 ADQ6
RFU F-RST# D-CE#
F-VCCQ ADQ15 ADQ14
M
N
NC
RFU
D-A3
D-A6
D-A9 D-CKE
VSS D-WE# D-A10
D-A1
D-A2
RFU
RFU
RFU
F-RDY
VSS
DNU
DNU
VSS D-VCC D-A5
D-A8 D-CAS# D-CLK# D-BA1 D-A11
D-A12
F-VCC DNU
P
DNU
NC
D-A4
D-A7 D-RAS# D-CLK D-VCC D-BA0 D-A0 D-VCC VSS
DNU
DNU
MCP
DDR DRAM Density
128 Mb
D-Amax
S72XS128RD0
S72XS256RE0
D-A11
D-A12
256 Mb
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S72XS-R Based MCPs
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D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
5. Input/Output Descriptions
Symbol
Description
Flash
RAM
ADQ15 – ADQ0
F-CE#
Flash multiplexed Address and Data
Flash Chip-enable input.
X
X
X
X
X
X
X
F-OE#
Flash Output Enable input. Asynchronous relative to CLK for Burst mode.
Flash Write Enable input
F-WE#
F-VCC
Flash device power supply (1.7 V to 1.95 V)
Flash Input/Output Buffer power supply
Ground
F-VCCQ
VSS
X
Flash ready output. Indicates the status of the Burst read. V = data invalid. V = data
valid.
OL
OH
F-RDY
X
Flash Clock. The first rising edge of CLK in conjunction with AVD# low latches the address
input and activates burst mode operation. After the initial word is output, subsequent rising
edges of CLK increment the internal address counter. CLK should remain low during
asynchronous access.
F-CLK
X
Flash Address Valid input. Indicates to device that the valid address is present on the
address inputs. V = for asynchronous mode, indicates valid address; for burst mode,
IL
F-AVD#
X
causes starting address to be latched on rising edge of CLK. V = device ignores address
IH
inputs
F-RST#
F-VPP
Flash hardware reset input. V = device resets and returns to reading array data
X
X
IL
Flash accelerated input. At V , accelerates programming; automatically places device in
HH
unlock bypass mode. At V , disables all program and erase functions. Should be at V for
IL
IH
all other conditions.
DRAM Address inputs.
DRAM Data input/output
DRAM System Clock
DRAM Chip Select
D-Amax – D-A0
D-DQ15 – D-DQ0
D-CLK
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D-CE#
D-CKE
DRAM Clock Enable
DRAM Bank Select
D-BA1 – BA0
D-RAS#
DRAM Row Address Strobe
D-CAS#
DRAM Column Address Strobe
D-UDQM – D-LDQM DRAM Data Input Mask
D-WE#
DRAM Write Enable input
D-VCCQ
D-VCC
DRAM Input/Output Buffer power supply
DRAM device power supply
D-UDQS
D-LDQS
D-CLK#
DRAM Upper Data Strobe, output with read data and input with write data
DRAM Lower Data Strobe, output with read data and input with write data
DDR Clock for negative edge of CLK
Reserved for Future Use. No device internal signal is currently connected to the package
connector but there is potential future use for the connector for a signal. It is recommended
to not use RFU connectors for PCB routing channels so that the PCB may take advantage
of future enhanced features in compatible footprint devices.
RFU
NC
Not Connected. No device internal signal is connected to the package connector nor is
there any future plan to use the connector for a signal. The connection may safely be used
for routing space for a signal on a Printed Circuit Board (PCB).
Do Not Use. A device internal signal may be connected to the package connector. The
connection may be used by Spansion for test or other purposes and is not intended for
connection to any host system signal. Any DNU signal related function will be inactive when
DNU
the signal is at V . The signal has an internal pull-down resistor and may be left
IL
unconnected in the host system or may be tied to V . Do not use these connections for
SS
PCB signal routing channels. Do not connect any host system signal to these connections.
April 17, 2012 S72XS-R_00_09
S72XS-R Based MCPs
7
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
6. Physical Dimensions
6.1
RSC133—133-ball Fine-Pitch Ball Grid Array (FBGA) 8.0 x 8.0 mm
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S72XS-R Based MCPs
S72XS-R_00_09 April 17, 2012
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
7. Revision History
Section
Description
Revision 01 (October 7, 2008)
Initial release
Revision 02 (January 13, 2009)
Global
Added section Electronic Serial Number
Added SDM128D166D1K OPN
Revision 03 (December 18, 2009)
Global
Figure: Updated D-VSS and D-VSSQ connections
Removed D-TEST signal
Product Block Diagram
Physical Dimensions
Updated with RSC133
Revision 04 (February 1, 2010)
Connection Diagrams
Revision 05 (August 19, 2010)
Global
Updated figure: changed Ball A2 with DNU
Updated references for Low Power DDR SDRAM to SDM128D166D1R
Added reference for 256 Mb DDR DRAM
DDR Specification Reference
Added “not recommended for new designs” note to OPN S72XS128RD0AHBH60
Added OPN S72XS256RE0AHBH1
Product Selector Guide
Product Block Diagram
Removed OPN S72XS256RD0AHBHE
Updated block diagram to show common Ground
Updated Note 1b
Updated connection diagram to show common Ground
Updated to show D-A12
Connection Diagrams
Added table to show D-Amax value for related MCP
Balls F1, M2 and M12 changed from NC to RFU
Replaced F-VSS, D-VSS, D-VSSQ with VSS
Corrected F-ACC to F-VPP
Input/Output Descriptions
Refreshed descriptions for DNU, NC, RFU
Ordering Information/Valid
Combinations
Updated for new OPN S72XS256RE0AHBH1
Updated 256 Mb DRAM specification reference
Revision 06 (December 10, 2010)
Global
Revision 07 (March 17, 2011)
Removed SDM128D166D1K references
Global
Removed OPN S72XS128RD0AHBH60, Added OPN S72XS256RE0AHBJ1
Revision 08 (October 5, 2011)
Ordering Information
Replaced Product Selector Guide section
Made a separate section
Valid Combinations
Added OPNs: S72XS128RD0AHBHD, S72XS256RE0AHBHH/JH
Revision 09 (April 17, 2012)
Ordering Information
Added ESN support for S72XS256RE0AHBH1
April 17, 2012 S72XS-R_00_09
S72XS-R Based MCPs
9
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as
contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the
public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility,
aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for
any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to
you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor
devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design
measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal
operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under
the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country,
the prior authorization by the respective government entity will be required for export of those products.
Trademarks and Notice
The contents of this document are subject to change without notice. This document may contain information on a Spansion product under
development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this
document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose,
merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any
damages of any kind arising out of the use of the information in this document.
Copyright © 2008-2012 Spansion Inc. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® Eclipse™, ORNAND™ and
combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used
are for informational purposes only and may be trademarks of their respective owners.
10
S72XS-R Based MCPs
S72XS-R_00_09 April 17, 2012
相关型号：
S72XS256RE0AHBJH0
Memory Circuit, Flash+SDRAM, 16MX16, CMOS, PBGA133, 8 X 8 MM, 0.50 MM PITCH, LEAD FREE, FBGA-133
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