S75WS256NDFBAWLK0 [SPANSION]
Stacked Multi-Chip Product (MCP); 堆叠式多芯片产品( MCP )型号: | S75WS256NDFBAWLK0 |
厂家: | SPANSION |
描述: | Stacked Multi-Chip Product (MCP) |
文件: | 总15页 (文件大小:395K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
S75WS-N Based MCPs
Stacked Multi-Chip Product (MCP)
256 Megabit (16M x 16-bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst-mode Flash Memory
with 128 Mb (8M x 16-Bit) RAM Type 4 and
512 Mb (32M x 16-bit) Data Flash or 1 Gb ORNAND Flash
PRELIMINARY
Data Sheet
Notice to Readers: This document indicates states the current technical
specifications regarding the Spansion product(s) described herein. The
Preliminary status of this document indicates that a product qualification has
been completed, and that initial production has begun. Due to the phases of
the manufacturing process that require maintaining efficiency and quality, this
document may be revised by subsequent versions or modifications due to
changes in technical specifications.
Publication Number S75WS-N_02 Revision A Amendment 2 Issue Date October 6, 2005
P r e l i m i n a r y
Notice On Data Sheet Designations
Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise
readers of product information or intended specifications throughout the product life cycle, in-
cluding development, qualification, initial production, and full production. In all cases, however,
readers are encouraged to verify that they have the latest information before finalizing their de-
sign. The following descriptions of Spansion data sheet designations are presented here to high-
light their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion LLC is developing one or more spe-
cific products, but has not committed any design to production. Information presented in a doc-
ument with this designation is likely to change, and in some cases, development on the product
may discontinue. Spansion LLC therefore places the following conditions upon Advance Informa-
tion content:
“This document contains information on one or more products under development at Spansion LLC. The
information is intended to help you evaluate this product. Do not design in this product without con-
tacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a
commitment to production has taken place. This designation covers several aspects of the prod-
uct life cycle, including product qualification, initial production, and the subsequent phases in the
manufacturing process that occur before full production is achieved. Changes to the technical
specifications presented in a Preliminary document should be expected while keeping these as-
pects of production under consideration. Spansion places the following conditions upon Prelimi-
nary content:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. The Preliminary status of this document indicates that product qualification has been completed,
and that initial production has begun. Due to the phases of the manufacturing process that require
maintaining efficiency and quality, this document may be revised by subsequent versions or modifica-
tions due to changes in technical specifications.”
Combination
Some data sheets will contain a combination of products with different designations (Advance In-
formation, Preliminary, or Full Production). This type of document will distinguish these products
and their designations wherever necessary, typically on the first page, the ordering information
page, and pages with DC Characteristics table and AC Erase and Program table (in the table
notes). The disclaimer on the first page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal
changes are expected, the Preliminary designation is removed from the data sheet. Nominal
changes may include those affecting the number of ordering part numbers available, such as the
addition or deletion of a speed option, temperature range, package type, or V range. Changes
IO
may also include those needed to clarify a description or to correct a typographical error or incor-
rect specification. Spansion LLC applies the following conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. Spansion LLC deems the products to have been in sufficient production volume such that sub-
sequent versions of this document are not expected to change. However, typographical or specification
corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local AMD or Fujitsu
sales office.
ii
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
S75WS-N Based MCPs
Stacked Multi-Chip Product (MCP)
256 Megabit (16M x 16-bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst-mode Flash Memory with
128 Mb (8M x 16-Bit) RAM Type 4 and
512 Mb (32M x 16-bit) Data Flash or 1Gb ORNAND Flash
Data Sheet
PRELIMINARY
General Description
The S75WS-N Series is a product line of stacked Multi-Chip Product (MCP) packages and consists
of the following items:
One or more S29WS-N code Flash
RAM Type 4
One or more S29WS-N data Flash, or one or more S30MS-P ORNAND Flash
The products covered by this document are listed in the table below:
Code Flash
Density
RAM
Density
NOR Data Flash
Density
ORNAND Data Flash
Density
Device
256 Mb
128 Mb
256 Mb
512 Mb
1024 Mb
S75WS256NDF
S75WS256NEG
Distinctive Characteristics
MCP Features
Power supply voltage of 1.7 V to 1.95 V
High Performance
— 54 MHz, 66 Mhz, 80 MHz
Packages
— 9 x 12 mm 84 ball FBGA
— 11 x 13 mm 115 ball FBGA
Operating Temperature
— Wireless, –25°C to +85°C
Publication Number S75WS-N_02 Revision A Amendment 2 Issue Date October 6, 2005
P r e l i m i n a r y
Contents
S75WS-N Based MCPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
1
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 NOR Flash + pSRAM + ORNAND Flash MCPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
3
4
5
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Input/Output Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
MCP Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Connection Diagrams/Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
5.1 Special Handling Instructions for FBGA Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 Connection Diagram – NOR Flash & 1.8 V RAM Type 4 Based Pinout, 9 x 12 mm . . . . . . . . . . . . . . . . . . . . . . . 8
5.3 Connection Diagram – ORNAND-Based Pinout, 11 x 13 mm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.4 Physical Dimensions – FEA084 – Fine Pitch Ball Grid Array 9 x 12 mm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
5.5 Physical Dimensions – FND115 – Fine Pitch Ball Grid Array 11 x 13 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
MCP Revisions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
Tables
Table 2.1
Table 2.2
Table 3.1
Table 3.2
MCP Configurations and Valid Combinations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ORNAND Configurations and Valid Combinations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
NOR Flash and RAM Input/Output Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ORNAND Flash Input/Output Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figures
Figure 4.1
Figure 4.2
MCP Block Diagram 1 ......................................................................................................................... 6
ORNAND Block Diagram...................................................................................................................... 7
2
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
P r e l i m i n a r y
1 Product Selector Guide
MCP Configuration
DYB
Power-Up
State
Package
84 ball
FBGA
(mm)
Code
Density Density
Data Storage
RAM
Data Flash Flash pSRAM
pSRAM
(RAM Type 4)
Supplier
Model
Numbers
Device
Density
(Mb)
Speed Speed
(MHz) (MHz)
Code
Flash
RAM
(Mb)
(Mb)
(Mb)
Flash
(See Note)
LK
NK
LJ
0
1
0
1
0
1
54
66
80
54
66
80
S75WS256NDF
WS256N
128
2xWS256N
256
128
512
4
9x12
NJ
LH
NH
b
Note: 0 (Protected), 1 (Unprotected [Default State])
1.1
NOR Flash + pSRAM + ORNAND Flash MCPs
Model
Numbers
NOR Flash
Density
ORNAND Flash
Density
pSRAM
Density
ORNAND Bus
Width
Device
MCP Speed
Supplier
Package
UK
UJ
54 MHz
66 MHz
80 MHz
54 MHz
66 MHz
80 MHz
x16
x8
1.8 V
pSRAM
Type 4
UH
SK
SJ
S75WS256NEG
512 Mb
1024 Mb
256 Mb
11 x 13 x 1.4 mm
SH
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
3
P r e l i m i n a r y
2 Ordering Information
The ordering part number is formed by a valid combination of the following:
S75WS 256 BA K 0
N
D
F
W
L
Packing Type
0
2
3
=
=
=
Tray
7” Tape and Reel
13” Tape and Reel
RAM Supplier; Speed Combination
K
J
H
=
=
=
RAM Type 4, 54 MHz
RAM Type 4, 66 MHz
RAM Type 4, 80 MHz
Package Dimensions and Ball Count; DYB Power Up;
Flash Device Family (Data Storage)
L
=
=
=
=
1.4 mm, 9 x 12, 84 ball; 0, WS as Data Flash
1.4 mm, 9 x 12, 84 ball; 1, WS as Data Flash
1.4mm, 11x13, 115-ball, x16 ORNAND Data Flash
1.4mm, 11x13, 115-ball, x8 ORNAND Data Flash
N
U
S
Temperature Range
Wireless (–25°C to +85°C)
W
=
Package Type And Material
BA
=
Very Thin Fine-Pitch Ball Grid Array (BGA),
Lead (Pb)-free Compliant Package
Very Thin Fine-Pitch Ball Grid Array (BGA),
Lead (Pb)-free Package
BF
=
Data Flash Density
F
G
=
=
512 Mb
1024 Mb
RAM Density
D
E
=
=
128 Mb
256 Mb
Process Technology
110 nm, Mirror Bit Technology
N
=
Code Flash Density
256 256 Mb
=
Device Family
S75WS = Multi-chip Product (MCP)
1.8-volt Burst Mode Flash Memory, RAM, and data flash
Table 2.1 MCP Configurations and Valid Combinations
Valid Combination
S75WS256N
D
F
BA, BF
W
L, N
K, H
Table 2.2 ORNAND Configurations and Valid Combinations
Valid Combination
S75WS256N
E
G
BA, BF
W
U, S
K, J, H
Package Marking Note:
The BGA package marking omits the leading S75 and packing type designator from the ordering part number.
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult
your local sales office to confirm availability of specific valid combinations and to check on newly
released combinations.
4
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
P r e l i m i n a r y
3 Input/Output Descriptions
Table 3.1 identifies the input and output package connections provided on the device.
Table 3.1 NOR Flash and RAM Input/Output Descriptions
Symbol
– A0
Description
A
Address Inputs
max
DQ15 - DQ0
OE#
Data Inputs/Outputs
Output Enable input
Write Enable input
Ground
(Common)
WE#
V
SS
NC
No Connect; not connected internally.
RDY
Ready output. Indicates the status of the Burst read.
(Flash)
Clock input. In burst mode, after the initial word is output, subsequent
CLK
active edges of CLK increment the internal address counter. Should be at (Common)
or V while in asynchronous mode.
V
IL
IH
Address Valid input.
Indicates to device that the valid address is present on the address inputs.
AVD#
F-RST#
Hardware reset input.
Hardware write protect input.
F-WP#
F-ACC
At V , disables program and erase functions in the four outermost sectors.
(Flash)
IL
Should be at V for all other conditions.
IH
Accelerated input.
At V , accelerates programming; automatically places device in unlock
HH
bypass mode. At V , disables all program and erase functions. Should be
IL
at V for all other conditions.
IH
R-CE#
Chip-enable input for pSRAM
Chip-enable input for Code Flash.
Chip-enable input for Data Flash 1.
Chip-enable input for Data Flash 2.
Control Register Enable.
F1-CE#
F2-CE#
F2-CE#
R-MRS#
Asynchronous relative to
CLK for Burst Mode.
(pSRAM – RAM Type 4 only)
F-V
Flash 1.8 Volt-only single power supply.
pSRAM Power Supply.
CC
R-V
CC
R-UB#
R-LB#
Upper Byte Control.
(pSRAM)
Lower Byte Control .
Table 3.2 identifies the ORNAND input and output connections provided on the device.
Table 3.2 ORNAND Flash Input/Output Descriptions
Symbol
Description
N-PRE
N-ALE
N-CLE
N-CE#
N-WP#
ORNAND Power-On Read Enable. Tie to V on customer board if not used.
SS
ORNAND Address Latch Enable
ORNAND Command Latch Enable
ORNAND Chip-enable
ORNAND Write-protect
N-WE#
ORNAND Write-enable
N-RE#
ORNAND Read-enable
N-RY/BY#
N-I/O0-N-I/O15
ORNAND Ready-Busy—this is shared with NOR RDY
ORNAND I/O signals (I/O0-I/O7 for x8 bus width)
ORNAND Power supply
N-V
CC
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
5
P r e l i m i n a r y
4 MCP Block Diagram
A0-A22
A23
A0-A22
A23
RDY
RDY
DQ0-DQ15
DQ0-DQ15
WS256N
Flash
Memory
CLK
CLK
AVD#
CE#
OE#
RESET#
ACC
AVD#
F1-CE#
OE#
F-RST#
F-ACC
F1-WP#
F-WE#
VSS
VSS
WP#
WE#
VCC
F-VCC
VCCQ
F-VCCQ
A0-A22
WAIT#
DQ0-DQ15
CLK
128Mb
Memory
AVD#
CE#
OE#
R-CE#
R-LB#
R-UB#
LB#
UB#
WE#
MRS#
R-MRS#
VSS
VCC
R-VCC
VCCQ
R-VCCQ
A0-A22
A23
RDY
DQ0-DQ15
CLK
AVD#
CE#
OE#
RESET#
ACC
WP#
WE#
WS256N
Flash
Memory
F2-CE#
FD-WP#
VSS
VCC
VCCQ
A0-A22
A23
RDY
DQ0-DQ15
CLK
AVD#
CE#
OE#
RESET#
ACC
WP#
WE#
WS256N
Flash
Memory
F3-CE#
VSS
VCC
VCCQ
Notes:
1. MRS is only present in RAM Type 4.
2. CE#f1, CE#f2, and CE#f3 are the chip enable pins for the first, second and third Flash devices, respectively.
Figure 4.1 MCP Block Diagram 1
6
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
P r e l i m i n a r y
x16 MS01GP-based MCP
A0-A22
A23
A0-A22
A23
RDY
DQ0-DQ15
DQ0-DQ15
RDY
CLK
AVD#
WS256N
Flash
Memory
CLK
AVD#
CE#
OE#
RESET#
ACC
F-CE#
OE#
F-RST#
F-ACC
VSS
VSS
F1-WP#
WE#
WP#
WE#
VCC
VCCQ
F-VCC
A0-A22
WAIT#
DQ0-DQ15
CLK
128 Mb
RAM
AVD#
CE#
OE#
R1-CE#
Memory
R-LB#
R-UB#
LB#
UB#
WE#
MRS#
R-MRS#
VSS
VCC
VCCQ
R-VCC
A0-A22
WAIT#
DQ0-DQ15
CLK
128 Mb
RAM
AVD#
CE#
OE#
R2-CE#
Memory
LB#
UB#
WE#
MRS#
VSS
VCC
VCCQ
I/O0-I/O15
RB#
I/O0-I/O15
N-RY/BY#
N-CLE
MS01GP
x16 ORNAND
Memory
CLE
CE#
ALE
N-CE#
N-ALE
VSS
PRE
N-VSS
N-PRE
RE#
WP#
WE#
N-RE#
N-WP#
N-WE#
VCC
N-VCC
Figure 4.2 ORNAND Block Diagram
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
7
P r e l i m i n a r y
5 Connection Diagrams/Physical Dimensions
This section contains the I/O designations and package specifications for the S75WS.
5.1
Special Handling Instructions for FBGA Package
Special handling is required for Flash Memory products in FBGA packages.
Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning meth-
ods. The package and/or data integrity may be compromised if the package body is exposed to
temperatures above 150°C for prolonged periods of time.
5.2 Connection Diagram – NOR Flash & 1.8 V RAM Type 4 Based Pinout, 9 x 12 mm
Legend:
A1
A10
DNU
DNU
X
RFU
(Reserved for
Future Use)
B2
B4
B3
B5
B6
B7
B8
B9
ADV#
VSS
CLK
RFU
F-VCC
RFU
RFU
RFU
X
C3
A7
C2
C4
C5
C6
C7
C8
C9
Data Flash
Shared Only
F1-WP#
R-LB#
F-ACC
WE#
A8
A11
F2-CE#
D2
D3
D5
D7
D8
D9
D4
D6
X
Flash 2
Data Only
A3
A6
R-UB# F-RST#
RFU
A19
A12
A15
E2
E3
E4
E5
E6
E7
E8
E9
X
A2
A5
A18
RDY
A20
A9
A13
A21
Flash 3
Data Only
F2
F3
F4
F7
F8
F9
F5
F6
X
A1
A4
A17
RFU
A23
A10
A14
A22
Flash 1
Code Only
G2
G3
G4
G7
G9
G5
G6
G8
A0
VSS
DQ1
RFU
RFU
DQ6
RFU
A16
X
RAM Only
H3
H4
H5
H6
H7
H8
H2
H9
F1-CE#
OE#
DQ9
DQ3
DQ4
DQ13
R-MRS#
DQ15
X
All Shared
J3
J4
J7
J8
J9
J2
J5
J6
R-CE1#
DQ0
DQ10
F-VCC
R-VCC
DQ12
DQ7
VSS
X
All Flash
Shared Only
K3
K4
K5
K7
K8
K2
K6
K9
RFU
DQ8
DQ2
DQ11
RFU
DQ5
DQ14
FD-WP#
X
L2
L3
L4
L5
L6
L7
L8
L9
Do Not Use
RFU
RFU
VSS
F-VCC
F3-CE#
RFU
F-VCCQ
DNU
M1
M10
DNU
DNU
8
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
P r e l i m i n a r y
5.3
Connection Diagram – ORNAND-Based Pinout, 11 x 13 mm
Legend
A9
A10
A1
A2
DNU
DNU
DNU
DNU
Reserved for
Future Use
B9
B10
B1
B2
DNU
DNU
DNU
DNU
Do Not Use
C5
C7
C8
C3
C4
C6
C9
C2
C10
VSS
AVD#
CLK
RFU
IO15
IO14
IO13
IO12
DNU
NOR Flash Only
D5
D7
A8
D8
D1
D3
A7
D4
D6
D9
D10
D2
N-RY/BY# F-WP#
R-LB#
F-ACC
WE#
A11
IO11
IO10
NAND Flash Only
E5
E7
E8
E1
E2
E3
A6
E4
E6
E9
E10
IO9
N-RE#
A3
R-UB#
F-RST# R2-CE#
A19
A12
A15
PSRAM 1 Only
PSRAM 2 Only
F5
F6
F7
A9
F8
F1
F3
A5
F4
F9
F10
IO8
F2
A2
N-CE#
A18
RDY
A20
A13
A21
G5
G7
G8
G1
G3
A4
G4
G6
G9
G10
G2
A1
N-VCC
A17
RFU
A23
A10
A14
A22
N-VCC
H5
H7
H8
H1
H3
H4
H6
H9
H10
H2
A0
PSRAM Shared Only
N-VSS
VSS
DQ1
RFU
RFU
DQ6
RFU
A16
N-VSS
J5
J7
J8
J1
J3
J4
J6
J9
J10
IO7
J2
NOR Flash &
PSRAM Shared
N-CLE# F1-CE#
OE#
DQ9
DQ3
DQ4
DQ13
DQ15
R-MRS
K5
K7
K8
K1
K2
K3
K4
K6
K9
K10
IO6
N-ALE# R1-CE#
DQ0
DQ10
F-VCC
R-VCC
DQ12
DQ7
VSS
L5
L7
L8
L1
L2
L3
L4
L6
L9
L10
IO5
N-WE# N-WP#
DQ8
DQ2
DQ11
RFU
DQ5
DQ14
IO4
M5
M7
M8
M1
M2
M3
M4
M6
M9
M10
PRE
DNU
RFU
RFU
VSS
F-VCC
IO0
IO1
IO2
IO3
N1
N9
N10
N2
DNU
DNU
DNU
DNU
P1
P9
P10
P2
DNU
DNU
DNU
DNU
Note: Bus 1: NOR Flash + pSRAM, Bus 2: ORNAND Flash
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
9
P r e l i m i n a r y
5.4 Physical Dimensions – FEA084 – Fine Pitch Ball Grid Array 9 x 12 mm
A
D1
D
eD
0.15
(2X)
C
10
9
8
SE
7
7
6
E
B
E1
5
4
3
2
1
eE
J
H
G
F
E
D
C
B
A
M
L K
INDEX MARK
10
PIN A1
CORNER
PIN A1
CORNER
7
SD
0.15
(2X)
C
TOP VIEW
BOTTOM VIEW
0.20
C
C
A2
A
0.08
C
A1
SIDE VIEW
6
84X
0.15
b
M
C
C
A B
0.08
M
NOTES:
PACKAGE
JEDEC
FEA 084
N/A
1. DIMENSIONING AND TOLERANCING METHODS PER
ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS.
D x E
12.00 mm x 9.00 mm
PACKAGE
NOTE
3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010.
SYMBOL
MIN
---
NOM
---
MAX
4.
e REPRESENTS THE SOLDER BALL GRID PITCH.
A
A1
1.40
---
PROFILE
5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D"
DIRECTION.
0.10
1.11
---
BALL HEIGHT
SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE
"E" DIRECTION.
A2
---
1.26
BODY THICKNESS
BODY SIZE
D
12.00 BSC.
9.00 BSC.
8.80 BSC.
7.20 BSC.
12
n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS
FOR MATRIX SIZE MD X ME.
E
BODY SIZE
D1
MATRIX FOOTPRINT
MATRIX FOOTPRINT
6
7
DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL
DIAMETER IN A PLANE PARALLEL TO DATUM C.
E1
SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A
AND B AND DEFINE THE POSITION OF THE CENTER SOLDER
BALL IN THE OUTER ROW.
MD
ME
n
MATRIX SIZE D DIRECTION
MATRIX SIZE E DIRECTION
BALL COUNT
10
84
WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE
OUTER ROW SD OR SE = 0.000.
Ø b
eE
0.35
0.40
0.45
BALL DIAMETER
WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE
OUTER ROW, SD OR SE = e/2
0.80 BSC.
0.80 BSC
0.40 BSC.
BALL PITCH
eD
BALL PITCH
8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED
BALLS.
SD / SE
SOLDER BALL PLACEMENT
A2,A3,A4,A5,A6,A7,A8,A9
B1,B10,C1,C10,D1,D10
E1,E10,F1,F10,G1,G10
H1,H10,J1,J10,K1,K10,L1,L10
M2,M3,M4,M5,M6,M7,M8,M9
DEPOPULATED SOLDER BALLS
9. N/A
10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK
MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
3423 \ 16-038.21a
10
S75WS-N Based MCPs
S75WS-N_02_A2 October 6, 2005
P r e l i m i n a r y
5.5 Physical Dimensions – FND115 – Fine Pitch Ball Grid Array 11 x 13 mm
D1
A
D
eD
0.15
(2X)
C
10
9
8
SE
7
7
6
E
E1
5
4
3
2
eE
1
N
L
J
H
G
F
E
D
C
B
A
P
M
K
PIN A1
9
PIN A1
CORNER
B
CORNER
7
INDEX MARK
0.15
(2X)
C
SD
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.20
C
C
A2
A
A1
0.08
C
6
115X
b
0.15
0.08
M
C
C
A B
M
NOTES:
PACKAGE
JEDEC
FND 115
N/A
1. DIMENSIONING AND TOLERANCING METHODS PER
ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS.
D x E
13.00 mm x 11.00 mm
PACKAGE
3. BALL POSITION DESIGNATION PER JEP95, SECTION
4.3, SPP-010.
SYMBOL
MIN
NOM
---
MAX
NOTE
4.
e REPRESENTS THE SOLDER BALL GRID PITCH.
A
A1
A2
D
---
1.40
---
PROFILE
5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D"
DIRECTION.
0.17
0.98
---
BALL HEIGHT
---
1.15
BODY THICKNESS
BODY SIZE
SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E"
DIRECTION.
13.00 BSC.
11.00 BSC.
10.40 BSC.
7.20 BSC.
14
E
BODY SIZE
n IS THE NUMBER OF POPULTED SOLDER BALL
POSITIONS FOR MATRIX SIZE MD X ME.
D1
E1
MD
ME
n
MATRIX FOOTPRINT
MATRIX FOOTPRINT
6
7
DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL
DIAMETER IN A PLANE PARALLEL TO DATUM C.
MATRIX SIZE D DIRECTION
MATRIX SIZE E DIRECTION
BALL COUNT
SD AND SE ARE MEASURED WITH RESPECT TO
DATUMS A AND B AND DEFINE THE POSITION OF THE
CENTER SOLDER BALL IN THE OUTER ROW.
10
115
WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS
IN THE OUTER ROW SD OR SE = 0.000.
b
0.35
0.40
0.45
BALL DIAMETER
Ø
eE
eD
0.80 BSC.
0.80 BSC
0.40 BSC.
BALL PITCH
WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS
IN THE OUTER ROW, SD OR SE = e/2
BALL PITCH
SD SE
SOLDER BALL PLACEMENT
8. "+" INDICATES THE THEORETICAL CENTER OF
DEPOPULATED BALLS.
A3-A8,B3-B8,C1,N3-N8,P3-P8 DEPOPULATED SOLDER BALLS
9. A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER
OR INK MARK, METALLIZED MARK INDENTATION OR
OTHER MEANS.
3524 \ 16-038.19 \ 10.5.05
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
11
A d v a n c e I n f o r m a t i o n
6 MCP Revisions
Revision A0 (February 17, 2005)
Initial Release
Revision A1 (September 8, 2005)
Global
Removed references to the S29RS-N data sheet
Product Selector Guide
Updated table and added 80 MHz options
Ordering Information
Updated table with new options
MCP Configurations and Valid Combinations
Updated table to reflect new options
Input/Output Descriptions
Updated table and changed some pin names
MCP Block Diagram
Updated the illustration
Connection Diagram
Updated the pinout diagram
Physical Dimensions
Added the FEA084 package diagram
Look-Ahead Connection Diagram
Removed from data sheet
S29WS-N Flash Module
Updated to the latest revision
Revision A2 (October 6, 2005)
Global
Added ORNAND Flash information
Product Selector Guide
Added ORNAND options
Ordering Information
Updated table with new options
MCP Block Diagram
Added the ORNAND illustration
Connection Diagram
Added the pinout diagram for the ORNAND device
Physical Dimensions
Added the FND115 package diagram
12
S75WS-N Based MCPs
S75WS_02_A2 October 6, 2005
A d v a n c e I n f o r m a t i o n
S29WS-N Flash Module
Removed from MCP. Available as a standalone document.
1.8 V Type 4 pSRAM Module
Removed from MCP. Available as a standalone document.
Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary
industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that
includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal
injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control,
medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and
artificial satellite). Please note that Spansion LLC will not be liable to you and/or any third party for any claims or damages arising in connection with above-
mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such
failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels
and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on ex-
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prior authorization by the respective government entity will be required for export of those products.
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The contents of this document are subject to change without notice. This document may contain information on a Spansion LLC product under development
by Spansion LLC. Spansion LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided
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Copyright ©2005 Spansion LLC. All rights reserved. Spansion, the Spansion logo, and MirrorBit are trademarks of Spansion LLC. Other company and product
names used in this publication are for identification purposes only and may be trademarks of their respective companies.
October 6, 2005 S75WS_02_A2
S75WS-N Based MCPs
13
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