SSM2314GN [SSC]

N-channel Enhancement-mode Power MOSFET; N沟道增强模式功率MOSFET
SSM2314GN
型号: SSM2314GN
厂家: SILICON STANDARD CORP.    SILICON STANDARD CORP.
描述:

N-channel Enhancement-mode Power MOSFET
N沟道增强模式功率MOSFET

文件: 总5页 (文件大小:292K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SSM2314GN  
N-channel Enhancement-mode Power MOSFET  
Low gate-charge  
BVDSS  
R DS(ON)  
ID  
20V  
D
S
Simple drive requirement  
Fast switching  
75mW  
3.5A  
G
Pb-free; RoHS compliant.  
DESCRIPTION  
D
The SSM2314GN is in a SOT-23-3 package, which is widely used for lower  
power commercial and industrial surface mount applications. This device is  
suitable for low-voltage applications such as DC/DC converters and and  
general switching applications.  
S
SOT-23-3  
G
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Drain-Source Voltage  
Rating  
20  
Units  
V
VDS  
VGS  
Gate-Source Voltage  
V
± 12  
ID @ TA=25°C  
ID @ TA=70°C  
IDM  
Continuous Drain Current3  
Continuous Drain Current3  
Pulsed Drain Current1,2  
3.5  
A
2.8  
A
10  
A
PD @ TA=25°C  
Total Power Dissipation  
1.38  
W
Linear Derating Factor  
0.01  
W/°C  
°C  
°C  
TSTG  
TJ  
Storage Temperature Range  
Operating Junction Temperature Range  
-55 to 150  
-55 to 150  
THERMAL DATA  
Symbol  
Parameter  
Value  
Unit  
R
ΘJA  
Maximum Thermal Resistance, Junction-ambient3  
90  
°C/W  
4/16/2005 Rev.2.1  
www.SiliconStandard.com  
1 of 5  
SSM2314GN  
ELECTRICAL CHARACTERISTICS (at Tj = 2C unless otherwise specified)  
Symbol  
BVDSS  
Parameter  
Test Conditions  
VGS=0V, ID=250uA  
Min. Typ. Max. Units  
Drain-Source Breakdown Voltage  
20  
-
-
0.02  
-
-
-
V
BVDSS/Tj  
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA  
V/°C  
m  
RDS(ON)  
Static Drain-Source On-Resistance  
VGS=4.5V, ID=3.5A  
-
75  
VGS=2.5V, ID=1.2A  
VDS=VGS, ID=250uA  
VDS=5V, ID=3A  
VDS=20V, VGS=0V  
VDS=16V ,VGS=0V  
VGS=±12V  
-
0.5  
-
-
-
125 mΩ  
VGS(th)  
gfs  
Gate Threshold Voltage  
1.2  
V
Forward Transconductance  
Drain-Source Leakage Current (T=25oC)  
7
-
S
IDSS  
uA  
uA  
nA  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
pF  
pF  
pF  
j
-
-
1
Drain-Source Leakage Current (T=70oC)  
-
-
10  
j
IGSS  
Qg  
Gate-Source Leakage  
Total Gate Charge2  
Gate-Source Charge  
Gate-Drain ("Miller") Charge  
Turn-on Delay Time2  
Rise Time  
-
-
±100  
ID=3A  
-
4
7
Qgs  
Qgd  
td(on)  
tr  
VDS=16V  
-
0.7  
2
-
VGS=4.5V  
-
-
VDS=15V  
-
6
-
ID=1A  
-
8
-
td(off)  
Turn-off Delay Time  
Fall Time  
RG=3.3, VGS=5V  
RD=15Ω  
-
10  
3
-
-
tf  
-
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
VGS=0V  
-
230  
55  
40  
1.1  
370  
-
VDS=20V  
-
f=1.0MHz  
-
-
f=1.0MHz  
-
1.7  
Source-Drain Diode  
Symbol  
Parameter  
Forward On Voltage2  
Reverse Recovery Time  
Reverse Recovery Charge  
Test Conditions  
Min. Typ. Max. Units  
VSD  
trr  
IS=1.2A, VGS=0V  
IS=3A, VGS=0V,  
dI/dt=100A/µs  
-
-
-
-
1.2  
V
ns  
nC  
16  
8
-
-
Qrr  
Notes:  
1.Pulse width limited by maximum junction temperature.  
2.Pulse width <300us, duty cycle <2%.  
3.Surface-mounted on 1 in2 copper pad on FR4 board , t <10sec ; 270°C/W when mounted on minimum copper pad.  
4/16/2005 Rev.2.1  
www.SiliconStandard.com  
2 of 5  
SSM2314GN  
15  
10  
5
15  
10  
5
5.0V  
4.5V  
3.0V  
5.0V  
4.5V  
T A =25 o C  
T A = 150 o C  
3.0 V  
2.5V  
2.5V  
V G = 1. 5V  
V G = 1 .5V  
0
0
0
1
2
3
0
1
2
3
V DS , Drain-to-Source Voltage (V)  
V DS , Drain-to-Source Voltage (V)  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
100  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I D = 3.5 A  
V G =4.5V  
I D =1.2A  
T A =25 o C  
80  
60  
40  
-50  
0
50  
100  
150  
2
4
6
8
10  
T j , Junction Temperature ( o C)  
V GS , Gate-to-Source Voltage (V)  
Fig 3. On-Resistance vs. Gate Voltage  
Fig 4. Normalized On-Resistance  
vs. Junction Temperature  
3
0.8  
2
1
0
0.7  
0.6  
0.5  
T j =150 o C  
T j =25 o C  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
-50  
0
50  
100  
150  
T j , Junction Temperature ( o C)  
V SD , Source-to-Drain Voltage (V)  
Fig 5. Forward Characteristic of  
Reverse Diode  
Fig 6. Gate Threshold Voltage vs.  
Junction Temperature  
4/16/2005 Rev.2.1  
www.SiliconStandard.com  
3 of 5  
SSM2314GN  
f=1.0MHz  
12  
10  
8
1000  
100  
10  
I D =3A  
C iss  
V DS =10V  
V
V
DS =12V  
DS =16V  
6
C oss  
C rss  
4
2
0
0
2
4
6
8
1
5
9
13  
17  
21  
25  
V DS , Drain-to-Source Voltage (V)  
Q G , Total Gate Charge (nC)  
Fig 7. Gate Charge Characteristics  
Fig 8. Typical Capacitance Characteristics  
100  
1
Duty factor=0.5  
0.2  
10  
0.1  
0.1  
1ms  
0.05  
1
PDM  
0.01  
10ms  
t
T
0.01  
Single Pulse  
Duty factor = t/T  
100ms  
1s  
Peak Tj = PDM x Rthja + Ta  
0.1  
Rthja = 270°C/W  
T
A =25 o C  
Single Pulse  
DC  
0.01  
0.001  
0.0001  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
1000  
V DS , Drain-to-Source Voltage (V)  
t , Pulse Width (s)  
Fig 9. Maximum Safe Operating Area  
Fig 10. Effective Transient Thermal Impedance  
15  
VG  
V
DS =5V  
T j =25 o C  
T j =150 o  
C
QG  
10  
4.5V  
QGS  
QGD  
5
Charge  
Q
0
0
2
4
6
V GS , Gate-to-Source Voltage (V)  
Fig 11. Transfer Characteristics  
Fig 12. Gate Charge Circuit  
4/16/2005 Rev.2.1  
www.SiliconStandard.com  
4 of 5  
SSM2314GN  
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no  
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no  
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its  
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including  
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to  
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of  
Silicon Standard Corporation or any third parties.  
4/16/2005 Rev.2.1  
www.SiliconStandard.com  
5 of 5  

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