SSM2602GY [SSC]
N-CHANNEL ENHANCEMENT MODE POWER MOSFET; N沟道增强型功率MOSFET
| 型号： | SSM2602GY |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | N-CHANNEL ENHANCEMENT MODE POWER MOSFET |
| 文件： | 总5页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SSM2602GY
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
PRODUCT SUMMARY
Capable of 2.5V gate drive
Lower on-resistance
Surface mount package
RoHS Compliant
BVDSS
RDS(ON)
ID
20V
34mΩ
6.3A
S
D
D
G
D
SOT-26
D
DESCRIPTION
Advanced Power MOSFETs utilized advanced processing techniques
to achieve the lowest possible on-resistance, extremely efficient and
cost-effectiveness device.
D
S
G
The SOT-26 package is universally used for all commercial–industrial
applications.
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Drain-Source Voltage
Rating
Units
V
VDS
VGS
20
Gate-Source Voltage
±12
V
Continuous Drain Current3, VGS @ 4.5V
Continuous Drain Current3, VGS @ 4.5V
Pulsed Drain Current1,2
ID@TA=25℃
ID@TA=70℃
IDM
6.3
A
5
30
A
A
PD@TA=25℃
Total Power Dissipation
2
W
Linear Derating Factor
0.016
-55 to 150
-55 to 150
W/℃
℃
℃
TSTG
TJ
Storage Temperature Range
Operating Junction Temperature Range
THERMAL DATA
Symbol
Parameter
Thermal Resistance Junction-ambient3
Value
62.5
Unit
Rthj-a
Max.
℃/W
11/16/2007 Rev.1.00
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1
SSM2602GY
ELECTRICAL CHARACTERISTICS
(TJ=25oC unless otherwise specified)
Symbol
BVDSS
Parameter
Test Conditions
VGS=0V, ID=250uA
Min. Typ. Max. Units
Drain-Source Breakdown Voltage
20
-
-
0.1
-
-
-
V
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
V/℃
mΩ
RDS(ON)
Static Drain-Source On-Resistance2 VGS=10V, ID=5.5A
-
30
VGS=4.5V, ID=5.3A
VGS=2.5V, ID=2.6A
-
-
-
-
34
mΩ
mΩ
V
50
VGS(th)
gfs
Gate Threshold Voltage
VDS=VGS, ID=250uA
VDS=5V, ID=5.3A
VDS=20V, VGS=0V
VDS=16V ,VGS=0V
0.5
-
-
-
Forward Transconductance
13
-
-
S
Drain-Source Leakage Current (T=25oC)
IDSS
uA
uA
nA
nC
nC
nC
ns
-
1
j
Drain-Source Leakage Current (T=55oC)
-
-
10
j
IGSS
Qg
Gate-Source Leakage
Total Gate Charge2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time2
Rise Time
VGS
=
-
-
± 12V
±100
ID=5.3A
-
8.7
1.5
3.6
6
16
-
Qgs
Qgd
td(on)
tr
VDS=10V
VGS=4.5V
VDS=15V
ID=1A
-
-
-
-
-
ns
-
14
18.4
2.8
-
ns
td(off)
tf
Turn-off Delay Time
Fall Time
RG=2Ω,VGS=10V
RD=15Ω
VGS=0V
-
-
ns
-
-
pF
pF
pF
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
-
603 1085
VDS=15V
f=1.0MHz
-
144
111
-
-
-
SOURCE-DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
VSD
trr
Forward On Voltage2
Reverse Recovery Time2
IS=1.2A, VGS=0V
IS=5A, VGS=0V,
dI/dt=100A/µs
-
-
-
-
1.2
V
ns
nC
16.8
11
-
-
Qrr
Reverse Recovery Charge
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 156℃/W when mounted on min. copper pad.
11/16/2007 Rev.1.00
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2
SSM2602GY
50
40
30
20
10
0
80
60
40
20
0
5.0V
T A =25 o C
T A =150 o C
4.5V
4.0V
5.0V
4.5V
4.0V
V G =2.5V
V G =2.5V
0
1
2
3
4
5
6
7
8
150
150
0
1
2
3
4
5
6
7
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
80
60
40
20
1.8
1.4
1.0
0.6
I D = 1.0 A
T A =25 o C
I D =5.3A
V
G =4.5V
Ω
1
4
7
10
-50
0
50
100
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
10
1.4
1
1
T j =150 o C
T j =25 o C
0.6
0.1
0.2
0.01
-50
0
50
100
0
0.4
0.8
1.2
1.6
T j , Junction Temperature ( o C )
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
11/16/2007 Rev.1.00
www.SiliconStandard.com
3
SSM2602GY
f=1.0MHz
C iss
14
12
10
8
1000
100
10
I D =5.3A
V
DS =16V
C oss
C rss
6
4
2
0
1
5
9
13
17
21
25
29
0
5
10
15
20
25
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
0.2
10
0.1
0.1
1ms
0.05
1
PDM
0.01
10ms
t
T
Single Pulse
0.01
100ms
1s
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
0.1
Rthja = 156℃/W
T
A =25 o C
Single Pulse
DC
0.01
0.001
0.0001
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
tr
t
td(on)
d(off) tf
Q
Charge
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
11/16/2007 Rev.1.00
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4
SSM2602GY
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
11/16/2007 Rev.1.00
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