74ACT174TTR [STMICROELECTRONICS]
HEX D-TYPE FLIP FLOP WITH CLEAR; HEX D型触发器与Clear FLOP
| 型号： | 74ACT174TTR |
| 厂家： | 
ST |
| 描述： | HEX D-TYPE FLIP FLOP WITH CLEAR |
| 文件： | 总11页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ACT174
HEX D-TYPE FLIP FLOP WITH CLEAR
■
■
■
■
■
■
■
■
■
HIGH SPEED:
= 200MHz (TYP.) at V = 5V
f
MAX
CC
LOW POWER DISSIPATION:
= 4µA(MAX.) at T =25°C
I
CC
A
COMPATIBLE WITH TTL OUTPUTS
= 2V (MIN.), V = 0.8V (MAX.)
V
IH
IL
DIP
SOP
TSSOP
T & R
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 24mA (MIN)
ORDER CODES
PACKAGE
OH
OL
BALANCED PROPAGATION DELAYS:
TUBE
t
t
PLH
PHL
DIP
SOP
74ACT174B
74ACT174M
OPERATING VOLTAGE RANGE:
(OPR) = 4.5V to 5.5V
74ACT174MTR
74ACT174TTR
V
CC
TSSOP
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 174
IMPROVED LATCH-UP IMMUNITY
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74ACT174 is an advanced high-speed CMOS
HEX D-TYPE FLIP FLOP WITH CLEAR
fabricated with sub-micron silicon gate and
2
double-layer metal wiring C MOS tecnology.
Information signals applied to D inputs are
transferred to the Q output on the positive going
edge of the clock pulse.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/11
74ACT174
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
CLEAR
NAME AND FUNCTION
1
Asynchronous Master
Reset (Active LOW)
2, 5, 7, 10,
12, 15
Q0 to Q5 Flip-Flop Outputs
D0 to D5 Data Inputs
3, 4, 6, 11,
13, 14
9
CLOCK
GND
Clock Input (LOW-to-HIGH,
Edge Trigger)
8
Ground (0V)
16
V
Positive Supply Voltage
CC
TRUTH TABLE
INPUTS
OUTPUT
FUNCTION
CLEAR
D
X
L
CLOCK
Q
L
L
X
CLEAR
H
L
H
H
H
X
H
Q
NO CHANGE
n
X : Don’t Care
LOGIC DIAGRAM
This logic diagram has not to be used to estimate propagation delays
2/11
74ACT174
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V + 0.5
I
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
± 20
± 20
mA
mA
mA
mA
°C
°C
IK
I
OK
I
± 50
O
I
or I
T
DC V
or Ground Current
CC
± 300
CC
GND
Storage Temperature
-65 to +150
300
stg
T
Lead Temperature (10 sec)
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
4.5 to 5.5
V
V
CC
V
Input Voltage
0 to V
I
CC
V
Output Voltage
0 to V
V
O
CC
T
Operating Temperature
-55 to 125
8
°C
ns/V
op
Input Rise and Fall Time V = 4.5 to 5.5V (note 1)
dt/dv
CC
1) V from 0.8V to 2.0V
IN
3/11
74ACT174
DC SPECIFICATIONS
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
4.5
5.5
4.5
5.5
4.5
V
= 0.1 V or
O
2.0
2.0
1.5
1.5
2.0
2.0
2.0
2.0
IH
V
-0.1V
V
V
CC
V
Low Level Input
Voltage
V = 0.1 V or
O
1.5
0.8
0.8
0.8
0.8
0.8
0.8
IL
V
-0.1V
1.5
CC
V
High Level Output
Voltage
I =-50 µA
4.4
5.4
4.49
4.4
5.4
4.4
5.4
3.7
4.7
OH
O
I =-50 µA
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.49
O
I =-24 mA
3.86
4.86
3.76
4.76
O
I =-24 mA
O
V
Low Level Output
Voltage
I =50 µA
0.001 0.1
0.001 0.1
0.36
0.1
0.1
0.1
0.1
0.5
0.5
OL
O
V
I =50 µA
O
I =24 mA
0.44
0.44
O
I =24 mA
0.36
O
I
Input Leakage Cur-
rent
I
V = V
or GND
CC
5.5
5.5
5.5
± 0.1
± 1
1.5
40
± 1
1.6
80
µA
mA
µA
I
I
Max I /Input
V = V - 2.1V
0.6
CCT
CC
I
CC
I
Quiescent Supply
Current
CC
V = V
or GND
CC
4
I
I
V
= 1.65 V max
= 3.85 V min
75
50
mA
mA
OLD
OLD
Dynamic Output
Current (note 1, 2)
5.5
I
V
OHD
-75
-50
OHD
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, R = 500 Ω, Input t = t = 3ns)
L
L
r
f
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
t
t
t
Propagation Delay
Time CLOCK to Y
PLH PHL
(*)
1.5
1.5
6.0
7.0
3.0
3.0
10.5
9.5
4.5
4.5
11.5
11.0
5.0
11.5
11.0
5.0
ns
ns
ns
ns
5.0
5.0
5.0
5.0
t
Propagation Delay
Time CLEAR to Y
PLH PHL
(*)
(*)
(*)
t
CLEAR Pulse
Width, LOW
WL
t
CLOCK Pulse
Width
W
5.0
5.0
t
Setup Time D to
CLOCK, HIGH or
LOW
s
(*)
(*)
0.5
1.0
1.5
1.5
1.5
ns
ns
5.0
5.0
t
Hold Time D to
CLOCK, HIGH or
LOW
h
2.0
0.5
2.0
0.5
2.0
0.5
t
Recovery Time
CLEAR to CLOCK
REM
(*)
(*)
0.0
ns
5.0
5.0
f
Maximum CLOCK
Frequency
MAX
165
200
140
140
MHz
(*) Voltage range is 5.0V ± 0.5V
4/11
74ACT174
CAPACITIVE CHARACTERISTICS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5.0
4
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
f
= 10MHz
5.0
35
IN
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I /n (per circuit)
PD CC IN CC
CC(opr)
TEST CIRCUIT
C
R
R
= 50pF or equivalent (includes jig and probe capacitance)
L
L
T
= R = 500Ω or equivalent
1
= Z
of pulse generator (typically 50Ω)
OUT
5/11
74ACT174
WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
6/11
74ACT174
WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle)
7/11
74ACT174
Plastic DIP-16 (0.25) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
0.51
0.77
TYP.
MAX.
MIN.
0.020
0.030
MAX.
a1
B
b
1.65
0.065
0.5
0.020
0.010
b1
D
E
e
0.25
20
0.787
8.5
2.54
0.335
0.100
0.700
e3
F
17.78
7.1
5.1
0.280
0.201
I
L
3.3
0.130
Z
1.27
0.050
P001C
8/11
74ACT174
SO-16 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.75
0.2
MIN.
MAX.
0.068
0.007
0.064
0.018
0.010
A
a1
a2
b
0.1
0.004
1.65
0.46
0.25
0.35
0.19
0.013
0.007
b1
C
0.5
0.019
c1
D
45 (typ.)
9.8
5.8
10
0.385
0.228
0.393
0.244
E
6.2
e
1.27
8.89
0.050
0.350
e3
F
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.024
G
L
1.27
0.62
M
S
8 (max.)
P013H
9/11
74ACT174
TSSOP16 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.1
MIN.
MAX.
0.433
0.006
0.374
0.0118
0.0079
0.201
0.256
0.176
A
A1
A2
b
0.05
0.85
0.19
0.09
4.9
0.10
0.9
0.15
0.95
0.30
0.20
5.1
0.002
0.335
0.0075
0.0035
0.193
0.246
0.169
0.004
0.354
c
D
5
6.4
0.197
0.252
E
6.25
4.3
6.5
E1
e
4.4
4.48
0.173
0.65 BSC
4o
0.0256 BSC
4o
K
0o
8o
0o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A2
A
K
L
b
e
A1
c
E
D
E1
PIN 1 IDENTIFICATION
1
10/11
74ACT174
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2001 STMicroelectronics - Printed in Italy - All Rights Reserved
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11/11
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