74LVQ244 [STMICROELECTRONICS]
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON-INVERTED; 低电压八路总线缓冲器，具有3态输出非反转
| 型号： | 74LVQ244 |
| 厂家： | 
ST |
| 描述： | LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON-INVERTED |
| 文件： | 总8页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVQ244
LOW VOLTAGE OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON-INVERTED)
■
HIGH SPEED:
PD = 6 ns (TYP.)at VCC = 3.3V
t
■
■
COMPATIBLEWITH TTL OUTPUT
LOW POWER DISSIPATION:
ICC =4 µA (MAX.) at TA = 25 oC
LOW NOISE:
M
T
■
■
■
(Micro Package)
(TSSOP Package)
VOLP = 0.4V (TYP.) at VCC = 3.3V
75Ω TRANSMISSIONLINE OUTPUT DRIVE
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 12 mA (MIN)
ORDER CODES :
74LVQ244M
74LVQ244T
■
■
PCI BUS LEVELSGUARANTEED AT 24mA
BALANCED PROPAGATION DELAYS:
tPLH tPHL
technology.It is ideal for low power and low noise
3.3V applications.
It has better speed performance at 3.3V than 5V
LSTTL family combined with the true CMOS low
power consumption.
G output control governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
■
■
■
OPERATING VOLTAGERANGE:
VCC (OPR)= 2V to 3.6V (1.2VData Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES244
IMPROVED LATCH-UP IMMUNITY
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The LVQ244 is a low voltage CMOS OCTAL BUS
BUFFER fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C2MOS
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8
February 1999
74LVQ244
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
SYMBOL NAME AND FUNCTION
1G Output Enable Input
2,4,6,8
9,7,5,3
1A1 to1A4 Data Inputs
2Y1 to2Y4 Data Outputs
11, 13, 15, 17 2A1 to2A4 Data Inputs
18, 16, 14, 12 1Y1 to1Y4 Data Outputs
19
10
20
2G
GND
VCC
Output Enable Input
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUT
OUTPUT
G
L
An
L
Yn
L
L
H
H
H
X:”H” or”L”
X
Z
Z:Highimpedance
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
-0.5to+7
Unit
VCC
VI
Supply Voltage
V
V
DC Input Voltage
DC Output Voltage
DC Input Diode Current
-0.5toVCC +0.5
-0.5toVCC +0.5
VO
IIK
V
20
mA
mA
mA
mA
oC
oC
±
IOK
IO
DC Output Diode Current
DC Output Current
± 20
± 50
ICC orIGND DC VCC or Ground Current
± 400
Tstg
Storage Temperature
-65 to+150
TL
Lead Temperature (10 sec)
300
AbsoluteMaximum Ratingsarethose values beyond whichdamage tothe device may occur. Functional operation under these condition isnot implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VI
Parameter
Supply Voltage (note 1)
Value
2 to 3.6
0 toVCC
0 toVCC
-40 to+85
0 to10
Unit
V
Input Voltage
V
VO
Output Voltage
V
oC
Top
Operating Temperature:
dt/dv
Input Rise and Fall Time (VCC = 3V) (note 2)
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2)VIN from0.8V to2V
2/8
74LVQ244
DC SPECIFICATIONS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Min. Typ. Max. Min. Max.
Unit
VCC
(V)
-40 to 85 oC
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
2.0
2.0
V
V
3.0 to 3.6
3.0
0.8
0.8
VOH
High Level Output
Voltage
V(*)
VIH or
V
IL
=
IO=-50 µA
IO=-12 mA
IO=-24mA
IO=50 µA
2.9
2.99
2.9
2.48
2.2
I
V
2.58
VOL
Low Level Output
Voltage
3.0
V(*)
=
0.002
0
0.1
0.1
0.44
0.55
±1
I
VIH or
V
IL
V
IO=12mA
IO=24mA
0.36
II
Input Leakage Current
VI = VCC orGND
±0.1
µA
3.6
3.6
3.6
IOZ
3 State Output Leakage
Current
VI =VIH orVIL
VO = VCC orGND
0.5
±
5
±
A
µ
ICC
Quiescent Supply
Current
VI = VCC orGND
4
40
µA
IOLD
IOHD
Dynamic Output Current
(note 1, 2)
3.6
VOLD = 0.8V max
VOHD =2 Vmin
36
mA
mA
-25
1) Maximum test duration 2ms, one output loaded at time
2)Incident wave switching is guaranteed on transmission lines withimpedances aslow as 50 Ω.
(*) All outputs loaded.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
-40 to 85 oC
(V)
Min. Typ. Max. Min. Max.
VOLP
VOLV
Dynamic Low Voltage
Quiet Output (note 1, 2)
3.3
0.4
0.8
-0.8
-0.5
V
Dynamic High Voltage
Input (note 1, 3)
3.3
3.3
2
CL = 50pF
V
IHD
VILD
Dynamic Low Voltage
Input (note 1, 3)
0.8
1)Worst case package
2)Max number ofoutputs defined as (n). Datainputs aredriven 0Vto3.3V, (n -1) outputs switching andone output atGND
3)max number ofdatainputs (n) switching. (n-1) switching 0Vto3.3V. Inputsunder test switching: 3.3V tothreshold (VILD),0V tothreshold (VIHD).f=1MHz
3/8
74LVQ244
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = t =3 ns)
f
Symbol
Parameter
Test Condition
Value
TA = 25 oC
Min. Typ. Max. Min. Max.
Unit
VCC
(V)
-40 to 85 oC
tPLH
tPHL
Propagation Delay Time
Output Enable Time
Output Disable Time
2.7
7
6
13
9
14
9.5
18
ns
ns
(*)
3.3
tPZL
tPZH
2.7
8.5
7
17
(*)
3.3
12
12.5
20
tPLZ
tPHZ
2.7
9
19
ns
ns
(*)
3.3
7.5
0.5
0.5
13.5
1.5
1.5
14
tOSLH Output to Output Skew
tOSHL Time (note 1, 2)
2.7
1.5
1.5
(*)
3.3
1) Skew is defined as theabsolute value ofthe difference between theactual propagation delay for any twooutputs of thesame device switching inthe
same direction, either HIGHor LOW (tOSLH = |tPLHm - tPLHn|, tOSHL =|tPHLm -tpHLn|)
2) Parameter guaranteed bydesign
(*) Voltagerange is 3.3V ± 0.3V
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
-40 to 85 oC
(V)
Min. Typ. Max. Min. Max.
CIN
Input Capacitance
3.3
3.3
3.3
5
pF
pF
pF
COUT Output Capacitance
10
15
CPD
Power Dissipation
fIN =10 MHz
Capacitance (note 1)
1)CPD isdefined as thevalue of the IC’sinternal equivalent capacitance whichis calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained bythe followingequation. ICC(opr) = CPD • VCC • fIN + ICC/8(per circuit)
TEST CIRCUIT
TEST
SWITCH
Open
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
2VCC
OPEN
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL =R1 =500Ω orequivalent
Ω
)
RT = ZOUT ofpulse generator (typically50
4/8
74LVQ244
WAVEFORM 1: PROPAGATION DELAYS
(f=1MHz; 50% duty cicle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cicle)
5/8
74LVQ244
SO-20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
2.65
0.20
2.45
0.49
0.32
MIN.
MAX.
0.104
0.007
0.096
0.019
0.012
A
a1
a2
b
0.10
0.004
0.35
0.23
0.013
0.009
b1
C
0.50
0.020
c1
D
45 (typ.)
12.60
10.00
13.00
10.65
0.496
0.393
0.512
0.419
E
e
1.27
0.050
0.450
e3
F
11.43
7.40
0.50
7.60
1.27
0.75
0.291
0.19
0.299
0.050
0.029
L
M
S
8 (max.)
P013L
6/8
74LVQ244
TSSOP20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.1
MIN.
MAX.
0.433
0.006
0.374
0.0118
0.0079
0.260
0.256
0.176
A
A1
A2
b
0.05
0.85
0.19
0.09
6.4
0.10
0.9
0.15
0.95
0.30
0.2
0.002
0.335
0.0075
0.0035
0.252
0.246
0.169
0.004
0.354
c
D
6.5
6.4
6.6
0.256
0.252
E
6.25
4.3
6.5
E1
e
4.4
4.48
0.173
0.65 BSC
4o
0.0256 BSC
4o
K
0o
8o
0o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
7/8
74LVQ244
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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