E-TDA7416 [STMICROELECTRONICS]

Car Radio signal Processor with spectrum analyzer;
E-TDA7416
型号: E-TDA7416
厂家: ST    ST
描述:

Car Radio signal Processor with spectrum analyzer

商用集成电路
文件: 总37页 (文件大小:434K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TDA7416  
Car radio signal processor  
Features  
3 stereo inputs  
1 pseudo differential stereo input  
Volume control  
7 band equalizer filter control  
High-pass filter for subwoofer application  
Dir ec t m ut e a nd so ft m u te  
4 independent speaker outputs  
Soft-step speaker control  
Subwoofer output with soft step  
7 band spectrum analyzer  
Full mixing capability  
'!0'03ꢀꢀꢁꢁꢂ  
TQFP44  
Table 1.  
Order code  
E-TDA7416  
Device summary  
Package  
Packing  
HPF2 with ZeroCross  
I2C bus interface  
TQFP44  
Tray  
Description  
The device includes a high performance audio  
processor with 7 bands equalizer and spectrum  
analyzer.  
The digital control allows a programming in a wide  
range of all the filter characteristics.  
September 2013  
Doc ID 9837 Rev 3  
1/37  
www.st.com  
1
 
 
Contents  
TDA7416  
Contents  
1
2
3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Pins connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3.1  
3.2  
3.3  
3.4  
3.5  
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
4
Description of the audio processor part . . . . . . . . . . . . . . . . . . . . . . . . 13  
4.1  
4.2  
Audio processor features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
4.2.1  
4.2.2  
Pseudo-differential stereo input (IN1) . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Single-ended stereo inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
4.3  
4.4  
AutoZero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
4.3.1  
AutoZero remain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
4.4.1  
4.4.2  
4.4.3  
4.4.4  
Attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Peak frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Loudness filter order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Flat mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
4.5  
4.6  
4.7  
Soft-mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Soft-step volume and speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Equalizer filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
4.7.1  
4.7.2  
4.7.3  
4.7.4  
4.7.5  
Attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Center frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Quality Factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Superposition of all equalizer filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
DC-mode of equalizer band 1 (62/100 Hz) . . . . . . . . . . . . . . . . . . . . . . 20  
4.8  
4.9  
Subwoofer application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Spectrum analyzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
2/37  
Doc ID 9837 Rev 3  
TDA7416  
Contents  
4.10 AC coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
4.11 Front speaker attenuator and mixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
4.12 Audio processor testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
4.13 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
5
I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
5.1  
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
5.1.1  
5.1.2  
5.1.3  
Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Transmitted data (send mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Reset condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
5.2  
5.3  
Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
5.3.1  
5.3.2  
5.3.3  
5.3.4  
5.3.5  
5.3.6  
5.3.7  
5.3.8  
5.3.9  
Input selector (0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Loudness (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Volume (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Equalizer (3,4,5,6,7,8,9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Mixing programming (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Soft-mute and HPF2 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Subwoofer configuration / spectrum analyzer / high-pass (12) . . . . . . . 31  
Configuration audio processor I (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Mixer level control (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
5.3.10 Speaker and subwoofer level control (15,16,17,18,19) . . . . . . . . . . . . . 33  
5.3.11 Testing audio processor (20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34  
6
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36  
Doc ID 9837 Rev 3  
3/37  
List of tables  
TDA7416  
List of tables  
Table 1.  
Table 2.  
Table 3.  
Table 4.  
Table 5.  
Table 6.  
Table 7.  
Table 8.  
Table 9.  
Table 10.  
Table 11.  
Table 12.  
Table 13.  
Table 14.  
Table 15.  
Table 16.  
Table 17.  
Table 18.  
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Input selector (0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Loudness (1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Volume (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Equalizer (3,4,5,6,7,8,9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Mixing programming (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Soft-mute and HPF2 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Subwoofer configuration / spectrum analyzer / high-pass (12). . . . . . . . . . . . . . . . . . . . . . 31  
Configuration audio processor I (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Mixer level control (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
Speaker and subwoofer level control (15,16,17,18,19) . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
Testing audio processor (20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34  
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36  
4/37  
Doc ID 9837 Rev 3  
TDA7416  
List of figures  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Pins connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Loudness attenuation @ fP = 400 Hz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Loudness center frequencies @ Attn. = 15 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
st  
nd  
1 and 2 order loudness @ Attn. = 15 dB, f = 400 Hz. . . . . . . . . . . . . . . . . . . . . . . . . . 16  
P
Soft-mute timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Soft-step timing for volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Equalizer filter control @ fCenter = 1kHz, Q = 1.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Figure 10. Center frequencies @ Gain = 15dB, Q = 1.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Figure 11. Quality factors @ boost = 15dB, fCenter = 1kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Figure 12. Superposition of all EQ bands @ boost = 15dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Figure 13. EQ band1, normal- and DC-mode @ boost = 15 dB, fCenter = 62 Hz. . . . . . . . . . . . . . . . 20  
Figure 14. Subwoofer application with low-pass @ 80/120/160Hz and high-pass @ 90/135/180Hz . 20  
Figure 15. Spectrum analyzer block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Figure 16. Timing spectrum analyzer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Figure 17. AC/DC coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Figure 18. Output selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Figure 19. Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Figure 20. Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Figure 21. TQFP44 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
Doc ID 9837 Rev 3  
5/37  
Block diagram  
TDA7416  
1
Block diagram  
Figure 1.  
Block diagram  
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3$!  
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-54%  
3!#,+  
3!/54  
) . 0 5 4  
'!0'03ꢀꢀꢁꢁꢂ  
6/37  
Doc ID 9837 Rev 3  
TDA7416  
Pins connection  
2
Pins connection  
Figure 2.  
Pins connection (top view)  
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ꢂꢂ  
ꢂꢄ  
ꢂꢇ  
ꢂꢀ  
ꢄꢌ  
ꢄꢋ  
ꢄꢁ  
ꢄꢊ  
ꢄꢉ  
ꢄꢆ  
ꢄꢂ  
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'!0'03ꢀꢀꢁꢁꢃ  
Doc ID 9837 Rev 3  
7/37  
Electrical specifications  
TDA7416  
3
Electrical specifications  
3.1  
Supply  
Table 2.  
Symbol  
Supply  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
VS  
IS  
Supply voltage  
Supply current  
7.5  
35  
9
10  
55  
V
VS = 9 V  
45  
mA  
Ripple rejection @  
1kHz  
SVRR  
Audio processor (all Filters flat)  
-
60  
-
dB  
3.2  
3.3  
Thermal data  
Table 3.  
Symbol  
Thermal data  
Description  
Value  
Unit  
Rth j-pins Thermal resistance junction-to-pins  
max  
65  
°C/W  
Absolute maximum ratings  
Table 4.  
Symbol  
Absolute maximum ratings  
Parameter  
Value  
Unit  
VS  
Operating supply voltage  
Operating temperature range  
Storage temperature range  
10.5  
V
Tamb  
Tstg  
-40 to 85  
°C  
°C  
-55 to +150  
3.4  
ESD  
All pins are protected against ESD according to the MIL883 standard.  
8/37  
Doc ID 9837 Rev 3  
TDA7416  
Electrical specifications  
3.5  
Electrical characteristics  
VS = 9 V; Tamb = 25 °C; RL = 10 k; all gains = 0 dB; f = 1 kHz; unless otherwise specified.  
Table 5.  
Symbol  
Electrical characteristics  
Parameter  
Test condition  
Min.  
Typ.  
Max.  
Unit  
Input selector  
Rin  
VCL  
SIN  
Input resistance  
All single-ended Inputs  
70  
1.8  
80  
-1  
100  
2.2  
100  
0
130  
k  
VRMS  
dB  
Clipping level  
-
Input separation  
-
GIN MIN Min. input gain  
GIN MAX Max. input gain  
GSTEP Step resolution  
-
1
17  
1.5  
5
dB  
-
13  
0.5  
-5  
15  
1
dB  
-
dB  
Adjacent gain steps  
1
mV  
mV  
mV  
VDC  
DC steps  
G
-
MIN to GMAX  
-10  
-
1
10  
-
Voffset Remaining offset with AutoZero  
0.5  
Differential stereo inputs  
Rin  
CMRR Common mode rejection ratio  
eNO  
Input resistance (see Figure 3)  
Differential  
70  
46  
46  
-
100  
70  
130  
k  
dB  
dB  
µV  
V
CM = 1 VRMS @ 1 kHz  
CM = 1 VRMS @ 10 kHz  
-
-
-
V
60  
Output-noise @ speaker-outputs 20Hz - 20kHz, flat; all stages 0dB  
11  
Mixing control  
MLEVEL Mixing ratio  
GMAX Max. gain  
Main / mix-source  
-
-6/-6  
15  
-
dB  
dB  
dB  
dB  
-
-
-
13  
-83  
0.5  
17  
-75  
1.5  
AMAX Max. attenuation  
ASTEP Attenuation step  
-79  
1
Loudness control  
ASTEP Step resolution  
AMAX Max. attenuation  
-
0.5  
-21  
1
1.5  
-17  
dB  
dB  
Hz  
Hz  
Hz  
Hz  
-
-19  
200  
400  
600  
800  
fP1  
fP2  
fP3  
fP4  
180  
360  
540  
720  
220  
440  
660  
880  
fPeak  
Peak frequency  
Volume control  
GMAX Max. gain  
-
-
-
18  
-83  
0
20  
-79  
0.5  
22  
-75  
1
dB  
dB  
dB  
AMAX Max. attenuation  
ASTEP Step resolution  
Doc ID 9837 Rev 3  
9/37  
Electrical specifications  
TDA7416  
Unit  
Table 5.  
Symbol  
Electrical characteristics (continued)  
Parameter  
Test condition  
G = -20 to +20 dB  
Min.  
Typ.  
Max.  
-0.75  
0
0
+0.75  
dB  
dB  
EA  
ET  
Attenuation set error  
Tracking error  
DC steps  
G = -80 to -20 dB  
-
-4  
-
3
2
3
5
-
dB  
Adjacent attenuation steps  
From 0dB to GMIN  
-
0.1  
0.5  
mV  
mV  
VDC  
-
Soft-mute  
AMUTE Mute attenuation  
-
80  
-
100  
0.48  
0.96  
123  
-
-
1
dB  
ms  
ms  
ms  
V
T1  
T2  
T3  
-
TD  
Delay time  
-
2
70  
-
170  
1
VTH low Low threshold for SM-Pin 1)  
VTH high High threshold for SM - Pin  
-
2.5  
32  
-
-
-
V
RPU  
VPU  
Internal pull-up resistor  
Internal pull-up Voltage  
-
45  
58  
-
k  
V
-
3.3  
Equalizer control  
CRANGE Control range  
ASTEP Step resolution  
-
+14  
0.5  
+15  
1
+16  
1.5  
dB  
dB  
-
fC1a  
55  
62  
100  
157  
396  
1
69  
Hz  
fC1  
Center frequency band 1  
fC1b  
90  
110  
173  
437  
1.1  
Hz  
fC2  
fC3  
fC4  
fC5  
Center frequency band 2  
Center frequency band 3  
Center frequency band 4  
Center frequency band 5  
fC2  
141  
365  
0.9  
Hz  
fC3  
Hz  
fC4  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
fC5  
2.25  
3.6  
2.51  
4
2.76  
4.4  
fC6a  
fC6  
Center frequency band 6  
Center frequency band 7  
fC6b  
5.70  
13.5  
14.4  
0.9  
6.34  
15  
16  
1
6.98  
16.5  
17.6  
1.1  
fC7a  
fC7  
fC7b  
Q1  
Q2  
1.26  
1.62  
1.98  
-1  
1.4  
1.8  
2.2  
0
1.54  
1.98  
2.44  
+1  
Q
Quality factor  
Q3  
Q4  
DC = off  
dB  
dB  
DCGAIN DC-gain, Band 1  
DC = on, 15dB boost  
4
10/37  
Doc ID 9837 Rev 3  
TDA7416  
Electrical specifications  
Table 5.  
Symbol  
Electrical characteristics (continued)  
Parameter Test condition  
Min.  
Typ.  
Max.  
Unit  
Spectrum analyzer control  
VSAOut Output voltage range  
-
0
3.3  
69  
V
fC1  
fC2  
fC3  
fC4  
fC5  
fC6  
fC7  
Center frequency band 1  
Center frequency band 2  
Center frequency band 3  
Center frequency band 4  
Center frequency band 5  
Center frequency band 6  
Center frequency band 7  
fC1  
fC2  
fC3  
fC4  
fC5  
fC6  
fC7  
Q1  
Q2  
-
55  
62  
157  
396  
1
Hz  
141  
356  
0.9  
2.26  
5.70  
14.4  
1.62  
3.15  
1
173  
436  
1.1  
2.76  
6.98  
17.6  
1.98  
3.85  
100  
-
Hz  
Hz  
kHz  
kHz  
kHz  
kHz  
2.51  
6.34  
16  
1.8  
3.5  
-
Q
Quality factor  
fSAClk Clock frequency  
kHz  
µs  
tSAdel Analog output delay time  
trepeat Spectrum analyzer repeat time  
-
2
-
-
50  
-
-
ms  
ms  
tintres  
HPF2  
Internal reset time  
-
-
3
-
VTH  
EMAX  
EMIN  
Zero crossing threshold  
Max. effect  
-
-
-
-
-
-
20  
22  
4
-
-
mV  
dB  
dB  
dB  
Min. effect  
-
-
ESTEP Step resolution  
1.5  
2
2.5  
Speaker attenuators  
Rin  
Input Impedance  
-
35  
13  
-83  
0.5  
80  
-
50  
15  
65  
17  
-75  
1.5  
-
k  
dB  
dB  
dB  
dB  
dB  
mV  
%
GMAX Max. gain  
-
AMAX Max. attenuation  
ASTEP Step resolution  
AMUTE Output mute attenuation  
-
-79  
1
-
-
90  
EE  
VDC  
MR  
Attenuation set error  
DC steps  
-
-
3
Adjacent Attenuation Steps  
Signal/MixIn  
-
0.5  
50/50  
5
Mixing ratio  
-
-
Audio outputs  
VCLIP Clipping level  
Thd=0.3%  
1.8  
2.2  
-
-
-
VRMS  
k  
RL  
CL  
Output load resistance  
-
-
-
2
-
Output load capacitance  
Output impedance  
-
10  
120  
nF  
ROUT  
-
30  
W
Doc ID 9837 Rev 3  
11/37  
Electrical specifications  
TDA7416  
Table 5.  
Symbol  
Electrical characteristics (continued)  
Parameter Test condition  
DC voltage level  
Min.  
Typ.  
Max.  
Unit  
VDC  
-
4.3  
4.5  
4.7  
V
High-pass  
fHP1  
fHP2  
fHP3  
fHP4  
81  
90  
99  
Hz  
Hz  
Hz  
Hz  
122  
162  
194  
135  
180  
215  
148  
198  
236  
fHP  
High-pass corner frequency  
Subwoofer attenuator  
Rin Input impedance  
-
-
-
-
-
35  
14  
-83  
0.5  
80  
-
50  
15  
-79  
1
65  
16  
-75  
1.5  
-
k  
dB  
dB  
dB  
dB  
dB  
mV  
GMAX Max. gain  
AATTN Max. attenuation  
ASTEP Step resolution  
AMUTE Output mute attenuation  
90  
-
EE  
Attenuation set error  
DC steps  
2
VDC  
Adjacent Attenuation Steps  
-
1
5
Subwoofer low-pass  
fLP1  
fLP2  
fLP3  
72  
80  
88  
Hz  
Hz  
Hz  
fLP  
Low-pass corner frequency  
108  
144  
120  
160  
132  
176  
General  
BW = 20 Hz - 20 kHz  
output muted  
-
-
-
3
15  
µV  
eNO  
Output noise  
BW = 20 Hz - 20 kHz  
all gains = 0dB  
µV  
µV  
15  
single-ended inputs  
20  
-
all gains = 0 dB  
103  
dB  
flat; VO = 2 VRMS  
S/N  
Signal-to-noise ratio  
All EQ-bands at +12dB; Q = 1.0  
a-weighted; VO = 2.6VRMS  
-
-
87  
0.01  
0.05  
90  
-
dB  
%
VIN = 1VRMS; all stages 0dB  
0.1  
0.1  
-
d
Distortion  
VOUT = 1VRMS;  
-
%
Bass & treble = 12dB  
SC  
Channel separation left/right  
-
80  
dB  
12/37  
Doc ID 9837 Rev 3  
TDA7416  
Description of the audio processor part  
4
Description of the audio processor part  
4.1  
Audio processor features  
Input multiplexer  
1 pseudo differential CDC stereo input, programmable as single-ended input  
3 single-ended stereo inputs  
Input gain adjust 0 to 15 dB with 1 dB steps  
direct mute  
internal offset-cancellation (AutoZero)  
Mixing stage  
mixable mix input to Front speaker outputs  
Input controls +15 to -79 dB with 1 dB steps  
direct mute  
Loudness  
programmable center frequency and filter slope  
19 dB with 1dB steps  
selectable flat-mode (constant attenuation)  
Volume  
+32 to -79.5 dB with 0.5 dB step resolution  
soft-step control with programmable blend times  
100 dB range  
Equalizer  
seven bands  
nd  
2
order frequency response  
center frequency programmable for lowest and highest filter  
programmable quality factor in four steps for each filter  
-15 to 15 dB range with 1dB resolution  
Spectrum analyzer  
seven bandpass filters  
nd  
2
order frequency response  
programmable quality factor for different visual appearance  
analog output  
controlled by external serial clock  
High-pass  
nd  
2
order butterworth high-pass with programmable cut-off frequency  
selectable flat-mode  
Speaker  
4 independent soft-step speaker controls, +15 to -79 dB with 1 dB steps  
mute  
4 independent programmable mix inputs with 50% mixing ratio  
Subwoofer  
Doc ID 9837 Rev 3  
13/37  
Description of the audio processor part  
TDA7416  
single-ended monaural output  
independent soft-step level control +15 to -79 dB with 1 dB steps  
Mute functions  
direct mute  
digitally controlled Soft-mute with 3 programmable mute-times  
Effect  
Gain effect or high-pass effect fixed external components  
4.2  
Input stages  
In the basic configuration one pseudo-differential, three single-ended stereo are available.  
Figure 3.  
Input stages  
6REF  
).ꢇꢃ  
3TEREO  
-AIN 3ELECTOR  
0SEUDO  
DIFFERENTIAL  
).ꢇ  
).ꢄ  
-UTE  
).ꢂ  
).ꢆ  
)N'AIN  
).ꢇꢈ  
6REF  
6REF  
2EAR 3ELECTOR  
).ꢇ  
).ꢄ  
-UTE  
).ꢄ  
).ꢂ  
).ꢆ  
).ꢂ  
).ꢆ  
&ADER  
6REF  
6REF  
6REF  
6REF  
'!0'03ꢀꢀꢁꢁꢂ  
4.2.1  
Pseudo-differential stereo input (IN1)  
The IN1- input is implemented as a buffered pseudo-differential stereo stage with 100 k  
input-impedance at each input pin. This input is also configurable as single-ended stereo  
input. The common input-pin, IN1- features a fast charge switch to speed up the charge time  
of external capacitors. This switch is released the first time the input-selector data-byte (0) is  
accessed.  
14/37  
Doc ID 9837 Rev 3  
TDA7416  
Description of the audio processor part  
4.2.2  
Single-ended stereo inputs  
All single-ended inputs have an input impedance of 100 k.  
4.3  
AutoZero  
The AutoZero allows a reduction of the number of pins as well as external components by  
canceling any offset generated by or before the In-Gain-stage (Please notice that externally  
generated offsets, e.g. generated through the leakage current of the coupling capacitors,  
are not canceled).  
The auto-zeroing is started every time the DATA-BYTE 0 is selected and needs max. 0.3 ms  
for the alignment. To avoid audible clicks the Audioprocessor have to be muted by soft-mute  
or hard-mute during this time.  
4.3.1  
AutoZero remain  
In some cases, for example if the µP is executing a refresh cycle of the IIC-Bus-  
programming, it is not useful to start a new AutoZero action because no new source is  
selected and an undesired mute would appear at the out-puts. For such applications the  
TDA7416 could be switched in the AutoZero remain-mode (Bit 6(I1) of the subaddress-  
byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the  
AutoZero and the old adjustment-value remains.  
4.4  
Loudness  
There are four parameters programmable in the loudness stage.  
4.4.1  
Attenuation  
Figure 4 shows the attenuation as a function of frequency at fP = 400 Hz  
Figure 4.  
Loudness attenuation @ f = 400 Hz  
P
ꢀꢍꢀ  
ꢃꢉꢍꢀ  
ꢃꢇꢀꢍꢀ  
D"  
ꢃꢇꢉꢍꢀ  
ꢃꢄꢀꢍꢀ  
ꢃꢄꢉꢍꢀ  
ꢇꢀꢍꢀ  
ꢇꢀꢀꢍꢀ  
ꢇꢍꢀ+  
ꢇꢀꢍꢀ+  
(Z  
'!0'03ꢀꢀꢁꢁꢁ  
Doc ID 9837 Rev 3  
15/37  
 
Description of the audio processor part  
TDA7416  
4.4.2  
Peak frequency  
Figure 5 shows the four possible peak-frequencies at 200, 400, 600 and 800Hz  
Figure 5.  
Loudness center frequencies @ Attn. = 15 dB  
ꢀꢍꢀ  
ꢃꢉꢍꢀ  
D"  
ꢃꢇꢀꢍꢀ  
ꢃꢇꢉꢍꢀ  
ꢃꢄꢀꢍꢀ  
ꢇꢀꢍꢀ  
ꢇꢀꢀꢍꢀ  
ꢇꢍꢀ+  
ꢇꢀꢍꢀ+  
(Z  
'!0'03ꢀꢀꢁꢁꢄ  
4.4.3  
Loudness filter order  
st  
nd  
Different shapes of 1 and 2 -order loudness  
st  
nd  
Figure 6.  
1 and 2 order loudness @ Attn. = 15 dB, f = 400 Hz  
P
ꢀꢍꢀ  
ꢃꢉꢍꢀ  
D"  
ꢃꢇꢀꢍꢀ  
ꢃꢇꢉꢍꢀ  
ꢃꢄꢀꢍꢀ  
ꢇꢀꢍꢀ  
ꢇꢀꢀꢍꢀ  
ꢇꢍꢀ+  
ꢇꢀꢍꢀ+  
'!0'03ꢀꢀꢁꢁꢅ  
(Z  
4.4.4  
Flat mode  
In flat mode the loudness stage works as a 0dB to -19dB attenuator.  
16/37  
Doc ID 9837 Rev 3  
 
TDA7416  
Description of the audio processor part  
4.5  
Soft-mute  
The digitally controlled soft-mute stage allows muting/demuting the signal with a I2C bus  
programmable slope. The mute process can either be activated by the soft-mute pin or by  
the I2C bus. This slope is realized in a special S-shaped curve to mute slow in the critical  
regions (see Figure 7).  
For timing purposes the Bit0 of the I2C bus output register is set to 1 from the start of muting  
until the end of de-muting.  
Figure 7.  
Soft-mute timing  
'!0'03ꢀꢀꢁꢄꢀ  
1. Please notice that a started Mute-action is always terminated and could not be interrupted by a change of  
the mute -signal.  
4.6  
Soft-step volume and speaker  
When the speaker-level is changed audible clicks could appear at the output. The root  
cause of those clicks could either be a DC-Offset before the speaker-stage or the sudden  
change of the envelope of the audio signal. With the soft-step feature both kinds of clicks  
could be reduced to a minimum and are no more audible. The blend-time from one step to  
the next is programmable in four steps.  
Figure 8.  
Soft-step timing for volume  
ꢇD"  
ꢀꢍꢉD"  
33 4IME  
ꢃꢀꢍꢉD"  
ꢃꢇD"  
'!0'03ꢀꢀꢁꢄꢆ  
1. For steps more than 0.5dB (Volume) or 1dB (Speaker) the soft-step mode should be deactivated because  
it could generate a hard 1dB step during blending.  
Doc ID 9837 Rev 3  
17/37  
 
Description of the audio processor part  
TDA7416  
4.7  
Equalizer filter  
There are three parameters programmable in the equalizer filter:  
4.7.1  
Attenuation  
Figure 9 shows the boost and cut response as a function of frequency at a center frequency  
of 1kHz.  
Figure 9.  
Equalizer filter control @ f  
= 1kHz, Q = 1.0  
Center  
ꢇꢉ  
ꢇꢀ  
D"  
ꢃꢉ  
ꢃꢇꢀ  
ꢃꢇꢉ  
ꢇꢀK  
ꢄꢀK  
ꢇꢀꢀ  
ꢇK  
ꢄꢀ  
(Z  
'!0'03ꢀꢀꢁꢄꢇ  
4.7.2  
Center frequency  
This parameter is programmable in the filter stage 1(62/100Hz), 6(4/6.34kHz) and  
7(15/16kHz) only.  
Figure 10 shows the center frequencies 62, 156, 396, 1000, 2510, 6340 and 15000 Hz of  
the 7 equalizer filters.  
Figure 10. Center frequencies @ Gain = 15dB, Q = 1.0  
ꢇꢊ  
ꢇꢆ  
ꢇꢄ  
ꢇꢀ  
D"  
ꢃꢄ  
ꢇꢀ  
ꢄꢀK  
ꢇꢀꢀ  
ꢇK  
(Z  
'!0'03ꢀꢀꢁꢄꢈ  
18/37  
Doc ID 9837 Rev 3  
 
 
TDA7416  
Description of the audio processor part  
4.7.3  
Quality Factors  
Figure 11 shows the four possible quality factors 1, 1.4, 1.8 and 2.2  
Figure 11. Quality factors @ boost = 15dB, f  
= 1kHz  
Center  
ꢇꢊ  
ꢇꢆ  
ꢇꢄ  
ꢇꢀ  
D"  
ꢃꢄ  
ꢄꢀK  
ꢇꢀ  
ꢇꢀꢀ  
ꢇK  
(Z  
'!0'03ꢀꢀꢁꢄꢃ  
4.7.4  
Superposition of all equalizer filters  
Figure 12 shows the superposition of all equalizer filter curves for different quality factors.  
The gain for all filters is +15dB.  
Figure 12. Superposition of all EQ bands @ boost = 15dB  
ꢇꢋ  
ꢇꢊ  
ꢇꢆ  
ꢇꢄ  
ꢇꢀ  
D"  
ꢄꢀK  
ꢇꢀ  
ꢇK  
ꢇꢀꢀ  
(Z  
'!0'03ꢀꢀꢁꢄꢉ  
Doc ID 9837 Rev 3  
19/37  
 
 
Description of the audio processor part  
TDA7416  
4.7.5  
DC-mode of equalizer band 1 (62/100 Hz)  
In this mode, the DC-gain 4dB when set to 15dB boost.  
Figure 13. EQ band1, normal- and DC-mode @ boost = 15 dB, f  
= 62 Hz  
Center  
ꢇꢊ  
ꢇꢆ  
ꢇꢄ  
ꢇꢀ  
D"  
ꢃꢇ  
ꢇꢀ+  
ꢇ+  
ꢇꢀꢀ  
(Z  
ꢇꢀ  
'!0'03ꢀꢀꢁꢄꢂ  
1. The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter.  
4.8  
Subwoofer application  
Figure 14. Subwoofer application with low-pass @ 80/120/160Hz and high-pass @  
90/135/180Hz  
ꢀꢍꢀ  
ꢃꢇꢀꢍꢀ  
ꢃꢄꢀꢍꢀ  
D"  
ꢃꢂꢀꢍꢀ  
ꢃꢆꢀꢍꢀ  
ꢃꢉꢀꢍꢀ  
ꢇꢀꢍꢀ  
ꢇꢀꢀꢍꢀ  
ꢇꢍꢀ+  
ꢇꢀꢍꢀ+  
(Z  
'!0'03ꢀꢀꢁꢄꢁ  
Both filters, the low-pass as well as the high-pass filter, have butterworth characteristic so  
that their cut-off frequencies are not equal but shifted by the factor 1.125 to get a flat  
frequency response.  
20/37  
Doc ID 9837 Rev 3  
TDA7416  
Description of the audio processor part  
4.9  
Spectrum analyzer  
A fully integrated seven band spectrum analyzer with programmable quality factor is  
present in the TDA7416 (Figure 15).  
The spectrum analyzer consists of seven band pass filters with rectifier and sample  
capacitor which stores the maximum peak signal level since the last read cycle. This  
peak signal level can be read by a microprocessor at the SAout-pin. To allow easy  
interfacing to an analog port of the microprocessor, the output voltage at this pin is  
referred to device ground.  
The microprocessor starts a read cycle with the negative going clock edge at the SAclk  
input. On the following positive clock edges, the peak signal level for the band pass  
filters is subsequently switched to SAout. Each analog output data is valid after the time  
tSAdel. A reset of the sample capacitors is induced whenever SAclk remains high for the  
time tintres. Note that a proper reset requires the clock signal SAclk to be held at high  
potential. Figure 15 shows the block diagram and Figure 16 illustrates the read cycle  
timing of the spectrum analyzer.  
Figure 15. Spectrum analyzer block diagram  
'!0'03ꢀꢀꢁꢄꢄ  
Figure 16. Timing spectrum analyzer  
'!0'03ꢀꢀꢁꢄꢅ  
Doc ID 9837 Rev 3  
21/37  
 
 
Description of the audio processor part  
TDA7416  
4.10  
AC coupling  
In some applications additional signal manipulations are desired. For this purpose an AC-  
coupling is placed before the speaker (fader)-attenuators, which can be activated or  
internally shorted by I2C bus. In short condition the input-signal of the speaker-attenuator is  
available at the AC-outputs. The input-impedance of this AC-inputs is 50k. In addition there  
are Mix inputs available. With this inputs it is possible to mix an external signal to every  
speaker with a mixing ratio of 50% (seeFigure 16).  
The source of front and rear speaker can be set independently.  
As source is choosable:  
internal dc coupling (not recommended)  
external ac coupling using ACin pins  
Figure 17. AC/DC coupling  
!#OUT,  
37OUT  
37IN  
!#IN,  
6REF  
6REF  
&RONT &ADER  
LEFT CHANNEL  
(IGHPASS  
FR  
FLAT  
2EAR&ADER  
3UBWOOFER &ADER  
,OWPASS  
FR  
FLAT  
RIGHT CHANNEL  
2EAR SELECTOR  
'!0'03ꢀꢀꢁꢅꢀ  
4.11  
Front speaker attenuator and mixing  
A Mixing-stage is placed after front speaker-attenuator and can be set independently to  
mixing-mode. Having a full volume for the Mix-signal the stage offers a wide flexibility to  
adapt the mixing levels.  
Figure 18. Output selector  
6OLUME  
&RONT  
ꢈꢇꢉꢎꢃꢁꢌD"  
ꢇD" STEP  
(IGHPASSꢄ  
/UT&  
6OLUME  
ꢈꢇꢉꢎꢃꢁꢌD"  
ꢇD" STEP  
&ROM -) 8IN  
'!0'03ꢀꢀꢁꢅꢆ  
22/37  
Doc ID 9837 Rev 3  
TDA7416  
Description of the audio processor part  
4.12  
Audio processor testing  
During the test mode, which can be activated by setting bit I2 of the subaddress byte and D0  
of the audioprocessor testing byte, several internal signals are available at the Mix pin.  
During this mode the input resistance of 100 kOhm is disconnected from the pin. The  
internal signals available are shown in the Data-byte specification.  
4.13  
Application diagram  
Figure 19. Application diagram  
).ꢄ, ).ꢂ2 ).ꢂ, ).ꢆ2 ).ꢆ,  
! #OUT37 ! #OUT2  
ꢂꢂ  
ꢂꢄ  
ꢂꢇ  
ꢂꢀ  
ꢄꢌ  
ꢄꢋ  
ꢄꢁ  
ꢄꢊ  
ꢄꢉ  
ꢄꢆ  
ꢄꢂ  
! #OUT,  
).2  
).ꢇ,ꢈ  
).ꢇ,ꢃ  
62%&OUT  
ꢈ63ꢇ  
ꢃꢌ  
!#ꢄ)N,  
).ꢇ2ꢈ  
-)8  
!#ꢄ/UT,  
&),/,  
/UT,&  
/UT,2  
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'!0'03ꢀꢀꢁꢅꢈ  
Doc ID 9837 Rev 3  
23/37  
I2C bus interface  
TDA7416  
5
I2C bus interface  
5.1  
Interface protocol  
The interface protocol comprises:  
a start condition (S)  
a chip address byte (the LSB bit determines read / write transmission)  
a subaddress byte  
a sequence of data (N-bytes + acknowledge)  
a stop condition (P)  
Figure 20. Interface protocol  
#()0 !$$2%33  
35"!$$2%33  
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S = Start  
R/W = “0” -> Receive-Mode (Chip could be programmed by µP)  
“1” -> Transmission-Mode (Data could be received by µP)  
ACK = Acknowledge  
P = Stop  
Max clock speed 500kbits/s  
5.1.1  
5.1.2  
Auto increment  
If bit I in the subaddress byte is set to “1”, the auto increment of the subaddress is enabled.  
Transmitted data (send mode)  
MSB  
LSB  
SM  
X
X
X
X
X
X
X
SM = Soft-mute activated  
X = Not Used  
The transmitted data is automatically updated after each ACK.  
Transmission can be repeated without new chip address.  
24/37  
Doc ID 9837 Rev 3  
TDA7416  
I2C bus interface  
5.1.3  
Reset condition  
A power-on-reset is invoked if the supply voltage is below than 3.5V. After that, the following  
data is written automatically into the registers of all subaddresses:  
MSB  
LSB  
1
1
1
1
1
1
1
0
The programming after POR is marked bold-face / underlined in the programming tables.  
With this programming all the outputs are muted to V  
(V  
= V /2).  
REF  
OUT  
DD  
5.2  
Subaddress (receive mode)  
Table 6.  
1MSB  
Subaddress (receive mode)  
LSB  
Function  
I2  
I1  
I0  
A4  
A3  
A2  
A1  
A0  
Audio processor Testmode  
off  
0
1
on  
AutoZero remain  
off  
0
1
on  
Auto-increment mode  
off  
0
1
on  
Subaddress  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Source Selector  
Loudness  
Volume  
EQ Filter 1 (62/100Hz)  
EQ Filter 2 (157Hz)  
EQ Filter 3 (396Hz)  
EQ Filter 4 (1kHz)  
EQ Filter 5 (2.51kHz)  
EQ Filter 6 (4/6.34kHz)  
EQ Filter 7 (15/16kHz)  
Mixing Programming  
Soft-mute  
Subwoofer / Spectrum analyzer / High-pass  
Configuration Audio processor I  
Mixing Level Control  
Speaker attenuator LF  
Speaker attenuator RF  
Speaker attenuator LR  
Speaker attenuator RR  
Subwoofer attenuator  
Testing Audio processor  
Doc ID 9837 Rev 3  
25/37  
I2C bus interface  
TDA7416  
5.3  
Data byte specification  
The status after power-on-reset is marked bold-face / underlined in the programming tables.  
5.3.1  
Input selector (0)  
Table 7.  
MSB  
Input selector (0)  
LSB  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Source selector  
X
X
X
X
0
0
1
1
0
1
0
1
BUS/PD  
AUX  
MD  
AM/FM  
Input gain  
0dB  
0
0
:
0
0
:
0
0
:
0
1
:
1dB  
:
1
1
1
1
1
1
0
1
14dB  
15dB  
Mute  
off  
0
1
on  
5.3.2  
Loudness (1)  
Table 8.  
MSB  
Loudness (1)  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Attenuation  
0 dB  
0
0
:
0
0
:
0
0
:
0
0
:
0
1
:
-1 dB  
:
0
0
:
1
1
:
1
1
:
1
1
:
0
1
:
-14 dB  
-15 dB  
:
1
:
0
:
0
:
1
:
1
:
-19 dB  
not allowed  
Center frequency  
200Hz  
0
0
1
1
0
1
0
1
400Hz  
600Hz  
800Hz  
Loudness order  
First order  
Second order  
0
1
26/37  
Doc ID 9837 Rev 3  
TDA7416  
I2C bus interface  
5.3.3  
Table 9.  
MSB  
Volume (2)  
Volume (2)  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Gain/Attenuation  
(+32.0dB)  
(+31.5dB)  
:
0
0
:
0
0
:
0
0
:
0
0
:
0
0
:
0
0
:
0
0
:
0
1
:
0
0
0
:
0
0
0
:
0
0
0
:
1
1
1
:
1
1
1
:
0
0
0
:
0
0
1
:
0
1
0
:
+20.0dB  
+19.5dB  
+19.0dB  
:
0
0
0
:
0
1
1
:
1
0
0
:
1
0
0
:
1
0
0
:
1
0
0
:
1
0
0
:
1
0
1
:
+0.5dB  
0.0dB  
-0.5dB  
:
1
1
1
1
X
X
1
1
1
1
1
1
1
1
0
1
-79.0dB  
-79.5dB  
Note:  
It is not recommended to use a gain more than 20dB for system performance reason. In  
general, the max. gain should be limited by software to the maximum value, which is needed  
for the system.  
Doc ID 9837 Rev 3  
27/37  
I2C bus interface  
TDA7416  
5.3.4  
Equalizer (3,4,5,6,7,8,9)  
Table 10. Equalizer (3,4,5,6,7,8,9)  
MSB  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Equalizer cut/boost level  
0
0
:
0
0
:
0
0
:
0
0
:
0
1
:
-15dB  
-14dB  
:
0
0
1
1
:
1
1
1
1
:
1
1
1
1
:
1
1
1
1
:
0
1
1
0
:
-1dB  
0dB  
0dB  
+1dB  
:
1
1
0
0
0
0
0
0
1
0
+14dB  
+15dB  
Equalizer Q-Factor  
0
0
1
1
0
1
0
1
2.2  
1.8  
1.4  
1.0  
Equalizer center frequency (only Subaddresses 3,8,9)  
62Hz(addr 3)/4kHz(addr 8)/15kHz(addr 9)  
0
1
100Hz(addr 3)/6.24kHz(addr 8)/16kHz(addr 9)  
DC mode EQ Band 1 (62/100 Hz, Subaddress. 4!)  
0
on  
off  
1
28/37  
Doc ID 9837 Rev 3  
TDA7416  
I2C bus interface  
5.3.5  
Mixing programming (10)  
Table 11. Mixing programming (10)  
MSB  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Mixing  
Mute  
0
1
enable  
Rear Source Selector  
0
0
1
1
0
1
0
1
BUS’(PD)  
AUX  
MD  
AM/FM  
Mixing Target  
Speaker LF off  
Speaker LF on  
Speaker RF off  
Speaker RF on  
0
1
0
1
ZeroCross on HPF2  
0
X
X
on  
off  
1
Spectrum Analyzer Detect Point  
0
After EQ  
1
Before EQ  
Doc ID 9837 Rev 3  
29/37  
I2C bus interface  
TDA7416  
5.3.6  
Soft-mute and HPF2 (11)  
Table 12. Soft-mute and HPF2 (11)  
MSB  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Soft-mute  
On (Mute)  
Off  
0
1
Soft-mute time  
0
0
1
0
1
Mute time = 0.48ms  
Mute time = 0.96ms  
Mute time = 123ms  
X
Secondary high-pass enable  
Filter available  
0
1
No Filter (Gain)  
Secondary high-pass effect (with ZeroCross)  
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
X
X
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
1
4 dB  
6 dB  
8 dB  
10 dB  
12 dB  
14 dB  
16 dB  
18dB  
20dB  
22dB  
0dB  
Note:  
It is recommended to set D3(Filter available or not) during initial mute.  
30/37  
Doc ID 9837 Rev 3  
TDA7416  
I2C bus interface  
5.3.7  
Subwoofer configuration / spectrum analyzer / high-pass (12)  
Table 13. Subwoofer configuration / spectrum analyzer / high-pass (12)  
MSB  
D7  
LSB  
D0  
Function  
D6  
D5  
D4  
D3  
D2  
D1  
Subwoofer Filter  
0
0
1
1
0
1
0
1
off  
80Hz  
120Hz  
160Hz  
Subwoofer Coupling  
AC using SWIn pin  
DC  
X
X
0
1
Spectrum Analyzer Q-Factor  
0
3.5  
1.8  
1
High-pass enable  
Filter off  
0
1
Filter on  
High-pass cut-off frequency  
0
0
1
1
0
1
0
1
90Hz  
135Hz  
180Hz  
225Hz  
Doc ID 9837 Rev 3  
31/37  
I2C bus interface  
TDA7416  
5.3.8  
Configuration audio processor I (13)  
Table 14. Configuration audio processor I (13)  
MSB  
D7  
LSB  
D0  
Function  
D6  
D5  
D4  
D3  
D2  
D1  
PD input mode  
single ended  
0
1
pseudo differential  
PD Input Gain  
-6 dB  
0
1
0 dB  
Soft-step volume  
0
off  
on  
1
Soft-step time  
320µs  
0
0
1
1
0
1
0
1
1.28ms  
5.12ms  
20.4ms  
Loudness  
flat  
0
1
filter ON  
Front AC speaker  
AC coupling (ACin)  
DC coupling  
0
1
Rear effect  
0
No effect signal  
Equalizing signal  
1
32/37  
Doc ID 9837 Rev 3  
TDA7416  
I2C bus interface  
5.3.9  
Mixer level control (14)  
Table 15. Mixer level control (14)  
MSB  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Gain/Attenuation  
1
0
:
0
:
0
:
1
:
1
:
1
:
1
:
+15dB  
:
1
1
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
1
0
0
1
:
+ 1dB  
0dB  
0dB  
- 1dB  
:
0
0
:
0
0
:
0
0
:
0
1
:
1
0
:
1
0
:
1
0
:
1
0
:
-15dB  
-16dB  
:
0
0
X
1
1
1
0
0
1
0
0
X
1
1
X
1
1
X
1
1
X
0
1
X
-78dB  
-79dB  
Mute  
5.3.10  
Speaker and subwoofer level control (15,16,17,18,19)  
)
Table 16. Speaker and subwoofer level control (15,16,17,18,19)  
MSB  
D7  
LSB  
D0  
Function  
D6  
D5  
D4  
D3  
D2  
D1  
Gain/Attenuation  
0
:
0
:
0
:
1
:
1
:
1
:
1
:
+15dB  
:
0
0
0
0
:
0
0
0
0
:
0
0
1
1
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
1
0
0
1
:
+ 1dB  
0dB  
0dB  
- 1dB  
:
0
:
1
:
0
:
0
:
0
:
0
:
0
:
-16dB  
:
0
:
1
:
1
:
0
:
0
:
0
:
0
:
-32dB  
:
1
:
0
:
0
:
0
:
0
:
0
:
0
:
-48dB  
:
1
:
0
:
1
:
0
:
0
:
0
:
0
:
-64dB  
1
1
0
1
1
X
1
X
1
X
1
X
1
X
-79dB  
Mute  
Soft-step on/off  
0
On  
Off  
1
Doc ID 9837 Rev 3  
33/37  
I2C bus interface  
TDA7416  
5.3.11  
Testing audio processor (20)  
Table 17. Testing audio processor (20)  
MSB  
LSB  
D0  
Function  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Audio processor test-mode  
0
off  
on  
1
Test-multiplexer  
0
1
0
1
0
1
X
0
1
X
X
X
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
0
1
0
1
Spectrum Analyzer Filter  
62Hz  
Spectrum Analyzer Filter 157Hz  
Spectrum Analyzer Filter 396Hz  
Spectrum Analyzer Filter  
1kHz  
Spectrum Analyzer Filter 2.51kHz  
Spectrum Analyzer Filter 6.34kHz  
Spectrum Analyzer Filter 16kHz  
Switch-Ron measurement setup (Level input)  
not used  
200kHz Oscillator  
NB-Hold  
internal reference  
Clock  
0
external  
internal  
1
AZ function  
0
off  
on  
1
SC-Clock  
0
Fast mode  
Normal mode  
1
Note:  
This byte is used for testing or evaluation purposes only and must not set to other values  
than “11111110” in the application!  
34/37  
Doc ID 9837 Rev 3  
TDA7416  
Package information  
6
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK  
specifications, grade definitions and product status are available at: www.st.com.  
®
ECOPACK is an ST trademark.  
Figure 21. TQFP44 mechanical data and package dimensions  
MM  
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Doc ID 9837 Rev 3  
35/37  
Revision history  
TDA7416  
7
Revision history  
Table 18. Document revision history  
Date  
Revision  
Changes  
20-Sep-2003  
1
Initial release.  
Document reformatted.  
30-Jun-2011  
24-Sep-2013  
2
3
Updated order code in the Table 1: Device summary on page 1.  
Updated disclaimer.  
36/37  
Doc ID 9837 Rev 3  
TDA7416  
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