EMIF10-LCD01C1 [STMICROELECTRONICS]
10 LINES EMI FILTER AND ESD PROTECTION; 10号线EMI滤波器和ESD保护型号: | EMIF10-LCD01C1 |
厂家: | ST |
描述: | 10 LINES EMI FILTER AND ESD PROTECTION |
文件: | 总7页 (文件大小:114K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EMIF10-LCD01C1
®
10 LINES EMI FILTER
AND ESD PROTECTION
IPAD™
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required :
■
■
■
■
LCD for Mobile phones
Computers and printers
Communication systems
MCU Boards
DESCRIPTION
Flip-Chip
(25 bumps)
The EMIF10-LCD01C1 is a 10 lines highly inte-
grated devices designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry,
which prevents the device from destruction when
subjected to ESD surges up 15kV.
Figure 1: Pin Configuration (ball side)
5
3
4
2
1
I5
I4
I3
I2
I1
A
B
C
D
E
I10
I9
I8
I7
I6
BENEFITS
GND GND GND GND GND
■
■
■
■
■
■
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consuming: < 7mm
Coating resin on back side
Very thin package: 0.69 mm
High efficiency in ESD suppression on input
pins (IEC61000-4-2 level 4)
O10
O5
O9
O4
O8
O3
O7
O2
O6
O1
2
■
■
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging.
Figure 2: Basic Cell Configuration
Low-pass Filter
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2:
Output
Input
Level 4 input pins 15kV (air discharge)
8kV (contact discharge)
Level 1 output pins 2kV (air discharge)
2kV (contact discharge)
Ri/o = 100Ω
Cline = 35pF
GND
GND
GND
MIL STD 833E - Method 3015-6 Class 3
Table 1: Order Code
Part Number
Marking
EMIF10-LCD01C1
FL
September 2004
REV. 1
1/7
EMIF10-LCD01C1
Table 2: Absolute Maximum Ratings (T
= 25°C)
amb
Symbol
Parameter
Value
125
Unit
°C
T
Junction temperature
j
T
-40 to + 85
Operating temperature range
Storage temperature range
°C
op
T
-55 to +150
°C
stg
Table 3: Electrical Characteristics (T
= 25°C)
amb
Symbol
Parameter
Breakdown voltage
I
V
BR
IF
I
Leakage current @ V
RM
RM
V
Stand-off voltage
Clamping voltage
Dynamic resistance
Peak pulse current
RM
VF
V
CL VBR VRM
V
CL
V
IRM
IR
Rd
I
PP
R
IPP
Series resistance between Input & Output
I/O
Cline Input capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
10
Unit
V
V
I
I = 1 mA
R
6
8
BR
V
= 3V
RM
500
110
nA
Ω
RM
R
90
100
47
I/O
Cline
@ 0V bias
pF
Rt / Ft
Induced rise and fall time 10-90% at 26 MHz fre-
quency signal V = 1.9 V (Rt / Ft input 1 ns, 50Ω
impedance generator)
(1)
ns
8
(1) guaranteed by design
Figure 3: S21(dB) all lines attenuation
measurement and Aplac simulation
Figure 4: Analog cross talk measurements
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EMIF10-LCD01C1
Figure 5: ESD response to IEC61000-4-2
(+15kV air discharge) on one input and on one
output
Figure 6: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input and on one output
Vin
Vout
Figure 7: Line capacitance versus applied
voltage
Figure 8: Rise time 10-90% measurements with
1.9V signal at 26 MHz frequency (50Ω
generator)
CLine(pF)
35
30
25
20
15
10
VLine(V)
2.0 3.0
5
0
0.0
1.0
4.0
5.0
Figure 9: Fall time 10-90% measurements with
1.9V signal at 26 MHz frequency (50Ω
generator)
3/7
EMIF10-LCD01C1
Figure 10: Aplac model
EMIF10-LCD01C1 model
Ground return
Figure 11: Aplac parameters
ZRZ structure
aplacvar Remif10low 100
BV = 7
aplacvar Cemif10flow 17.5pF
Bumps
CJO = Cemif10low
IBV = 1u
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Cbump 1.5pF
Bulk
IKF = 1000
IS = 10f
ISR = 100p
N = 1
aplacvar Rsub 100m
Gnd connections
aplacvar Rgnd 100m
aplacvar Lgnd 200pH
aplacvar Cgnd 0.15pF
M = 0.3333
RS = 0.015
VJ = 0.6
TT = 50n
Figure 12: Order Code
EMIF yy
-
xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x
= 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
= 3: Leadfree Pitch = 400µm, Bump = 250µm
4/7
EMIF10-LCD01C1
Figure 13: FLIP-CHIP Package Mechanical Data
500µm 50
695µm 75
315µm 50
250µm 40
2.64mm 50µm
Figure 14: Foot Print Recommendations
Figure 15: Marking
545
400
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
Copper pad Diameter :
250µm recommended , 300µm max
ww = week)
Solder stencil opening : 330µm
x x z
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
y
w w
All dimensions in µm
5/7
EMIF10-LCD01C1
Figure 16: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location
Ø 1.5 +/- 0.1
4 +/- 0.1
ST
ST
ST
0.73 +/- 0.05
4 +/- 0.1
User direction of unreeling
All dimensions in mm
Table 4: Ordering Information
Part Number
Marking
Package
Flip-Chip
Weight
Base qty Delivery mode
5000 Tape & reel (7”)
EMIF10-LCD01C1
FL
9.3 mg
Note: Further packing information available in the application notes
- AN1235: ''Flip-Chip: Package description and recommandations for use''
- AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History
Date
Revision
Description of Changes
Sep-2004
1
First issue
6/7
EMIF10-LCD01C1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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