HCF4029M013TR [STMICROELECTRONICS]
PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE; 预置UP / DOWN COUNTER二进制或BCD十年
| 型号： | HCF4029M013TR |
| 厂家： | 
ST |
| 描述： | PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE |
| 文件： | 总12页 (文件大小：479K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCF4029B
PRESETTABLE UP/DOWN COUNTER
BINARY OR BCD DECADE
■
■
MEDIUM SPEED OPERATION : 8MHz (Typ.)
at C = 50pF and V - V = 10V
L
DD
SS
MULTI-PACKAGE PARALLEL CLOCKING
FOR SYNCHRONOUS HIGH SPEED
OUTPUT RESPONSE OR RIPPLE
CLOCKING FOR SLOW CLOCK INPUT RISE
AND FALL TIMES
DIP
SOP
■
■
"PRESET ENABLE" AND INDIVIDUAL "JAM"
INPUTS PROVIDED
BINARY OR DECADE UP/DOWN
COUNTING
BCD OUTPUTS IN DECADE MODE
QUIESCENT CURRENT SPECIF. UP TO 20V
ORDER CODES
PACKAGE
TUBE
T & R
■
■
■
DIP
HCF4029BEY
HCF4029BM1
SOP
HCF4029M013TR
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
■
INPUT LEAKAGE CURRENT
inputs consist of a single CLOCK, CARRY IN
(CLOCK ENABLE), BINARY/DECADE, UP/
DOWN, PRESET ENABLE, and four individual
JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT
signal are provided as outputs. A high PRESET
ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state
asynchronously with the clock. A low on each JAM
line, when the PRESET-ENABLE signal is high,
resets the counter to its zero count. The counter
advances one count at the positive transition of
the clock when the CARRY-IN and PRESET
ENABLE signals are low. Advancement is
inhibited when the CARRY-IN or PRESET
ENABLE signals are high. The CARRY-OUT
I = 100nA (MAX) AT V = 18V T = 25°C
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
DD
A
■
■
DESCRIPTION
HCF4029B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
HCF4029B consists of a four stage binary or
BCD-decade up/down counter with provisions for
look ahead carry in both counting modes. The
PIN CONNECTION
September 2002
1/12
HCF4029B
signal is normally high and the counter reaches its
maximum count in the UP mode or the minimum
count in the DOWN mode provided the CARRY-IN
signal is low. The CARRY-IN signal in the low
state can thus be considered a CLOCK ENABLE.
The CARRY-IN terminal must be connected to
counter counts Up when to UP/DOWN INPUT is
high, and Down when the UP/DOWN INPUT is
low. Multiple packages can be connected in either
a
parallel clocking or
arrangement. Parallel
synchronous control and, hence,
a
ripple clocking
clocking provides
faster
a
V
when not in use. Binary counting is
SS
response from all counting outputs. Ripple
clocking allows for longer clock input rise and fall
times.
accomplished when the BINARY/DECODE input
is high; the counter counts in the decade mode
when the BINARY/DECADE input is low. The
IINPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
15
5
CLOCK
Clock Input
CARRY IN
Carry In Input
BINARY/
DECADE
9
10
1
Binary / Decade Select
Up/Down Select
UP/DOWN
PRESET
ENABLE
Preset Enable Input
4, 12, 13, 3 JAM1 to JAM4 Jam Input Signals
6, 11, 14, 2
Q1 to Q4
Q Outputs
7
8
CARRY OUT Carry Out Outputs
V
V
Negative Supply Voltage
Positive Supply Voltage
SS
16
DD
FUNCTIONAL DIAGRAM
2/12
HCF4029B
TRUTH TABLE
TRUTH TABLE
CLOCK
TE
X
PE
L
J
L
Q
L
Q
H
CONTROL
INPUT
LOGIC LEVEL
ACTION
X
H
L
Binary Count
Decade Count
Up Count
L
H
L
X
H
X
Q
H
Q
Q
BIN/DEC
X
X
L
H
L
UP/DOWN
H
H
Q NC
Down Count
Jam In
X
H
X
Q
Q NC
H
L
PRESET
ENABLE
X: Don’t Care
No Jam
H
L
No Counter
Advance counter
CARRY IN
LOGIC DIAGRAM
3/12
HCF4029B
TIMING CHART - Binary Mode
TIMING CHART - Decade Mode
4/12
HCF4029B
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
DC Input Voltage
DC Input Current
-0.5 to +22
V
V
DD
V
-0.5 to V + 0.5
I
DD
I
± 10
200
mA
mW
mW
°C
I
P
Power Dissipation per Package
Power Dissipation per Output Transistor
Operating Temperature
D
100
T
-55 to +125
op
T
Storage Temperature
-65 to +150
°C
stg
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V pin voltage.
SS
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
3 to 20
0 to V
V
V
DD
V
Input Voltage
I
DD
T
Operating Temperature
-55 to 125
°C
op
5/12
HCF4029B
DC SPECIFICATIONS
Test Conditions
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
V
I
V
DD
I
O
O
(V)
(V)
(µA) (V)
Min. Typ. Max. Min. Max. Min. Max.
I
Quiescent Current
0/5
0/10
0/15
0/20
0/5
5
0.04
0.04
0.04
5
150
300
150
300
L
10
15
20
10
20
µA
600
600
0.08 100
3000
3000
V
High Level Output
Voltage
<1
<1
<1
<1
<1
<1
<1
<1
5
4.95
9.95
4.95
9.95
4.95
9.95
OH
0/10
0/15
5/0
10
V
V
V
V
15 14.95
14.95
14.95
V
Low Level Output
Voltage
5
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
OL
10/0
15/0
10
15
V
High Level Input
Voltage
0.5/4.5
1/9
5
3.5
7
3.5
7
3.5
7
IH
10
15
5
1.5/18.5 <1
11
11
11
V
Low Level Input
Voltage
0.5/4.5
9/1
<1
<1
1.5
3
1.5
3
1.5
3
IL
10
15
5
1.5/18.5 <1
4
4
4
I
Output Drive
Current
0/5
0/5
2.5
4.6
9.5
13.5
0.4
0.5
1.5
-1.36 -3.2
-1.1
-0.36
-0.9
-2.4
0.36
0.9
-1.1
-0.36
-0.9
-2.4
0.36
0.9
OH
5
-0.44
-1.1
-3.0
0.44
1.1
-1
-2.6
-6.8
1
mA
mA
0/10
0/15
0/5
10
15
5
I
Output Sink
Current
OL
0/10
0/15
10
15
2.6
6.8
3.0
2.4
2.4
I
Input Leakage
Current
I
-5
0/18
any input
18
±0.1
±1
±1
µA
±10
C
Input Capacitance
any input
5
7.5
pF
I
The Noise Margin for both "1" and "0" level is: 1V min. with V =5V, 2V min. with V =10V, 2.5V min. with V =15V
DD
DD
DD
6/12
HCF4029B
DYNAMIC ELECTRICAL CHARACTERISTICS (T
= 25°C, C = 50pF, R = 200KΩ, t = t = 20 ns)
amb
L
L
r
f
Test Condition
Value (*)
Unit
Symbol
Parameter
V
(V)
Min. Typ. Max.
DD
t
t
Propagation Delay Time
(Q Outputs)
5
250
120
90
500
240
180
560
260
190
200
100
80
PLH PHL
10
15
5
ns
ns
t
t
Propagation Delay Time
(Carry Output)
280
130
95
PLH PHL
10
15
5
t
t
Transition Time
(Q Outputs, Carry Output)
100
50
THL TLH
10
15
5
ns
40
t
Minimum Clock Pulse
Width
90
180
90
W
10
15
5
45
ns
30
60
(1)
Clock Rise and Fall Time
15
t t
r, f
10
15
5
15
ns
15
(2)
Minimum Setup Time
(Carry Input)
30
10
6
60
t
setup
10
15
5
20
ns
12
Minimum Setup Time
(B/D or U/D)
170
70
50
4
340
140
100
t
setup
10
15
5
ns
f
Maximum Clock Input
Frequency
2
4
MAX
10
15
8
MHz
5.5
11
PRESET ENABLE
t
t
t
Propagation Delay Time
(Q Outputs)
5
235
100
80
470
200
160
640
290
210
130
70
PLH PHL
10
15
5
ns
ns
ns
ns
t
Propagation Delay Time
(Carry Output)
320
145
105
65
PLH PHL
10
15
5
t
Minimum Preset Enable
(Pulse Width)
W
10
15
5
35
25
50
(2)
rem
Minimum Preset Enable
(Removal Time)
100
55
200
110
80
t
10
15
40
7/12
HCF4029B
Test Condition
Value (*)
Unit
Symbol
Parameter
V
(V)
Min. Typ. Max.
DD
PRESET ENABLE
t
t
Propagation Delay Time
(Carry Output)
5
170
70
340
140
100
50
PHL PLH
10
15
5
ns
ns
ns
50
(3)
Minimum Setup Time
(Carry In)
25
t
setup
10
15
5
15
30
12
25
t
Minimum Hold Time
(Carry In)
100
35
200
70
hold
10
15
30
60
(*) Typical temperature coefficient for all V value is 0.3 %/°C.
DD
(1) If more than one unit is cascated in the parallel clocked application t should be made less than or equal to the sum of the fixed propagation
r
delay at 15pF and the transition time of the carry output driving stage for the estimated capacitance load.
(2) From Up/Down, Binary/Decade, Carry In or Preset Enable Control Inputs to Clock Edge.
(3) From Carry In to Clock Edge.
TEST CIRCUIT
C
R
R
= 50pF or equivalent (includes jig and probe capacitance)
= 200KΩ
L
L
T
= Z
of pulse generator (typically 50Ω)
OUT
8/12
HCF4029B
WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 2 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
9/12
HCF4029B
Plastic DIP-16 (0.25) MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
0.51
0.77
MAX.
MIN.
0.020
0.030
MAX.
a1
B
b
1.65
0.065
0.5
0.020
0.010
b1
D
E
e
0.25
20
0.787
8.5
2.54
17.78
0.335
0.100
0.700
e3
F
7.1
5.1
0.280
0.201
I
L
3.3
0.130
Z
1.27
0.050
P001C
10/12
HCF4029B
SO-16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.75
0.2
MIN.
MAX.
0.068
0.007
0.064
0.018
0.010
A
a1
a2
b
0.1
0.003
1.65
0.46
0.25
0.35
0.19
0.013
0.007
b1
C
0.5
0.019
c1
D
45˚ (typ.)
9.8
5.8
10
0.385
0.228
0.393
0.244
E
6.2
e
1.27
8.89
0.050
0.350
e3
F
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.024
G
L
1.27
0.62
M
S
˚ (max.)
8
PO13H
11/12
HCF4029B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2002 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
© http://www.st.com
12/12
相关型号：
©2020 ICPDF网 联系我们和版权申明