L6234PD [STMICROELECTRONICS]
THREE PHASE MOTOR DRIVER; 三相电动机驱动
| 型号： | L6234PD |
| 厂家： | 
ST |
| 描述： | THREE PHASE MOTOR DRIVER |
| 文件： | 总10页 (文件大小：118K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L6234
THREE PHASE MOTOR DRIVER
SUPPLYVOLTAGEFROM 7 TO 52V
5A PEAK CURRENT
RDS ON 0.3Ω TYP. VALUE AT 25°C
CROSS CONDUCTION PROTECTION
TTL COMPATIBLE DRIVER
OPERATING FREQUENCY TO 50KHz
THERMAL SHUTDOWN
POWER DIP (16+2+2)
PowerSO20
INTRINSIC FAST FREE WHEELING DIODES
INPUT AND ENABLE FUNCTION FOR
EVERY HALF BRIDGE
10V EXTERNAL REFERENCE AVAILABLE
DESCRIPTION
The L6234 is a triple half bridge to drive a
brushlessmotor.
ORDERING NUMBERS: L6234 (POWER DIP 16+2+2)
L6234PD (PowerSO20)
It is realized in Multipower BCD technology which
combines isolated DMOS power transistors with
CMOS and Bipolar circuits on the same chip.
By using mixed technology it has been possible to
optimize the logic circuitry and the power stage to
achievethe best possible performance.
The output DMOS transistors can sustain a very
high current due to the fact that the DMOS struc-
ture is not affected by the second breakdown ef-
fect, the RMS maximum current is practically lim-
ited by the dissipation capability of the package.
All the logic inputs are TTL, CMOS and P com-
µ
patible. Each channel is controlled by two sepa-
rate logic input.
L6234 is available in 20 pin POWER DIP package
(16+2+2) and in PowerSO20.
PIN CONNECTION (Top view)
GND
SENSE1
EN2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND
SENSE2
VBOOT
Vcp
OUT1
IN1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OUT2
IN2
EN1
VS
EN2
IN2
SENSE1
GND
OUT2
OUT1
IN1
VREF
OUT3
IN3
GND
GND
VS
GND
SENSE2
VBOOT
VCP
EN1
EN3
EN3
IN3
VS
VS
GND
GND
OUT3
VREF
D94IN129A
D98IN848
POWER DIP (16+2+2)
PowerSO20
March 1998
1/10
L6234
BLOCK DIAGRAM
0.22µF
10nF
VCP
1µF
VREF
VBOOT
1N4148
VREF
10V
=
CHARGE
PUMP
Vs
to 52V
7
0.1
µF
100µF
IN1
TH1
TL1
OUT1
EN1
IN2
TH2
TL2
OUT2
EN2
SENSE1
THERMAL
PROTECTION
IN3
TH3
TL3
OUT3
EN3
SENSE2
RSENSE
GND
D95IN309A
2/10
L6234
THERMAL DATA
Symbol
Rth j-pin
Parameter
DIP16+2+2
12
PowerSO20
–
Unit
C/W
°
Thermal Resistance, Junction to Pin
Thermal Resistance, Junction to Ambient
(see Thermal Characteristics)
Rth j-amb1
40
–
C/W
°
Thermal Resistance, Junction to Ambient (see Thermal
Characteristics)
Rth j-amb2
Rth j-case
50
–
–
C/W
°
1.5
°C/W
Thermal Resistance Junction-case
ones), as well as the others, have a minimum
thermal connection with the external world (very
thin strips only) so that the dissipation takes place
through still air and through the PCB itself.
It is the same situation of point above, without any
heatsinking surface created on purpose on the
board.
THERMAL CHARACTERISTICS
Rth j-pins
DIP16+2+2
. The thermal resistance is referred to
the thermal path from the dissipating region on
the top surface of the silicon chip, to the points
along the four central pins of the package, at a
distance of 1.5 mm away from the stand-offs.
Additional data on the PowerDip and the
PowerSO20 package can be found in:
Rth j-amb1
If a dissipating surface, thick at least 35 µm, and
with a surface similar or bigger than the one
shown, is created making use of the printed cir-
cuit.
Such heatsinking surface is considered on the
bottomside of an horizontal PCB (worst case).
Application Note AN467:
Thermal Characteristics of the PowerDip
20,24 Packages Soldered on 1,2,3 oz.
Copper PCB
Application Note AN668:
A New High Power IC Surface Mount Package:
PowerSO20 Power IC Packaging from Insertion
to Surface Mounting.
Rth j-amb2
If the power dissipating pins (the four central
Figure 1: Printed Heatsink
3/10
L6234
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VS
VIN,VEN
Ipeak
VSENSE
Vb
Power Supply Voltage
Input Enable Voltage
52
V
– 0.3 to 7
V
A
Pulsed Output Current (note 1)
Sensing Voltage (DC Voltage)
Bootstrap Peak Voltage
5
-1 to 4
62
V
V
VOD
Differential Output Voltage (between any of the 3 OUT pins)
Commutation Frequency
60
V
fC
50
KHz
V
VREF
Ptot
Reference Voltage
12
Total Power Dissipation
Total Power Dissipation
L6234PD Tamb = 70°C
L6234 Tamb = 70 C
2.3
W
W
Ptot
1.6 (*)
-40 to 150
°
Tstg, Tj
Storage and Junction Temperature Range
C
°
Note 1: Pulse width limited only by junction temperature and the transient thermal impedance
(*) Mounted on board with minimized copper area
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
VS
Supply Voltage
7 to 42
V
VOD
Peak to Peak Differential Voltage (between any of the 3 OUT
pins)
52
V
Iout
DC Output Current Power SO20 (Tamb = 25°C)
DC Output Current Power DIP (Tamb = 25°C) with infinite heatsink
Sensing Voltage (pulsed tw < 300nsec)
Sensing Voltage (DC)
4
2.8
A
A
V
V
VSENSE
-4 to 4
-1 to 1
-40 to 125
Tj
Junction Temperature Range
C
°
PIN FUNCTIONS
Powerdip
PowerSO20
Name
Function
1
20
10
6
5
15
OUT 1
OUT 2
OUT 3
Output of the channels 1/2/3.
2
19
9
7
4
14
IN 1
IN 2
IN 3
Logic input of channels 1/2/3. A logic HIGH level (when the corresponding
EN pin is HIGH) switches ON the upper DMOS Power Transistor, while a
logic LOW switches ON the corresponding low side DMOS Power.
3
18
8
8
3
13
EN 1
EN 2
EN 3
Enable of the channels 1/2/3. A logic LOW level on this pin switches off both
power DMOS of the related channel.
4,7
14
9, 12
19
Vs
Power Supply Voltage.
SENSE2 A resistance Rsense connected to this pin provides feedback for motor
current control for the bridge 3.
17
11
2
SENSE1 A resistance Rsense connected to this pin provides feedback for motor
current control for the bridges 1 and 2.
16
Vref
Internal Voltage Reference. A capacitor connected from this pin to GND
increases the stability of the Power DMOS drive circuit.
12
13
17
18
Vcp
Bootstrap Oscillator. Oscillator output for the external charge pump.
Overvoltage input to drive the upper DMOS
VBOOT
GND
5,6
15,16
1,10
11,20
Common Ground Terminal. In Powerdip and SO packages these pins are
used to dissipate the heat forward the PCB.
4/10
L6234
ELECTRICAL CHARACTERISTICS (Vs = 42V ; Tj = 25°C unless otherwise specified)
Symbol
Parameter
Supply Voltage
Test Condition
Min.
Typ.
Max.
Unit
VS
7
52
V
Vref
IS
Reference Voltage
10
V
mA
°C
ns
Quiescent Supply Current
Thermal Shutdown
6.5
TS
TD
150
Dead Time Protection
300
OUTPUT DMOS TRANSISTOR
Symbol
Parameter
Leakage Current
ON Resistance
Test Condition
Min.
Typ.
Max.
Unit
IDSS
1
mA
RDS (ON)
0.3
Ω
SOURCE DRAIN DIODE
Symbol
Parameter
Test Condition
ISD = 4A; EN = LOW
IF = 4A
Min.
Typ.
Max.
Unit
VSD
1.2
V
Forward ON Voltage
TRR
Tpr
900
200
ns
ns
Reverse Recovery Time
Forward Recovery Time
LOGIC LEVELS
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VINL, VENL
-0.3
0.8
V
Input LOW Voltage
V
INH, VENH
INL, IENL
INH, IENH
2
7
V
Input HIGH Voltage
Input LOW Current
Input HIGH Current
I
-10
A
µ
VIN,VEN = L
VIN,VEN = H
I
30
A
µ
CIRCUIT DESCRIPTION
L6234 is a triple half bridge designed to drive
brushlessDC motors.
Each half bridge has 2 power DMOS transistors
with RdsON = 0.3Ω. The 3 half bridges can be
controlled independentlyby means of the 3 inputs
IN1, IN2, IN3 and the 3 inputs EN1, EN2, and
EN3. An external connection to the 3 common
low side DMOS sources is provided to connect a
sensing resistor for constant current chopping ap-
plication.
The driving stage and the logic stage are de-
signed to work from 7V to 52V.
5/10
L6234
Figure 1. QuiescentCurrent vs. Supply Volt-
Figure 2. Normalized Quiescent Current vs.
switching frequency.
age.
Iq [mA]
10
Iq/(Iq@500Hz)
1.75
Tj = 130°C
9
Tj = -40°C
Tj = 25°C
8
1.5
Tj = 25°C
7
Tj = -40°C
Tj = 100°C
6
5
4
3
2
1
0
1.25
Tj = 130°C
1
0.75
0
8
1 6
2 4
V s [V]
32
4 0
4 8
0
10
20
30
fsw [kHz]
40
50
60
Figure 3. TypicalRDS (ON) vs. Supply Voltage.
Figure 4. Source Drain Forward ON voltage
vs. Junction Temperature.
R D S (O N )
VSD [V]
2
[ Ω ]
0 . 7
0 . 6
1.75
1.5
1.25
1
T j = 1 3 0 ° C
0 . 5
0 . 4
T j = 2 5 ° C
0 . 3
0.75
T j= - 4 0° C
0 . 2
0.5
Iout=4A
0 . 1
Io u t = 4 A
0.25
0
0
0
8
1 6
2 4
3 2
4 0
4 8
-50
-25
0
25
50
Tj [°C]
75
100
125
150
V s [V ]
Figure6. ReferenceVoltagevs. Supply Voltage.
Figure 5. Typical Diode Forward ON charac-
teristics
ISD [A]
5
Vref [V]
12
Tj = 25°C
10
8
4
DM O S (ON )
DM O S (OFF)
3
2
1
0
6
4
Tj = 25°C
2
0
0
0.5
1
1.5
2
0
10
20
30
Vs [V]
40
50
VSD [V]
6/10
L6234
Figure 8. PowerSO-20 Transient Thermal Re-
Figure 7. Reference Voltage vs. Junction Tem-
sistance
perature.
Vre f [V]
11
Vs = 52V
Vs = 24V
10
9
8
7
6
5
4
3
2
1
0
Vs = 10V
V s = 7V
-50
-25
0
2 5
50
7 5
100
125
150
T j [°C]
Figure 9. PowerSO-20 Thermal Resistance
Figure 10. PowerSO-20Thermal Resistance
(Mounted on FR4 monolayersubstrate)
(Mounted on Aluminium substrate)
Figure 11. PowerSO-20: with external heatsink
Figure 12. Thermal Impedance of PowerSO-20
and standard SO20
7/10
L6234
PowerSO-20PACKAGE MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
0.1
TYP.
MAX.
3.6
MIN.
MAX.
0.142
0.012
0.130
0.004
0.021
0.013
0.630
0.386
0.570
A
a1
a2
a3
b
0.3
0.004
3.3
0
0.1
0.000
0.016
0.009
0.622
0.370
0.547
0.4
0.53
0.32
16
c
0.23
15.8
9.4
D (1)
D1
E
9.8
13.9
14.5
e
1.27
0.050
0.450
e3
E1 (1)
E2
E3
G
11.43
10.9
11.1
2.9
0.429
0.437
0.114
0.244
0.004
0.626
0.043
0.043
5.8
0
6.2
0.228
0.000
0.610
0.1
H
15.5
15.9
1.1
h
L
0.8
1.1
0.031
N
10° (max.)
8° (max)
S
T
10
0.394
(1) ”D and F” do not include mold flash or protrusions.
- Mold flash or protrusions shall not exceed 0.15 mm (0.006”).
- Critical dimensions: ”E”, ”G” and ”a3”
R
N
N
a2
A
c
a1
b
e
DETAILB
DETAILA
E
e3
D
DETAILA
lead
20
11
slug
a3
DETAILB
0.35
E2
E1
Gage Plane
T
- C -
SEATING PLANE
S
L
G
C
(COPLANARITY)
1
10
PSO20MEC
h x 45°
8/10
L6234
POWERDIP 20 PACKAGE MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
0.51
0.85
TYP.
MAX.
1.40
MIN.
0.020
0.033
MAX.
a1
B
b
0.055
0.50
0.020
b1
D
E
0.38
0.50
0.015
0.020
0.976
24.80
8.80
2.54
0.346
0.100
0.900
e
e3
F
22.86
7.10
5.10
0.280
0.201
I
L
3.30
0.130
Z
1.27
0.050
9/10
L6234
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consequencesofuseofsuchinformationnorforanyinfringementofpatentsorotherrightsofthirdpartieswhichmayresultfromitsuse.No
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writtenapprovalofSGS-THOMSONMicroelectronics.
1998 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved
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