L9705D013TR [STMICROELECTRONICS]
SPECIALTY ANALOG CIRCUIT, PDSO20, SO-20;型号: | L9705D013TR |
厂家: | ST |
描述: | SPECIALTY ANALOG CIRCUIT, PDSO20, SO-20 光电二极管 |
文件: | 总8页 (文件大小:156K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
L9705
DOUBLE QUAD CONTACT INTERFACE CIRCUIT
■ OPERATING DC SUPPLY VOLTAGE RANGE
5V TO 25V
■ SUPPLY OVERVOLTAGE PULSE UP TO 40V
■ VERY LOW STAND-BY QUIESCENT
CURRENT, MAX 50µA
■ INTERNAL CLAMPING DIODES AT
CONTACT INPUTS TO Vs AND gnd WITH
PULSE CURRENT CAPABILITY UP TO
+50mA, -75mA
■ CHIP ENABLE FUNCTION AND
TRISTATE OUTPUTS FOR PARALLEL BUS
CONNECTION
DIP20
SO20
ORDERING NUMBERS:
L9705
L9705D
DESCRIPTION
■ NOMINAL CONTACT CURRENTS OF 10mA
The L9705 is a bipolar monolithic integrated circuit
for monitoring the status of up four contacts con-
nected to GND and up to four contacts connected
to the battery. The cntact sense input supply the
contact current and perform the contact resistance
comparison function.
DEFINED WITH EXTERNAL CONTACT
SERIES RESISTORS R
IN1-8
■ CONTACT STATUS MONITORING BY
MEANS OF COMPARING THE RESISTANCE
AT CONTACT SENSE INPUTS WITH THE
INTERNAL REFERENCE RESISTOR VALUE
At the output the contact status is translated into a
logical LOW level (contact closed) or logical HIGH
lel (contact open).
■ RESISTANCE COMPARING WITH
HYSTERESIS FOR HIGH NOISE IMMUNITY
AND IMMUNITY TO GROUND AND BATTERY
POTENTIAL DIFFERENCES
BLOCK DIAGRAM
November 2003
1/8
L9705
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
SDC
DC Supply Voltage
+26
V
Peak Transient Supply Voltage (t ≤ 400ms)
Logic Supply Voltage
+40
7
V
SP
V
V
CC
I
Input DC Current
±40
mA
mA
INDC
I
Input Pulse (t = 0 to 2ms; f≤ 0.2Hz; n = 25000)
-75 to 50
internally limited
INP
p
I
Output Current (V = 0 to 5.5V)
O
OUT
V
EN
Enable Input Voltage
V
CC
+0.3V;-0.3V
V
P
tot
Total Power Dissipation (T
= 80°C)
amb
DIP 20
SO 20
875
420
mW
mW
T
j
Junction Temperature Range
max 150
°C
PIN CONNECTION (Top view)
THERMAL DATA
Symbol
Parameter
DIP20
SO20
Unit
R
Thermal Resistance Junction to ambient
80
165
°C/W
th j-amb
2/8
L9705
ELECTRICAL CHARACTERISTCS
(V = 5 to 25V, V = 4.75 to 5.25V, V -0.5V < V ,< V -1V , T = –40 to 150°C unless otherwise
S
CC
bat
S
bat
j
specified.)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
V
Enable Input Voltage LOW
(device activated)
-0.3
0.8
V
ENL
V
Enable Input Voltage HIGH
2.4
V
CC
V
ENH
V
Enable Input Threshold
Hysteresis
200
420
-1
800
mV
ENh
I
Enable Input Current
2.4V < V < V
5
µA
µA
EN
EN
CC
-5
4
0V < V < 0.8V
EN
V
OUTH
Output Voltage HIGH
0 < I
< 100µA
V
-
V
CC
V
OUT
CC
0.1
I
Output Current
OUT status = HIGH; V
= 0
0.5
0.2
-5
2
mA
V
OUT
OUTL
OUT
OUT
V
I
Output Voltage LOW
Output Current
0.05
0.4
-20
0.5
I
OUT = -1mA
OUT status = LOW; V
0 < V < V
= 5.5V
mA
µA
V
OUT
I
Output Tristate Current
Input Voltage (device active)
OUT TS
OUT
CC
V
EN = LOW; R = 1KΩ
V - 2
S
V -
S
V -
S
IN 1,4
IN
1.5
0.4
V
Input Voltage (device active)
EN = LOW; R = 1KΩ
0.4
1.5
2
V
IN 5,8
IN
V
Input VoltageDuring Clamp
(device disabled)
EN = HIGH;
I
I
= 30mA
= -30mA
VS +0.3 V +1 V +2
V
V
IN
IN
S
S
-2
-1
-0.3
IN
R
R
Input Resistor LOW Threshold
(note 1)
5V < V <16V; ∆V
≤ 0.1V
1.8
4
KΩ
KΩ
KΩ
KΩ
IL 1,4
IL 5,8
IH 1,4
IH 5,8
S
GND
GND
GND
GND
GND
GND
S
S
S
S
S
S
∆V
≤ 0.1V
BAT
BAT
Input Resistor LOW Threshold
(note 1)
5V < V <16V; ∆V
≤ 0.1V
≤ 0.1V
≤ 0.1V
≤ 0.1V
≤ 0.1V
1.8
4.8
5.3
6.5
0.75
0.75
20
S
∆V
≤ 0.1V
BAT
BAT
R
R
Input Resistor HIGH Threshold
(note 1)
5V < V <16V; ∆V
20
29
S
∆V
≤ 0.1V
BAT
BAT
Input Resistor HIGH Threshold
(note 1)
5V < V <16V; ∆V
S
∆V
≤ 0.1V
BAT
BAT
R
Input Resistor Threshold Ratio
(note 1)
5V < V <16V; ∆V
0.65
0.65
0.85
0.85
40
IL
IH
S
∆V
≤ 0.1V
BAT
BAT
R
Input Resistor Threshold Ratio
(note 1)
5V < V <16V; ∆V
S
∆V
≤ 0.1V
BAT
BAT
I
Quiescent Current
EN = HIGH (t
>20µs)
µA
QC
ENH
V = 5 to 16V; T = -40 to 85°C
S
j
I
I
Quiescent Current
Quiescent Current
all contact open
10
35
25
5
µA
µA
µA
mA
mA
µs
QS
QS
all contact closed
∆V ≤ 0.1V
BAT
ΣI (2) Quiescent Current
IN
BAT
I
I
Quiescent Current
Quiescent Current
EN = LOW
EN = LOW
QC
QS
8
t
Delay Time/Output (EN LOW to
Output Data Ready) (note 3)
C
≤ 50pF
15+
3R ·CIN
IN
do
OUT
t
Delay Time/Tristate (EN HIGH to
Output Tristate) (note 3)
C
≤ 50pF
10
6
µs
dTS
OUT
t
Delay Time Input-Output (note 3) EN = LOW; C
≤ 50pF
OUT
ms
dIO
Notes: 1. The input resistor threshold value is a resistor value from the IN-pin to ground at which the corresponding output changes its status
(fig.4)
2. ΣIIN is the sum of the IN5 to IN8 input currents.
3. The delay times are defined from the crossing point of 50% initiating signal amplitude to the crossing point of 50% output signal
amplitude
3/8
L9705
Figure 1. Typical application diagram for the L9705 circuit. The current flowing in the arrow
direction is assumed positive. The external capacitors CIN and COUT represent the total
wiring capacitance at the corresponding pins.
FUNCTIONAL DESCRIPTION
The L9705 circuit monitors the status of the contacts which are connected through the series external re-
sistors R to the contact sense input pins. The contacts equivalent circuit is supposed to be as shown in
IN
fig.2 for GND connected contacts (IN 1 to 4) and as shown in fig. 3 for V
connected contacts (IN 5 to 8).
BAT
Figure 2. The contact sense input connection with the contact equivalent circuit for GND
connected contacts.
Figure 3. The contact sense input connection with the contact equivalent circuit for V
connected contacts.
BAT
4/8
L9705
The L9705 circuit compares the input current with the current through the internal reference resistor. The
device is designed to work with an external input series resistor of R
= 1KΩ. With this input resistor
IN1-8
the contact current, when the contact is closed and the device activated (EN =LOW) is:
V
– 2V
S
I
= -------------------- , for GND contacts, (1)
IN
1kΩ
V
+ ∆V
– 2V
BAT
BAT
I
= ---------------------------------------------------- , fro V
contacts, (2)
BAT
IN
1kΩ
For this calculation the limit value of the V to V and V saturation voltage of 2V was considered so that
S
IN
IN
the lowest limit value of I is calculated in (1) and (2)
IN
Figure 4. The output voltage as a function of the input resistance at the corresponding sense input.
The function of the circuit can be demonstrated with the transfer characteristics, showing the output status
as a function of the input resistor R , shown in figure 4. The input resistor is a sum of the R and the con-
I
IN
tact resistance R
or R
, for the closed contact:
COFF
CON
R = R + R , (3)
CON
I
IN
and for the open contact:
R = R + R , (4)
I
IN
COFF
The output goes HIGH when the input resistance increases above 5.3KΩ (GND contacts) or 6.5KΩ
(V contacts) and goes LOW, when the input resistance decreases below 4KΩ (GND contacts) or
BAT
4.8KΩ (V
contacts); these values are typical values for the switching thresholds. The limit values of R
I
BAT
= 1.8KΩ (GND contacts) and R = 1.8KΩ (V
contacts) for LOW and R = 20KΩ (GND contacts) and
I
BAT
I
29KΩ (V
contacts) for HIGH implies that a contact with R
= 100Ω ( at I = 10mA) will be recognized
CON IN
BAT
as ON = LOW and a contact with R
as OFF = HIGH.
= 19KΩ (GND contacts) or 28KΩ (V
contact) will be recognized
COFF
BAT
These limits are valid within the supply voltage range 6V ≤ V ≤ 16V, the ground potential difference of
S
∆V
= 0.1V , the battery voltage potential difference of ∆V
< 0.1V
and the variation of the re-
GND
S
BAT
BAT
verse battery protection diode D1 voltage from 0.5V to 1V.
The internal clamping diodes at the contact monitoring inputs together with the external contacts series
resistors R allows to withstand the transients at the contact connection.The contact series resistor R
IN
IN
limits the input current at the transient.
The dynamic behaviour of the circuit is defined with the times t and t . When the contact is open, the
do
dTS
input capacitor C must be charged through the resistor R . In this case the total delay time tdo may be
IN
IN
influenced also with the time constant R C .
IN IN
The delay time t , when disabling the device, is defined only with the internal circuitry. In both cases,
dTS
output external capacitance less than 50pF is assumed, the internal output capacitance of the tristate buff-
ers are less than 5pF.
5/8
L9705
mm
inch
OUTLINE AND
MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
a1
B
b
0.254
1.39
0.010
1.65 0.055
0.065
1.000
0.45
0.25
0.018
0.010
b1
D
E
e
25.4
8.5
2.54
22.86
0.335
0.100
0.900
e3
F
7.1
0.280
0.155
I
3.93
L
3.3
0.130
DIP20
Z
1.34
0.053
6/8
L9705
mm
inch
DIM.
OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN.
TYP. MAX.
0.104
A
A1
B
2.35
0.10
0.33
0.23
12.60
2.65 0.093
0.30 0.004
0.51 0.013
0.32 0.009
13.00 0.496
0.012
0.200
C
0.013
(1)
0.512
D
E
e
7.40
7.60 0.291
0.299
0.050
1.27
H
10.0
0.25
0.40
10.65 0.394
0.75 0.010
1.27 0.016
0˚ (min.), 8˚ (max.)
0.10
0.419
h
0.030
L
0.050
k
ddd
0.004
SO20
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
0016022 D
7/8
L9705
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
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