RHRXH162373K-01V [STMICROELECTRONICS]
Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs; 抗辐射低电压CMOS 16位D型锁存器(三态)与宽容3.6V的输入和输出型号: | RHRXH162373K-01V |
厂家: | ST |
描述: | Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs |
文件: | 总17页 (文件大小:509K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
54VCXH162373
Rad hard low voltage CMOS 16-bit D-type latch (3-state)
with 3.6V tolerant inputs and outputs
Features
■ 1.65 to 3.6V inputs and outputs
■ High speed:
– t = 3.3ns (Max) at V = 3.0 to 3.6V
PD
CC
– t = 4.5ns (Max) at V = 2.3 to 2.7V
PD
CC
■ Symmetrical impedance outputs:
– |I | = I = 12mA (Min) at V = 3.0V
Flat-48
OH
OL
CC
– |I | = I = 8mA (Min) at V = 2.3V
OH
OL
CC
Description
■ Power down protection on inputs and outputs
■ 26Ω serie resistors in outputs
The 54VCXH162373 is a low voltage CMOS 16
bit d-type latch with 3 state outputs non inverting
fabricated with sub-micron silicon gate and five-
■ Operating voltage range:
– V (Opr) = 1.65V to 3.6V
CC
2
layer metal wiring C MOS technology. It is ideal
■ Pin and function compatible with 54 SERIES
for low power and very high speed 1.65 to 3.6V
applications; it can be interfaced to 3.6V signal
environment for both inputs and outputs.
HR162373
■ Bus hold provided on both sides
■ Cold spare function
These 16 bit D-TYPE latches are bite controlled
by two latch enable inputs (nLE) and two output
enable inputs (OE).
■ Latch-up performance exceeds
300mA (JESD 17)
■ ESD performance:
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
When the nLE is taken low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state. Bus hold on data inputs is
provided in order to eliminate the need for
external pull-up or pull-down resistor. The device
circuits is including 26Ω series resistance in the
outputs. These resistors permit to reduce line
noise in high speed applications.
■ 300KRad Mil1019.6 Condition A, (RHA QML
qualification extension undergone)
■ No SEL, no SEU under 72 Mev/cm2/mg LET
heavy ions irradiation
■ QML qualified product
■ Device fully compliant with
DSCC SMD 5962-05211
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
July 2007
Rev 4
1/17
www.st.com
17
Contents
54VCXH162373
Contents
1
2
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
2.2
2.3
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
5
6
7
8
9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
54VCXH162373
Logic symbols and I/O equivalent circuit
1
Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Figure 2. Input and output equivalent circuit
3/17
Logic symbols and I/O equivalent circuit
Figure 3. Logic diagram
54VCXH162373
Note:
This logic diagram has not to be used to estimate propagation delays
4/17
54VCXH162373
Pin settings
2
Pin settings
2.1
Pin connection
Figure 4. Pin connection (top through view)
5/17
Pin settings
54VCXH162373
2.2
Pin description
Table 1. Pin description
Pin N°
Symbol
Name and function
3 state output enable input (Active
LOW)
1
1OE
2, 3, 5, 6, 8, 9, 11, 12
1Q0 to 1Q7
2Q0 to 2Q7
3-state outputs
3-state outputs
13, 14, 16, 17, 19, 20, 22, 23
3 state output enable input (Active
LOW)
24
2OE
25
2LE
2D0 to 2D7
1D0 to 1D7
1LE
Latch enable input
Data inputs
36, 35, 33, 32, 30, 29, 27, 26
47, 46, 44, 43, 41, 40, 38, 37
48
Data inputs
Latch enable input
Ground (0V)
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
GND
VCC
Positive supply voltage
2.3
Truth table
Table 2. Truth table
Inputs
Output
OE
H
LE
X
D
X
X
Q
Z
No change (1)
L
L
L
L
H
H
L
L
H
H
1. Q outputs are latched at the time when the LE input is taken low logic level.
Note:
X = Do not care; Z = High Impedance
6/17
54VCXH162373
Maximum rating
3
Maximum rating
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol
Parameter
Value
Unit
V
VCC
Supply voltage
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
-0.5 to VCC + 0.5
VI
VO
VO
IIK
DC input voltage
V
DC output voltage (OFF state)
V
DC output voltage (High or Low state) (1)
DC input diode current
V
- 50
- 50
± 50
mA
mA
mA
DC output diode current (2)
DC output current
IOK
IO
ICC or
IGND
DC VCC or ground current per supply pin
± 100
mA
PD
Tstg
TL
Power dissipation
400
-65 to +150
260
mW
°C
Storage temperature
Lead temperature (10 sec)
°C
1. IO absolute maximum rating must be observed
2. VO < GND, VO > VCC
3.1
Recommended operating conditions
Table 4. Recommended operating conditions
Symbol
Parameter
Value
Unit
VCC
Supply voltage
1.8 to 3.6
V
VI
Input voltage
-0.3 to 3.6
0 to 3.6
0 to VCC
± 12
V
V
VO
VO
Output voltage (OFF State)
Output voltage (High or Low State)
V
IOH, IOL High or low level output current (VCC = 3.0 to 3.6V)
OH, IOL High or low level output current (VCC = 2.3 to 2.7V)
mA
mA
°C
I
± 8
Top
Operating temperature
-55 to 125
0 to 10
Input rise and fall time (1)
dt/dv
ns/V
1. VIN from 0.8V to 2V at VCC = 3.0V
7/17
Electrical characteristics
54VCXH162373
4
Electrical characteristics
Table 5. DC specifications (2.7V < V < 3.6V unless otherwise specified)
CC
Test condition
Value
-55 to 125°C
Symbol
Parameter
Unit
VCC
(V)
Min
Max
VIH
VIL
High level input voltage
Low level input voltage
2.0
2.7 to 3.6
V
0.8
IO=-100 µA
VCC-0.2
2.2
2.7 to 3.6
2.7
IO=-6 mA
IO=-8 mA
IO=-12 mA
IO=100 µA
IO=6 mA
High level output
voltage
VOH
V
V
2.4
3.0
2.2
2.7 to 3.6
2.7
0.2
0.4
Low level output
voltage
VOL
IO=8 mA
0.55
0.8
3.0
2.7 to 3.6
3.0
IO=12 mA
VI = 0 to 3.6V
VI = 0.8V
II
Input leakage current
Input hold current
± 5
µA
µA
75
II(HOLD)
VI = 2V
-75
VI = 0 to 3.6V
3.6
0
± 500
Power Off leakage
current
Ioff
VI or VO = 0 to 3.6V
10
µA
µA
VI = VIH or VIL
VO = 0 to 3.6V
High impedance output
leakage current
IOZ
2.7 to 3.6
± 10
VI = VCC or GND
VI or VO = VCC to 3.6V
VIH = VCC - 0.6V
20
Quiescent supply
current
ICC
2.7 to 3.6
2.7 to 3.6
µA
µA
± 20
750
∆ICC
ICC incr. per Input
8/17
54VCXH162373
Electrical characteristics
Table 6. DC specifications (2.3V < V < 2.7V unless otherwise specified)
CC
Test condition
Value
Symbol
Parameter
-55 to 125 °C
Unit
VCC
(V)
Min
Max
VIH
VIL
High level input voltage
Low level input voltage
1.6
2.3 to 2.7
2.3 to 2.7
V
0.7
IO=-100 µA
VCC-0.2
2.0
IO=-4 mA
IO=-6 mA
VOH
High level output voltage
V
2.3
1.8
IO=-8 mA
1.7
IO=100 µA
IO=6 mA
2.3 to 2.7
2.3
0.2
0.4
0.6
± 5
VOL
Low level output voltage
V
IO=8 mA
II
VI = VCC or GND
VI = 0.7V
Input leakage current
Input hold current
2.3 to 2.7
2.3
µA
µA
45
II(HOLD)
VI = 1.7V
-45
Power Off leakage
current
Ioff
VI or VO = 0 to 3.6V
0
10
µA
µA
VI = VIH or VIL
VO = 0 to 3.6V
High impedance output
leakage current
IOZ
2.3 to 2.7
± 10
VI = VCC or GND
20
Quiescent supply
current
ICC
2.3 to 2.7
µA
VI or VO = VCC to 3.6V
± 20
Table 7. Dynamic switching characteristics
(T = 25°C, Input t = t = 2.0ns, C = 30pF, R = 500Ω)
A
r
f
L
L
Test condition
Value
TA = 25 °C
Symbol
Parameter
Unit
VCC
(V)
Min
Typ
0.25
0.35
-0.25
-0.35
2.05
2.65
Max
2.5
3.3
2.5
3.3
2.5
3.3
V
IL = 0V
Dynamic valley low voltage
quiet output (1) (2)
VOLV
VOHV
VOHV
V
V
V
VIH = VCC
VIL = 0V
VIH = VCC
Dynamic valley high voltage
quiet output (2) (3)
VIL = 0V
VIH = VCC
Dynamic valley high voltage
quiet output (2) (3)
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
2. Parameters guaranteed by design.
3. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the HIGH state.
9/17
Electrical characteristics
54VCXH162373
Table 8. AC electrical characteristics (C = 30pF, R = 500Ω, Input t = t = 2.0ns)
L
L
r
f
Test condition
Value
Symbol
Parameter
-55 to 125 °C
Unit
VCC
(V)
Min
1.0
0.8
1.0
0.8
1.0
0.8
1.0
0.8
1.0
1.0
1.5
1.5
1.5
1.5
Max
5.2
4.0
5.7
4.2
6.2
4.7
5.1
4.8
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
Propagation delay
time Dn to Qn
tPLH tPHL
ns
ns
ns
ns
ns
ns
ns
ns
Propagation delay
time LE to Qn
tPLH PHL
t
tPZL PZH
t
Output enable time
Output disable time
tPLZ PHZ
t
Setup tIme, HIGH or
LOW level Dn to LE
ts
th
tw
Hold time HIGH or
LOW level Dn to LE
LE pulse width, HIGH
0.5
0.5
Output to output skew
time (1) (2)
tOSLH OSHL
t
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|,
tOSHL = | tPHLm - tPHLn|)
2. Parameter guaranteed by design
Table 9. Capacitive characteristics
Test condition
VCC
Value
TA = 25 °C
Symbol
Parameter
Unit
(V)
Min
Typ
6
Max
CIN
VIN = 0 or VCC
VIN = 0 or VCC
Input capacitance
Output capacitance
2.5 or 3.3
2.5 or 3.3
pF
pF
COUT
7
fIN = 10MHz
VIN = 0 or VCC
Power dissipation
capacitance (1)
CPD
2.5 or 3.3
20
pF
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
10/17
54VCXH162373
Test circuit
5
Test circuit
Figure 5. Test circuit
Table 10. Test circuit
Test
Switch
tPLH, tPHL
Open
6V
t
PZL, tPLZ (VCC = 3.0 to 3.6V)
PZL, tPLZ (VCC = 2.3 to 2.7V)
t
2VCC
GND
tPZH, tPHZ
C = 30pF or equivalent (includes jig and probe capacitance)
L
R = R = 500Ω or equivalent
L
1
R = Z
of pulse generator (typically 50Ω)
T
OUT
11/17
Waveforms
54VCXH162373
6
Waveforms
Table 11. Waveform symbol value
Symbol
VCC
3.0 to 3.6V
2.3 to 2.7V
VIH
VM
VX
VY
2.7V
VCC
1.5V
VCC/2
VOL +0.3V
VOH -0.3V
VOL +0.15V
VOH -0.15V
Figure 6. Waveform - LE TO Qnpropagation delays, LE minimum pulse width, Dn to
LE setup and hold times (f = 1MHz; 50% duty cycle)
12/17
54VCXH162373
Waveforms
Figure 7. Waveform - output enable and disable time (f = 1MHz; 50% duty cycle)
Figure 8. Waveform - propagation delay time (f = 1MHz; 50% duty cycle)
13/17
Package mechanical data
54VCXH162373
7
Package mechanical data
54VCXH162373 Products are supplied into ceramic body / metal lid hermetic Flat 48-pin
space package
Table 12. Flat-48 (MIL-STD-1835) mechanical data
mm
inch
Typ
Dim.
Min
2.18
0.20
0.12
15.57
9.52
6.22
1.52
Typ
Max
2.72
0.30
0.18
15.92
9.78
6.48
1.78
Min
Max
A
b
2.47
0.254
0.15
15.75
9.65
6.35
1.65
0.635
0.20
8.38
0.79
0.43
0.086
0.008
0.005
0.613
0.375
0.245
0.060
0.097
0.010
0.006
0.620
0.380
0.250
0.065
0.025
0.008
0.330
0.031
0.017
0.107
0.012
0.007
0.627
0.385
0.255
0.070
c
D
E
E2
E3
e
f
L
6.85
0.66
0.25
9.40
0.92
0.61
0.270
0.026
0.010
0.370
0.036
0.024
Q
S1
Figure 9. Package dimension
7330585B
14/17
54VCXH162373
Order code
8
Order code
Table 13. Order code
Flight model
Engineering
Package Lead finish Radiation level
model
QML-V
RHFXH162373K-01V
QML-Q
Gold
Gold
300kRad
100kRad
100kRad
RHFXH162373K-01Q
RHRXH162373K1
Flat-48
RHRXH162373K-01V RHRXH162373K-01Q RHRXH162373K1
RHRXH162373K-02V RHRXH162373K-02Q Use the above one
Solder dip
15/17
Revision history
54VCXH162373
9
Revision history
Table 14. Revision history
Date
Revision
Changes
09-Jul-2004
17-May-2005
19-Jun-2006
30-Jul-2007
1
2
3
4
First release
SMD qualified
300Krad bullet updated, new template, mechanical data updated
Typo in Table 12 on page 14.
16/17
54VCXH162373
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17/17
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