ST1L04PT [STMICROELECTRONICS]
LOW QUIESCENT CURRENT VOLTAGE REGULATOR; 低静态电流稳压器
| 型号： | ST1L04PT |
| 厂家： | 
ST |
| 描述： | LOW QUIESCENT CURRENT VOLTAGE REGULATOR |
| 文件： | 总11页 (文件大小：559K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ST1L04
LOW QUIESCENT CURRENT VOLTAGE REGULATOR
I
I
I
I
ADJUSTABLE OUTPUT VOLTAGE FROM
0.8V to V -V
I
d
INTERNAL REFERENCE VOLTAGE
ACCURACY ± 2% AT 25°C
OUTPUT CURRENT CAPABILITY: 1A
MINIMUM
VERY LOW QUIESCENT CURRENT: MAX
3mA OVER TEMPERATURE RANGE
PPAK
I
I
MAXIMUM DROPOUT 1V (@ I =1A)
STABLE ONLY WITH LOW ESR CERAMIC
CAPACITORS
O
I
THERMAL SHUTDOWN PROTECTION
WITH HYSTERESIS
OVER CURRENT PROTECTION
OPERATING JUNCTION TEMPERATURE
RANGE: FROM 0 TO 125°C
junction temperature range. The ST1L04 is stable
only with low ESR output ceramic capacitors.
Internal protection circuitry includes thermal
protection with hysteresis and over current
limiting.
I
I
The ST1L04 is especially suitable for applications
requiring low voltage outputs from low voltage
inputs. Typical application for this product are,
notebook PCs, low voltage ASIC, VID power
supplies and low cost post regulation for 3.3V
output voltage switching regulators.
DESCRIPTION
The ST1L04 is a low drop adjustable linear
voltage regulator capable to supply up to 1A
output current.
The output voltage can be as low as 0.8V. The
quiescent current is well controlled and
maintained below 3mA over the whole allowed
Figure 1: Schematic Diagram
Rev. 1
1/11
February 2005
ST1L04
Table 1: Order Codes
TYPE
PPAK
ST1L04PT
ST1L04
Figure 2: Pin Connection (top view)
Table 2: Pin Description
PIN N°
NAME
FUNCTION
1
V
Supply voltage input pin. Bypass with a ceramic capacitor to GND
I
2
3
4
5
N.C.
GND
ADJ
Not connected.
Ground. The exposed metallic pad of the package is connected to GND.
Adjust voltage pin. External resistor divider connection.
Output voltage pin. Bypass with a ceramic capacitor to GND
V
O
Table 3: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
DC Supply Voltage
from GND-0.3 to 10
internally limited
internally limited
0 to +125
V
W
A
I
P
Power Dissipation
tot
I
Output Current
O
T
Operating Junction Temperature Range
Storage Temperature Range
°C
°C
op
T
-40 to +150
stg
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
Table 4: Thermal Data
Symbol
Parameter
PPAK
Unit
R
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
8
°C/W
°C/W
thj-case
R
100
thj-amb
2/11
ST1L04
Figure 3: Typical Application Schematic
NOTE: The adjustable output voltage is set by a resistor divider connected between V and GND with its centre tap connected to ADJ. The
O
voltage divider resistor are: R1 connected between V and ADJ and R2 connected between ADJ and GND. V is determined by V , R1,
O
O
REF
R2, I , as follows:
ADJ
V =V
(1+R1/R2)+I
R1
ADJ
O
REF
Since I
is very small and stable it can be ignored and the output voltage can be simply calculated as follows:
ADJ
V =V
(1+R1/R2)
REF
O
Table 5: Electrical Characteristics (refer to the typical application schematic, V =from 2.9 to 5.5V, I =
IN
O
from 10mA to 1A, C =4.7µF, C
=4.7µF, T =0 to 125°C, unless otherwise specified). Typical values
j
IN
OUT
are intended at T =25°C unless otherwise specified
j
Symbol
Parameter
Operating Input Voltage
Quiescent Current
Test Conditions
Min.
Typ.
Max.
Unit
V
V
2.8
I
I
3
mA
V
d
V
Reference Voltage
T = 25°C
0.784
0.776
0.8
0.8
0.816
0.824
0.8
REF
J
∆V
Line Regulation
I
= 10mA
O
%
%
O
∆V
Load Regulation
V = 3.3V
0.8
1
O
I
I
Adjustment Current
Adjustment Current change
I
= 10mA
µA
nA
µA
ADJ
O
I
200
100
∆ADJ
I
Minimum Output Current for
regulation
Omin
I
Output Current Limit
1
1.4
1
A
V
O
V
Dropout Voltage
I
= 1A, V = from 1.8 to 3.3V
O
d
O
(see note 1 and note 2)
SVR
Supply Voltage Rejection
(see note 2)
V = 3.3±0.5V,
f=120Hz
50
20
dB
I
I =10mA,
f=100kHz
O
T = 25°C
J
C
Ceramic Output capacitor value
Output Capacitor ESR value
2.2
µF
O
C
200
mΩ
ESR
eN
Output Noise Voltage (see note 2) B = from 10Hz to 10kHz,
V = 3.3V, I =10mA, T =25°C
0.003
%V
O
I
O
j
T
Thermal shutdown trip point
(see note 2)
V =3.3V
165
5
°C
°C
SH
HY
I
T
Thermal Shutdown hysteresis
(see note 2)
V =3.3V
I
NOTE 1: This parameter is the minimum input to output differential voltage required to maintain 1% regulation with respect to the V nominal
O
value. For V between 0.8V and 1.8V included, the V value is overridden by the minimum operating input voltage.
O
d
NOTE 2: Guaranteed by design. Not tested in production.
3/11
ST1L04
TYPICAL CHARACTERISTICS
Figure 4: Output Voltage vs Temperature
Figure 7: Load Regulation vs Temperature
Figure 8: Quiescent Current vs Temperature
Figure 9: Quiescent Current vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 6: Line Regulation vs Temperature
4/11
ST1L04
Figure 10: Quiescent Current vs Output Current
Figure 11: Quiescent Current vs Input Voltage
Figure 12: Dropout Voltage vs Temperature
Figure 13: Dropout Voltage vs Output Current
Figure 14: Supply Ripple Rejection vs
Temperature
Figure 15: Supply Ripple Rejection vs
Temperature
5/11
ST1L04
Figure 16: Supply Ripple Rejection vs Output
Figure 19: Adjustment Current change vs
Current
Temperature
Figure 17: Supply Ripple Rejection vs
Figure 20: Minimum Output Current for
Frequency
Regulation vs Temperature
Figure 18: Adjustment Current vs Temperature
Figure 21: Minimum Output Current for
Regulation vs Temperature
6/11
ST1L04
Figure 22: Load Transient
Figure 23: Line Transient
V =4V, I =10mA to 1A, C =4.7µF, C =4.7µF, T =25°C
V =3V to 5V, I =250mA, NO C , T =25°C, t =t =3µs
RISE FALL
I
O
O
I
J
I
O
I
J
7/11
ST1L04
PPAK MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A1
A2
B
2.2
0.9
0.03
0.4
5.2
0.45
0.48
6
2.4
1.1
0.23
0.6
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.015
0.204
0.017
0.019
0.236
0.094
0.043
0.009
0.023
0.212
0.023
0.023
0.244
B2
C
C2
D
D1
E
5.1
0.201
6.4
6.6
0.252
0.260
E1
e
4.7
0.185
0.050
1.27
G
4.9
5.25
2.7
10.1
1
0.193
0.093
0.368
0.206
0.106
0.397
0.039
0.039
G1
H
2.38
9.35
L2
L4
L5
L6
0.8
2.8
0.031
0.110
0.6
1
1
0.023
0.039
0078180-E
8/11
ST1L04
Tape & Reel DPAK-PPAK MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.0
13.2
0.504
0.795
2.362
0.512
D
N
T
22.4
7.00
10.60
2.75
4.1
0.882
0.2.76
0.417
0.105
0.161
0.319
Ao
Bo
Ko
Po
P
6.80
10.40
2.55
3.9
6.90
10.50
2.65
4.0
0.268
0.409
0.100
0.153
0.311
0.272
0.413
0.104
0.157
0.315
7.9
8.0
8.1
9/11
ST1L04
Table 6: Revision History
Date
Revision
Description of Changes
10-Feb-2005
1
First Release.
10/11
ST1L04
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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11/11
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