STA516BE13TR [STMICROELECTRONICS]
HALF BRIDGE BASED PRPHL DRVR;
| 型号： | STA516BE13TR |
| 厂家： | 
ST |
| 描述： | HALF BRIDGE BASED PRPHL DRVR 驱动 接口集成电路 |
| 文件： | 总20页 (文件大小：448K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STA516BE
500 W FFX digital amplifier power stage
Datasheet - production data
•
•
EMI compliant when used with
recommended system design
Automatic recovery mode after fault
conditions
Applications
•
•
•
Home theater
DVD receiver
Mini / Micro Audio systems
Description
STA516BE is a monolithic quad half-bridge stage
in Multipower BCD Technology. The device can
be used as dual bridge or reconfigured, by
connecting pin CONFIG to pins VDD, as a single
bridge with double-current capability or as a half
bridge (binary mode) with half-current capability.
Features
•
Output Power at 56 V supply voltage
−
2 x 250 W at 10% THD + N into 6 Ω
BTL
A cost-effective, high fidelity audio system can be
designed using ST chipset, including a modulator
(e.g. STA309A or STA321) and the STA516BE.
This system only requires a simple passive LC
demodulation filter to deliver high-quality, high
efficiency audio amplification with prove EMI
compliance. The efficiency of this digital amplifier
is greater than 90% into 8 Ω speakers, enabling
the use of smaller power supplies and heatsinks.
−
2 x 200 W at 10% THD + N into 8 Ω
BTL
−
−
−
4 x 130 W at 10% THD + N into 3 Ω SE
4 x 100 W at 10% THD + N into 4 Ω SE
1 x 480 W at 10% THD + N into 3 Ω
PBTL
−
1 x 380 W at 10% THD + N into 2 Ω
PBTL
•
Output Power at 52 V supply voltage
The STA516BE has an innovative integrated
protection system, safeguarding the device
against different fault conditions that could
damage the overall system.
−
2 x 200 W at 10% THD + N into 6 Ω
BTL
−
−
4 x 100 W at 10% THD + N into 3 Ω SE
1 x 400 W at 10% THD + N into 2 Ω
PBTL
Table 1: Device summary
•
•
•
•
< 0.1% THD + N at 1 W
Part number
Temperature
range
Package
Packing
PSO-36 thermally enhanced package
Minimum input / output pulse width distortion
High efficiency power stage (> 90%) with
190 mΩ RdsON
STA516BE13TR
0 to 90 °C
PowerSO36
EPU
Tape and
reel
•
•
CMOS compatible logic inputs
Integrated self protection circuits including
overtemperature, undervoltage, overvoltage,
overload, short-circuit
April 2014
DocID026166 Rev 1
1/20
www.st.com
This is information on a product in full production.
Contents
STA516BE
Contents
1
2
3
General information ........................................................................3
Pin description ................................................................................4
Electrical characteristics ................................................................6
3.1
Test circuits.......................................................................................9
4
5
Power supply and control sequencing ........................................10
Technical information ...................................................................12
5.1
5.2
5.3
5.4
5.5
Logic interface and decode.............................................................12
Protection circuitry...........................................................................13
Power outputs .................................................................................13
Parallel output / high current operation ...........................................13
Output filtering.................................................................................13
6
7
8
Audio application circuits.............................................................14
Package mechanical data .............................................................16
Revision history ............................................................................19
2/20
DocID026166 Rev 1
STA516BE
General information
1
General information
The STA516BE is a second generation, high performance, integrated stereo digital
amplifier power stage with improved protection system. It is capable of driving a 6 W bridge
tied load (BTL) at up 250 W per channel with very low noise at the output, low THD+N and
low idle power dissipation.
The STA516BE is available in PowerSO-36 slug up package.
The package contains a heat slug that is located on the top side of the device for
convenient thermal coupling to the heatsink.
DocID026166 Rev 1
3/20
Pin description
STA516BE
2
Pin description
Figure 1: Pin out
VCC_SIGN
VCC_SIGN
VSS
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
SUB_GND
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
N.C.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
VSS
IN2B
IN2A
IN1B
STA516BE
IN1A
TH_WARN
FAULT
TRISTATE
PWRDN
CONFIG
VL
VDD
VDD
GND_REG
GND_CLEAN
Table 2: Pin function
Pin
Name
GND_SUB
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT1B
Type
PWR Substrate ground
Output half bridge 2B
Description
1
2, 3
4
O
PWR Positive supply
PWR Negative supply
PWR Negative supply
PWR Positive supply
5
6
7
8, 9
O
O
Output half bridge 2A
Output half bridge 1B
10,
11
12
13
14
15
VCC1B
GND1B
GND1A
VCC1A
OUT1A
PWR Positive supply
PWR Negative supply
PWR Negative supply
PWR Positive supply
16,
17
O
Output half bridge 1A
18
19
20
N.C.
-
No internal connection
GND_CLEAN PWR Logical ground
GND_REG
VDD
PWR Ground for regulator VDD
PWR 5-V regulator referred to ground
21,
22
23
24
VL
PWR High logical state setting voltage, VL
CONFIG
I
Configuration pin:
0: normal operation
4/20
DocID026166 Rev 1
STA516BE
Pin description
Pin
Name
PWRDN
Type
Description
1: bridges in parallel (OUT1A = OUT1B, OUT2A = OUT2B (If IN1A
= IN1B, IN2A = IN2B))
25
I
Standby pin:
0: low-power mode
1: normal operation
26
27
28
TRISTATE
FAULT
I
Hi-Z pin:
0: all power amplifier outputs in high impedance state
1: normal operation
O
O
Fault pin advisor (open-drain device, needs pull-up resistor):
0: fault detected (short circuit or thermal, for example)
1: normal operation
TH_WARN
Thermal warning advisor (open-drain device, needs pull-up resistor):
0: temperature of the IC >130 °C
1: normal operation
29
30
31
32
IN1A
IN1B
IN2A
IN2B
VSS
I
I
I
I
Input of half bridge 1A
Input of half bridge 1B
Input of half bridge 2A
Input of half bridge 2B
33,
34
PWR 5-V regulator referred to +VCC
35,
36
VCC_SIGN
PWR Signal positive supply
DocID026166 Rev 1
5/20
Electrical characteristics
STA516BE
3
Electrical characteristics
Table 3: Absolute maximum ratings
Symbol
VCC_MAX
Vmax
Parameter
Value
Unit
V
DC supply voltage (pins 4, 7, 12, 15)
65
Maximum voltage on pins 23 to 32
Operating junction temperature
Storage temperature
5.5
V
Tj_MAX
Tstg
0 to 150
°C
°C
-40 to 150
Stresses beyond those listed under “Absolute maximum ratings” make cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated
under “Recommended operating condition” are not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. In
the real application, power supply with nominal value rated inside recommended
operating conditions, may experience some rising beyond the maximum operating
condition for short time when no or very low current is sinked (amplifier in mute
state). In this case the reliability of the device is guaranteed, provided that the
absolute maximum rating is not exceeded.
Table 4: Thermal data
Symbol
Tj-case
Twarn
TjSD
Parameter
Min
Typ
Max
2.5
Unit
°C/W
°C
Thermal resistance junction to case (thermal pad)
Thermal warning temperature
-
-
-
-
1
130
150
25
-
-
-
Thermal shut-down junction temperature
Thermal shut-down hysteresis
°C
thSD
°C
Table 5: Recommended operating conditions
Symbol
VCC
Parameter
Min
10
Typ
Max
60
90
Unit
V
Supply voltage for pins PVCCA, PVCCB
Ambient operating temperature
-
-
Tamb
0
°C
Unless otherwise stated, the test conditions for Table 6: "Electrical characteristics " below
are VL = 3.3 V, VCC = 50 V and Tamb = 25 °C
Table 6: Electrical characteristics
Symbol
Parameter
Test conditions
Idd = 1 A
Min
Typ
Max
Unit
RdsON
Power P-channel/N-
-
190 240
mΩ
channel MOSFET RdsON
Idss
gN
Power P-channel/N-
channel leakage Idss
-
-
-
-
50
-
µA
%
Power P-channel RdsON
matching
Idd = 1 A
95
6/20
DocID026166 Rev 1
STA516BE
Electrical characteristics
Symbol
Parameter
Test conditions
Idd = 1 A
Min
Typ
Max
Unit
gP
Power N-channel RdsON
matching
95
-
-
%
Dt_s
Dt_d
Low current dead time
(static)
see Figure 2: "Test
circuit"
-
10
-
20
50
ns
ns
High current dead time
(dynamic)
L = 22 µH, C = 470 nF
RL = 8 Ω, Idd = 4.5 A
see Figure 3: "Current
dead-time test circuit"
-
td ON
td OFF
tr
Turn-on delay time
Turn-off delay time
Rise time
Resistive load
Resistive load
Resistive load
-
-
-
-
-
-
100
100
25
ns
ns
ns
see Figure 2: "Test
circuit"
tf
Fall time
Resistive load
-
-
-
25
ns
see Figure 2: "Test
circuit"
VIN-High
VIN-Low
High level input voltage
Low level input voltage
-
-
-
VL / 2 +
300 mV
V
V
-
VL / 2 -
-
300 mV
IIN-H
High level input current
Low level input current
VIN = VL
-
-
-
1
-
-
-
µA
µA
µA
IIN-L
VIN = 0.3 V
VL = 3.3 V
1
IPWRDN-H
High level PWRDN pin
input current
35
VLow
VHigh
IVCC-
Low logical state voltage
VL = 3.3 V
0.8
-
-
V
(pins PWRDN,
TRISTATE) (seeTable 7:
"Threshold switching
voltage variation with
voltage on pin VL")
High logical state voltage
VL = 3.3 V
1.7
V
(pins PWRDN,
TRISTATE) (seeTable 7:
"Threshold switching
voltage variation with
voltage on pin VL")
Supply current from VCC in VPWRDN = 0 V
-
-
-
2.4
-
mA
mA
PWRDN power down
IFAULT
Output current on pins
Vpin = 3.3 V
1
FAULT, TH_WARN with
fault condition
IVCC-HiZ
IVCC
Supply current from VCC in VTRISTATE = 0 V
tristate
-
-
22
70
-
-
mA
mA
Supply current from VCC in Input pulse width
operation, both channels
switching)
= 50% duty,
switching frequency
= 384 kHz,
no LC filters
DocID026166 Rev 1
7/20
Electrical characteristics
Symbol
STA516BE
Parameter
Test conditions
Min
8.5
Typ
Max
11
Unit
IOCP
Overcurrent protection
threshold Isc (short-circuit
current limit) (1)
-
9.5
A
VUVP
VOVP
tpw_min
Undervoltage protection
threshold
-
-
-
7
-
V
Overvoltage protection
threshold
61
50
62.5
-
V
Output minimum pulse
width
No load
110
ns
Notes:
(1)See specific application note number: AN1994
Table 7: Threshold switching voltage variation with voltage on pin VL
Voltage on pin VL, VL VLOW max VHIGH min
Unit
2.7
3.3
5.0
1.05
1.4
1.65
1.95
2.8
V
V
V
2.2
Table 8: Logic truth table
Pin
TRISTATE
Inputs as per Figure 3:
"Current dead-time test
circuit"
Transistors as per Figure 3:
"Current dead-time test circuit"
Output
mode
INxA
INxB
Q1
Off
Q2
Off
Q3
Off
Q4
Off
0
x
0
0
1
1
x
0
1
0
1
Hi Z
1
1
1
1
Off
Off
On
On
Off
On
Off
On
On
On
Off
Off
On
Off
On
Off
Dump
Negative
Positive
Not used
8/20
DocID026166 Rev 1
STA516BE
Electrical characteristics
3.1
Test circuits
Figure 2: Test circuit
OUTxY
Vcc
(3/4)Vcc
Low current dead time = MAX(DTr, DTf)
(1/2)Vcc
(1/4)Vcc
+Vcc
t
DTr
DTf
Duty cycle = 50%
INxY
M58
M57
OUTxY
R 8Ω
+
-
V67 =
vdc = Vcc/2
gnd
D03AU1458
Figure 3: Current dead-time test circuit
High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+VCC
Duty cycle=A
Duty cycle=B
DTout(A)
M58
M64
M63
Q1
OUTxA
Iout=4.5A
Q2
Q4
DTin(A)
INxA
DTout(B)
DTin(B)
INxB
Rload=8W
C71 470nF
OUTxB
L67 22m
L68 22m
Iout=4.5A
M57
Q3
C69
470nF
C70
470nF
Duty cycle A and B: Fixed to have DC output current of 4.5A in the direction shown in figure
D00AU1162
DocID026166 Rev 1
9/20
Power supply and control sequencing
STA516BE
4
Power supply and control sequencing
To guarantee correct operation and reliability, the recommended power-on sequence as
given below should be followed:
•
•
Apply VCC and VL, in any order, keeping PWRDN low in this phase
Release PWRDN from low to high, keeping TRISTATE low (until VDD and VSS are
stable)
•
Release TRISTATE from low to high
Always maintain PWM inputs INxy < VL.
Figure 4: Power-ON sequence
VCC should be turned on before VL. This prevents uncontrolled current flowing through the
internal protection diode connected between VL (logic supply) and VCC (high power supply).
which could result in damage to the device.
PWRDN must be released after VL is switched on. An input signal can then be sent to the
power stage.
10/20
DocID026166 Rev 1
STA516BE
Power supply and control sequencing
Figure 5: Power-OFF sequence
DocID026166 Rev 1
11/20
Technical information
STA516BE
5
Technical information
The STA516BE is a dual channel H-bridge that is able to deliver 200 W per channel (into
RL = 6 W with THD = 10% and VCC = 51V) of audio output power very efficiently. It operates
in conjunction with a pulse-width modulator driver such as the STA321 or STA309A.
The STA516BE converts ternary, phase-shift or binary-controlled PWM signals into audio
power at the load. It includes a logic interface, integrated bridge drivers, high efficiency
MOSFET outputs and thermal and short-circuit protection circuitry.
In differential mode (ternary, phase-shift or binary differential), two logic level signals per
channel are used to control high-speed MOSFET switches to connect the speaker load to
the input supply or to ground in a bridge configuration, according to the damped ternary
modulation operation.
In binary mode, both full bridge and half bridge modes are supported. The STA516BE
includes overcurrent and thermal protection as well as an undervoltage lockout with
automatic recovery. A thermal warning status is also provided.
Figure 6: Block diagram of full-bridge FFX® or binary mode
INL[1,2]
INR[1,2]
VL
Logic
OUTPL
OUTNL
interface
and
decode
Left
H-bridge
PWRDN
TRISTATE
OUTPR
OUTNR
FAULT
Protection
Regulators
Right
H-bridge
THWARN
Figure 7: Block diagram of binary half-bridge mode
INL[1,2]
INR[1,2]
VL
LeftA
Logic
OUTP L
OUTN L
½-bridge
interface
and
PWRDN
TRISTATE
LeftB
decode
½-bridge
RightA
½-bridge
OUTP R
OUTN R
FAULT
Protection
Regulators
THWARN
RightB
½-bridge
5.1
Logic interface and decode
The STA516BE power outputs are controlled using one or two logic-level timing signals. In
order to provide a proper logic interface, the VL input must operate at the same voltage as
the FFX control logic supply.
12/20
DocID026166 Rev 1
STA516BE
Technical information
5.2
Protection circuitry
The STA516BE includes protection circuitry for overcurrent and thermal overload
conditions. A thermal warning pin (THWARN, pin 28, open drain MOSFET) is activated low
when the IC temperature exceeds 130 °C, just in advance of thermal shutdown. When a
fault condition is detected an internal fault signal immediately disables the output power
MOSFETs, placing both H-bridges in a high-impedance state. At the same time the
opendrain MOSFET of pin FAULT (pin 27) is switched on.
There are two possible modes subsequent to activating a fault.
•
•
•
Shutdown mode: with pins FAULT (with pull-up resistor) and TRISTATE separate, an
activated fault disables the device, signaling a low at pin FAULT output.
The device may subsequently be reset to normal operation by toggling pin TRISTATE
from high to low to high using an external logic signal.
Automatic recovery mode: This is shown in the applications circuits below where
pins FAULT and TRISTATE are connected together to a timeconstant circuit (R59 and
C58).
•
•
•
An activated fault forces a reset on pin TRISTATE causing normal operation to
resume following a delay determined by the time constant of the circuit.
If the fault condition persists, the circuit operation repeats until the fault condition is
cleared.
An increase in the time constant of the circuit produces a longer recovery interval.
Care must be taken in the overall system design not to exceed the protection
thresholds under normal operation.
5.3
5.4
Power outputs
The STA516BE power and output pins are duplicated to provide a low-impedance path for
the device bridged outputs. All duplicate power, ground and output pins must be connected
for proper operation.
The PWRDN or TRISTATE pin should be used to set all power MOSFETs to the
highimpedance state during power-up until the logic power supply, VL, has settled.
Parallel output / high current operation
When using the FFX mode output, the STA516BE outputs can be connected in parallel in
order to increase the output current capability to a load. In this configuration the STA516BE
can provide up to 240 W into a 3 Ω load.
This mode of operation is enabled with the pin CONFIG (pin 24) connected to pin VDD.
The inputs are joined so that IN1A = IN1B, IN2A = IN2B and similarly the outputs
OUT1A = OUT1B, OUT2A = OUT2B as shown in Figure 9: "Typical Mono-BTL (PBTL)
configuration".
5.5
Output filtering
A passive 2nd-order filter is used on the STA516BE power outputs to reconstruct the
analog audio signal. System performance can be significantly affected by the output filter
design and choice of passive components. A filter design for 6 or 8 Ω loads is shown in the
application circuit of Figure 8: "Typical Audio Application circuit (dual BTL)", and for 3 or 4
Ω loads in Figure 9: "Typical Mono-BTL (PBTL) configuration" and Figure 10: "Typical quad
half-bridge configuration (Quad Single Ended)".
DocID026166 Rev 1
13/20
Audio application circuits
STA516BE
6
Audio application circuits
Figure 8: "Typical Audio Application circuit (dual BTL)" shows a stereo-BTL configuration
capable of giving 210 W per channel into a 6 Ω load at 10% THD with VCC = 52 V. This
result was obtained using the STA309A+STA516B demo board.
Figure 8: Typical Audio Application circuit (dual BTL)
+VCC
V
CC 1A
15
17
16
C30
1mF
C55
1000 mF
IN1A
29
M3
M2
M5
M4
IN1A
L18 22 mH
V
L
23
24
+3.3V
OUT1A
OUT1A
C20
100nF
CONFIG
C52
PWRDN
PWRDN
FAULT
25
C99
100nF
14
12
GND1A
R98
6
330pF
PROTECTIONS
R57
10K
R59
10K
27
26
&
C23
470nF
C101
8W
LOGIC
VCC 1B
R63
20
R100
6
TRI-STATE
C58
100nF
C31
1mF
100nF
11
10
C21
100nF
TH_WAR
IN1B
28
30
OUT1B
OUT1B
GND1B
TH_WAR
L19 22 mH
IN1B
VDD
VDD
VSS
VSS
21
22
33
34
13
7
REGULATORS
V
CC 2A
C32
1mF
M17
M15
M16
M14
C58
100nF
C53
100nF
L113 22 mH
V
CC SIGN
8
9
35
OUT2A
OUT2A
C60
100nF
C110
100nF
VCC SIGN
36
31
20
19
C109
330pF
C107
100nF
6
4
GND2A
R103
6
IN2A
IN2A
C108
470nF
C106
100nF
8W
GND-Reg
V
CC 2B
R104
20
R102
6
GND-Clean
C33
1mF
3
2
C111
OUT2B
OUT2B
GND2B
100nF
IN2B
IN2B
32
1
L112 22 mH
GNDSUB
5
D00AU1148B
Figure 9: "Typical Mono-BTL (PBTL) configuration" below shows a single-BTL configuration
capable of giving 400 W into a 3 Ω load at 10% THD with VCC = 52 V. STA516BE can also
drive 2 Ω speakers as single-BTL configuration, to provide up to 280 W per channel at
10% THD with VCC = 37 V.
Figure 10: "Typical quad half-bridge configuration (Quad Single Ended)" below shows a
quad-SE configuration capable of giving 110 W into a 3 Ω load at 10% THD with VCC = 54
V. STA516BE can also drive 2 Ω speakers as quad-SE configuration, to provide up to 80 W
per channel at 10% THD with VCC = 38 V.
All results were obtained using the STA309A+STA516B demo board. Note that a PWM
modulator as driver is required to feed the STA516BE.
14/20
DocID026166 Rev 1
STA516BE
Audio application circuits
Figure 9: Typical Mono-BTL (PBTL) configuration
V
L
+3.3V
23
18
N.C.
12 mH
100nF
GND-Clean
GND-Reg
17
16
OUT1A
OUT1A
19
20
100nF
FILM
11
10
100nF
X7R
10K
100nF
X7R
OUT1B
OUT1B
OUT2A
OUT2A
22 W
1/2W
6.2
1/2W
VDD
VDD
21
22
24
680nF
FILM
100nF
4W
6.2
1/2W
CONFIG
9
8
330pF
X7R
+36V
+36V
TH_WAR
PWRDN
FAULT
TH_WAR
OUT2B
OUT2B
28
25
100nF
FILM
3
2
nPWRDN
12 mH
10K
VCC1A
27
26
15
TRI-STATE
IN1A
1mF
X7R
2200 mF
63V
100nF
V
CC1B
29
30
31
32
12
7
IN1B
IN1A
IN1B
VCC2A
IN2A
IN2B
1mF
X7R
VSS
VSS
VCC2B
33
34
4
14
13
GND1A
GND1B
100nF
X7R
VCCSIGN
35
100nF
X7R
VCCSIGN
GNDSUB
GND2A
GND2B
36
1
6
5
Add.
D04AU1545
Figure 10: Typical quad half-bridge configuration (Quad Single Ended)
+VCC
C21
VCC1P
15
IN1A
29
M3
M2
M5
M4
R61
5K
2200mF
IN1A
C31 820mF
L11 22mH
17
16
V
L
23
24
+3.3V
OUTPL
C71
100nF
CONFIG
PWRDN
FAULT
R41
20
C91
1mF
4W
OUTPL
PWRDN
25
C81
100nF
14
12
PGND1P
R51
6
R62
5K
C41
330pF
PROTECTIONS
R57
10K
R59
10K
27
26
&
LOGIC
VCC1N
TRI-STATE
C58
100nF
C51
1mF
C61
100nF
11
10
R63
5K
TH_WAR
IN1B
28
30
OUTNL
C32 820mF
L12 22mH
TH_WAR
OUTNL
C72
100nF
R42
20
IN1B
C92
1mF
4W
VDD
VDD
VSS
VSS
21
22
33
34
13
7
PGND1N
C82
100nF
R52
6
R64
5K
C42
330pF
REGULATORS
VCC2P
M17
M15
M16
M14
R65
5K
C58
100nF
C53
100nF
C33 820mF
L13 22mH
VCCSIGN
VCCSIGN
8
9
35
OUTPR
C60
100nF
C73
100nF
R43
20
C93
1mF
4W
36
31
20
19
OUTPR
C83
100nF
6
4
PGND2P
R53
6
R66
5K
IN2A
IN2B
C43
330pF
IN2A
GND-Reg
VCC2N
GND-Clean
C52
1mF
C62
100nF
3
2
R67
5K
OUTNR
C34 820mF
L14 22mH
IN2B
32
1
OUTNR
C74
100nF
R44
20
GNDSUB
C94
1mF
4W
5
PGND2N
C84
100nF
R54
6
R68
5K
C44
330pF
D03AU1474
For more information, refer to the application note AN1994.
DocID026166 Rev 1
15/20
Package mechanical data
STA516BE
7
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
16/20
DocID026166 Rev 1
STA516BE
Package mechanical data
Figure 11: PowerSO36 exposed pad up outline drawing
DocID026166 Rev 1
17/20
Package mechanical data
STA516BE
Max
Table 9: PowerSO36 exposed pad up dimensions
mm
Symbol
inch
Typ
Min
3.25
3.10
Typ
Max
Min
0.128
0.122
0.031
-
A
-
-
-
3.43
3.20
1.00
-
-
-
-
0.135
A2
A4
A5
a1
b
0.126
0.039
-
0.80
-
0.20
0.008
0.03
-
-0.04
0.38
0.32
16.00
9.80
-
0.001
0.009
0.009
0.622
0.370
-
-
-0.002
0.015
0.013
0.630
0.386
-
0.22
-
-
c
0.23
-
-
D
15.80
-
-
D1
D2
E
9.40
-
-
-
1.00
0.039
13.90
-
14.50
11.10
2.90
6.20
3.20
-
0.547
0.429
-
-
0.571
0.437
0.114
0.244
0.126
-
E1
E2
E3
E4
e
10.90
-
-
-
-
-
5.80
-
0.228
0.114
-
-
2.90
-
-
-
0.65
0.026
e3
G
-
11.05
-
-
0.435
-
0
-
0.08
15.90
1.10
1.10
2.60
0
-
0.003
0.626
0.043
0.043
0.102
10 degrees
-
H
15.50
-
0.610
-
-
h
-
-
-
L
0.80
-
0.031
0.089
-
-
M
N
2.25
-
-
-
-
-
-
10 degrees
-
-
R
0.6
-
-
0.024
-
s
8 degrees
-
8 degrees
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DocID026166 Rev 1
STA516BE
Revision history
8
Revision history
Table 10: Document revision history
Revision
Date
Changes
Initial release.
02-Apr-2014
1
DocID026166 Rev 1
19/20
STA516BE
Please Read Carefully
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