STD12N10L [STMICROELECTRONICS]
N - CHANNEL 100V - 0.12 ohm - 12A TO-252 LOW THRESHOLD POWER MOS TRANSISTOR; N - CHANNEL 100V - 0.12欧姆 - 12A TO- 252低阈值功率MOS晶体管
| 型号： | STD12N10L |
| 厂家： | 
ST |
| 描述： | N - CHANNEL 100V - 0.12 ohm - 12A TO-252 LOW THRESHOLD POWER MOS TRANSISTOR |
| 文件： | 总6页 (文件大小：48K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STD12N10L
N - CHANNEL 100V - 0.12 Ω - 12A TO-252
LOW THRESHOLD POWER MOS TRANSISTOR
TYPE
VDSS
RDS(on)
ID
STD12N10L
100 V
< 0.15 Ω
12 A
■
■
■
■
■
■
■
TYPICAL RDS(on) = 0.12 Ω
AVALANCHERUGGED TECHNOLOGY
100% AVALANCHE TESTED
HIGH CURRENT CAPABILITY
175 oC OPERATING TEMPERATURE
LOW THRESHOLD DRIVE
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
3
1
DPAK
TO-252
(Suffix ”T4”)
APPLICATIONS
■
■
■
■
■
HIGH CURRENT, HIGH SPEED SWITCHING
SOLENOID AND RELAY DRIVERS
MOTOR CONTROL, AUDIO AMPLIFIERS
DC-DC & DC-AC CONVERTERS
AUTOMOTIVE ENVIRONMENT(INJECTION,
ABS, AIR-BG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
VGS
ID
Parameter
Value
100
Unit
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 kΩ)
Gate-source Voltage
V
V
100
15
V
±
o
Drain Current (continuous) at Tc = 25 C
12
A
o
ID
Drain Current (continuous) at Tc = 100 C
8
48
A
I
DM(• )
Drain Current (pulsed)
A
o
Ptot
Total Dissipation at Tc = 25 C
50
W
Derating Factor
0.33
W/oC
oC
oC
Tstg
Tj
Storage Temperature
-65 to 175
175
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
1/9
November 1999
STD12N10L
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Rthj-amb Thermal Resistance Junction-ambient
Rthc-sink Thermal Resistance Case-sink
Max
Max
Typ
3
oC/W
oC/W
oC/W
oC
100
1.5
275
Tl
Maximum Lead Temperature For Soldering Purpose
(Tcase = 25 oC unless otherwisespecified)
ELECTRICAL CHARACTERISTICS
OFF
Symbol
V(BR)DSS Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (VGS = 0) VDS = Max Rating
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
ID = 250
A
VGS = 0
100
V
µ
IDSS
IGSS
VDS = Max Rating
1
10
A
µ
µA
o
Tc = 125 C
Gate-body Leakage
Current (VDS = 0)
VGS = ± 15 V
± 100
nA
ON ( )
Symbol
VGS(th)
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Gate Threshold Voltage VDS = VGS ID = 250 µA
1
1.6
2.5
V
RDS(on)
Static Drain-source On VGS = 10V ID = 6 A
0.12
0.17
0.15
0.2
Ω
Ω
Resistance
VGS = 5V
ID = 6 A
ID(on)
On State Drain Current VDS > ID(on) x RDS(on)max
VGS = 10 V
12
A
DYNAMIC
Symbol
Parameter
Forward
Test Conditions
Min.
Typ.
Max.
Unit
gfs ( )
VDS > ID(on) x RDS(on)max ID = 6 A
6.5
10
S
Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25 V f = 1 MHz VGS = 0
800
150
50
pF
pF
pF
2/9
STD12N10L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
td(on)
tr
Turn-on Delay Time
Rise Time
VDD = 50 V
RG = 4.7
ID = 6 A
VGS = 5 V
15
40
ns
ns
Ω
(Resistive Load, see fig. 3)
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 80 V ID = 12 A VGS = 5 V
20
6
10
30
nC
nC
nC
SWITCHING OFF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD = 80 V
RG = 4.7 Ω
(Inductive Load, see fig. 5)
ID = 12 A
VGS = 5 V
12
12
25
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
ISD
ISDM (• )
Source-drain Current
Source-drain Current
(pulsed)
12
48
A
A
VSD ( ) Forward On Voltage
ISD = 12 A VGS = 0
1.5
V
trr
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 12 A
VDD = 30 V
(see test circuit, fig. 5)
di/dt = 100 A/ s
145
580
8
ns
µ
Tj = 150 oC
Qrr
C
µ
IRRM
A
( ) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
µ
(•) Pulse width limited by safe operating area
3/9
STD12N10L
Fig. 1:
Fig. 2:
UnclampedInductive Waveform
Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Fig. 4: Gate Charge test Circuit
Resistive Load
Fig. 5:
Test Circuit For InductiveLoad Switching
And Diode Recovery Times
4/9
STD12N10L
TO-252 (DPAK) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
2.2
TYP.
MAX.
2.4
MIN.
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
0.252
0.173
0.368
MAX.
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.260
0.181
0.397
A
A1
A2
B
0.9
1.1
0.03
0.64
5.2
0.23
0.9
B2
C
5.4
0.45
0.48
6
0.6
C2
D
0.6
6.2
E
6.4
6.6
G
4.4
4.6
H
9.35
10.1
L2
L4
0.8
0.031
0.6
1
0.023
0.039
H
DETAIL ”A”
D
L2
DETAIL ”A”
L4
0068772-B
5/9
STD12N10L
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of use of such information nor for any infringement of patents or other rights of third parites which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publication are
subject tochange without notice. This publication supersedes and replaces all informaiton previouslysupplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systemswithout express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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.
6/9
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