STP16DP05 [STMICROELECTRONICS]
Low voltage 16-bit constant current LED sink driver with outputs error detection; 低电压16位恒流输出误差检测LED驱动器
| 型号： | STP16DP05 |
| 厂家： | 
ST |
| 描述： | Low voltage 16-bit constant current LED sink driver with outputs error detection |
| 文件： | 总28页 (文件大小：599K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STP16DP05
Low voltage 16-bit constant current
LED sink driver with outputs error detection
Features
■ Low voltage power supply down to 3V
■ 16 constant current output channels
■ Adjustable output current through external
SO-24
resistor
■ Short and open output error detection
■ Serial Data IN/Parallel data OUT
■ 3.3V micro driver-able
TSSOP24
TSSOP24
(exposed pad)
■ Output current: 5-100mA
■ 30MHz clock frequency
The data detection results are loaded in the shift
register and shifted out via the serial line output.
■ Available in high thermal efficiency TSSOP
exposed pad
The detection functionality is implemented without
increasing the pin count number, through a
secondary function of the output enable and latch
pin (DM1 and DM2 respectively), a dedicated
logic sequence allows the device to enter or leave
from detection mode. Through an external
resistor, users can adjust the STP16DP05 output
current, controlling in this way the light intensity of
LEDs, in addition, user can adjust LED’s
brightness intensity from 0% to 100% via OE/DM2
pin.
■ ESD protection 2.5kV HBM, 200V MM
Description
The STP16DP05 is a monolithic, low voltage, low
current power 16-bit shift register designed for
LED panel displays. The device contains a 16-bit
serial-in, parallel-out shift register that feeds a 16-
bitD-type storage register. In the output stage,
sixteen regulated current sources were designed
to provide 5-100mA constant current to drive the
LEDs.
The STP16DP05 guarantees a 20V output driving
capability, allowing users to connect more LEDs in
series. The high clock frequency, 30MHz, makes
the device suitable for high data rate
transmission. The 3.3V voltage supply is well
useful for applications that interface any 3.3V
micro. Compared with a standard TSSOP
package, the TSSOP exposed pad increases heat
dissipation capability by a 2.5 factor.
The STP16DP05 features open and short LED
detections on the outputs.The STP16DP05 is
backward compatible with STP16C/L596.The
detection circuit checks 3 different conditions that
can occur on the output line: short to GND, short
to V or open line.
O
Table 1.
Device summary
Order codes
Package
Packaging
STP16DP05MTR
STP16DP05TTR
STP16DP05XTTR
SO-24 (Tape & reel)
TSSOP24 (Tape & reel)
1000 parts per reel
2500 parts per reel
2500 parts per reel
TSSOP24 Exposed pad (Tape & reel)
July 2007
Rev 3
1/28
www.st.com
28
Contents
STP16DP05
Contents
1
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
2.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
4
5
6
7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Detection mode functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.1
7.2
7.3
7.4
Phase one: “entering in detection mode“ . . . . . . . . . . . . . . . . . . . . . . . . . 16
Phase two: “error detection” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Phase three: “resuming to normal mode” . . . . . . . . . . . . . . . . . . . . . . . . . 19
Error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28
STP16DP05
Summary description
1
Summary description
Table 2.
Typical current accuracy
Current accuracy
VDD
Output voltage
Output current
temp.
Between bits Between ICs
1.5% 5%
≥ 1.3V
20 to 100 mA
3.3V to 5V
25°C
1.1
Pin connection and description
Figure 1. Pin connection
Note:
The exposed pad is electrically not connected
Table 3.
PIN N°
Pin description
Symbol
Name and function
1
2
GND
SDI
Ground terminal
Serial data input terminal
Clock input terminal
3
CLK
4
LE-DM1
OUT 0-15
Latch input terminal - Detect mode 1 (see operation principle)
Output terminal
5-20
Input terminal of output enable (active low) - Detect mode 1
(see operation principle)
21
OE-DM2
22
23
24
SDO
R-EXT
VDD
Serial data out terminal
Input terminal of an external resistor for constant current programing
Supply voltage terminal
3/28
Electrical ratings
STP16DP05
2
Electrical ratings
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDD
VO
Supply voltage
Output voltage
Output current
Input voltage
0 to 7
-0.5 to 20
100
V
V
IO
mA
V
VI
-0.4 to VDD
1600
IGND
fCLK
GND terminal current
Clock frequency
mA
MHz
50
2.2
Thermal data
Table 5.
Symbol
Thermal data
Parameter
Value
Unit
TOPR
TSTG
Operating temperature range
Storage temperature range
-40 to +125
-55 to +150
60
°C
°C
DIP-24
°C/W
°C/W
TSSOP24
85
TSSOP24 (1)
Exposed Pad
RthJC
Thermal resistance junction-case
37.5
75
°C/W
°C/W
SO-24
1. The exposed pad should be soldered directly to the PCB to realize the thermal benefits.
4/28
STP16DP05
Electrical ratings
2.3
Recommended operating conditions
Table 6.
Symbol
Recommended operating conditions
Parameter
Test conditions
Min
Typ
Max
Unit
VDD
VO
Supply voltage
Output voltage
Output current
Output current
Output current
Input voltage
3.0
5.5
20
V
V
IO
OUTn
5
100
mA
mA
mA
V
IOH
SERIAL-OUT
SERIAL-OUT
+1
IOL
-1
VIH
0.7VDD
-0.3
20
VDD+0.3
0.3VDD
VIL
Input voltage
V
twLAT
twCLK
twEN
LE\DM1 pulse width
CLK pulse width
OE\DM2 pulse width
ns
20
ns
ns
ns
ns
200
20
VDD = 3.0V to 5.0V
tSETUP(D) Setup time for DATA
tHOLD(D) Hold time for DATA
tSETUP(L) Setup time for LATCH
15
15
ns
fCLK
Clock frequency
Cascade operation (1)
30
MHz
1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer.
Please consider the timings carefully.
5/28
Electrical characteristics
STP16DP05
3
Electrical characteristics
Table 7.
Symbol
Electrical characteristics
(V = 3.3V to 5V, T = 25°C, unless otherwise specified.)
DD
Parameter
Test conditions
Min
Typ
Max
Unit
VIH
VIL
IOH
Input voltage high level
Input voltage low level
Output leakage current
0.7VDD
GND
VDD
0.3VDD
10
V
V
VOH = 20V
OL = 1mA
µA
Output voltage
(Serial-OUT)
VOL
VOH
I
0.4
V
V
Output voltage
(Serial-OUT)
IOH = -1mA
VOH -VDD = -0.4V
IOL1
IOL2
VO = 0.3V, Rext = 3.9kΩ
VO = 0.3V, Rext = 970Ω
VO = 1.3V, Rext = 190Ω
VO = 0.3VREXT = 3.9kΩ
VO = 0.3VREXT = 970Ω
VO = 1.3VREXT =190Ω
4.25
19
5
5.75
21
104
8
Output current
20
mA
%
IOL3
96
100
5
∆IOL1
∆IOL2
∆IOL3
Output current error
between bit
(All Output ON)
1.5
1.2
300
200
3
3
RSIN(up) Pull-up resistor
150
100
600
400
KΩ
KΩ
RSIN(down) Pull-down resistor
R
EXT = 970
IDD(OFF1)
4
5
OUT 0 to 15 = OFF
Supply current (OFF)
IDD(OFF2)
REXT = 240
OUT 0 to 15 = OFF
11.2
4.5
13.5
5
mA
°C
R
EXT = 970
IDD(ON1)
OUT 0 to 15 = ON
Supply current (ON)
IDD(ON2)
REXT = 240
OUT 0 to 15 = ON
11.7
170
13.5
Thermal Thermal protection (1)
1. Guaranteed by desing (not tested)
The thermal protection switches OFF only the outputs current
6/28
STP16DP05
Electrical characteristics
Table 8.
Symbol
Switching characteristics (V = 5V, T = 25°C, unless otherwise specified.)
DD
Parameter
Test conditions
Min
Typ
70
45
61
41
69
50
Max Unit
Propagation delay time,
tPLH1 CLK-OUTn, LE\DM1 = H,
OE\DM2 = L
VDD = 3.3V
VDD = 5V
105
ns
65
Propagation delay time,
tPLH2 LE\DM1 -OUTn,
OE\DM2 = L
V
DD = 3.3V
VDD = 5V
DD = 3.3V
90
ns
60
Propagation delay time,
tPLH3 OE\DM2-OUTn,
LE\DM1 = H
V
105
ns
VDD = 5V
70
VDD = 3.3V
VDD = 5V
14
8
20
ns
12
Propagation delay time,
CLK-SDO
tPLH
Propagation delay time,
tPHL1 CLK-OUTn, LE\DM1 = H,
OE\DM2 = L
V
DD = 3.3V
VDD = 5V
DD = 3.3V
VDD = 5V
DD = 3.3V
34
50
VDD = 3.3 V
VIL = GND
IO = 20mA
REXT = 1KΩ
VIH = VDD
CL = 10pF
VL = 3.0 V
RL = 60 Ω
ns
23
27
22
23
20
35
Propagation delay time,
tPHL2 LE\DM1 -OUTn,
OE\DM2 = L
V
40
ns
32
Propagation delay time,
tPHL3 OE\DM2-OUTn,
LE\DM1 = H
V
35
ns
VDD = 5V
30
VDD = 3.3V
VDD = 5V
15
9
25
ns
15
Propagation delay time,
CLK-SDO
tPHL
Output rise time
VDD = 3.3V
42
65
tON
10~90% of voltage
waveform
ns
VDD = 5V
VDD = 3.3V
VDD = 5V
35
10
9
55
Output fall time
90~10% of voltage
waveform
16
tOFF
ns
14
tr
tf
CLK rise time (1)
CLK fall time (1)
5000
5000
ns
ns
1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.
7/28
Equivalent circuit and outputs
STP16DP05
4
Equivalent circuit and outputs
Figure 2. OE\DM2 terminal
Figure 3. LE\DM1 terminal
Figure 4. CLK, SDI terminal
8/28
STP16DP05
Equivalent circuit and outputs
Figure 5. SDO terminal
Figure 6. Block diagram
9/28
Timing diagrams
STP16DP05
5
Timing diagrams
Table 9.
Truth table
CLOCK LE\DM1 OE\DM2 SERIAL-IN OUT0 ............. OUT7 ................ OUT15
SDO
H
L
L
L
L
L
H
Dn
Dn ..... Dn - 7 ..... Dn -15
No Change
Dn - 15
Dn - 14
Dn - 13
Dn - 13
Dn - 13
Dn + 1
Dn + 2
Dn + 3
Dn + 3
H
X
X
Dn + 2 ..... Dn - 5 ..... Dn -13
Dn + 2 ..... Dn - 5 ..... Dn -13
OFF
Note:
OUTn = ON when Dn = H OUTn = OFF when Dn = L
Figure 7. Timing diagram
LE\DM1
OE\DM2
Note:
The latches circuit holds data when the LE\DM1 terminal is Low.
1
2
3
When LE\DM1 terminal is at High level, latch circuit hold the data it passes from the input to
the output.
When OE\DM2 terminal is at Low level, output terminals OUT0 to OUT15 respond to the
data, either ON or OFF.
When OE\DM2 terminal is at High level, it switches off all the data on the output terminal.
10/28
STP16DP05
Timing diagrams
Figure 8. Clock, serial-in, serial-out
Figure 9. Clock, serial-in, latch, enable, outputs
LE\DM1
OE\DM2
11/28
Timing diagrams
Figure 10. Outputs
STP16DP05
12/28
STP16DP05
Typical characteristics
6
Typical characteristics
Figure 11. Output current-R
resistor
EXT
Table 10. Output current-R
Rext (Ohm)
resistor
EXT
Output current (mA)
976
780
652
560
488
433
389
354
325
300
278
259
241
229
215
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
13/28
Typical characteristics
STP16DP05
Conditions:
Temperature = 25°C, V = 3.3V; 5.0V, I
= 3mA; 5mA; 10mA; 20mA; 50mA; 80mA.
DD
SET
Figure 12. I
vs drop out voltage (V
)
SET
drop
800
700
600
500
400
300
200
100
0
Avg @ 3.0V
Avg @ 5.0V
0
20
40
Iset mA)
60
80
Table 11.
I
vs drop out voltage (V
)
SET
drop
Iout (mA)
Avg @ 3.0V
Avg @ 5.0V
3
19.33
36.67
77.33
158.67
406
22.66
40.33
80
5
10
20
50
80
157.33
406
692
668
14/28
STP16DP05
Typical characteristics
Figure 13. I ON\OFF
DD
14
12
10
8
IddON Avg @ 5.5V
IddON Avg @ 3.6V
IddOFF Avg @ 5.5V
IddOFF Avg @ 3.6V
6
4
2
0
0
10 20 30 40 50 60 70 80 90
Iset (mA)
Figure 14. Power dissipation vs temperature package
Note:
The Exposed-Pad should be soldered to the PBC to realize the thermal benefits.
15/28
Detection mode functionality
STP16DP05
7
Detection mode functionality
7.1
Phase one: “entering in detection mode“
From the “Normal Mode” condition the device can switch to the “Error Mode“ by a logic
sequence on the OE\DM2 and LE/DM1 pins as showed in the following table and diagram:
Table 12. Entering in detection truth table
CLK
1°
H
L
2°
L
3°
H
L
4°
H
5°
H
L
OE/DM2
LE/DM1
L
H
Figure 15. Entering in detection timing diagram
th
After these five CLK cycles the device goes into the “Error Detection Mode“ and at the 6
rise front of CLK the SDI data are ready for the sampling.
16/28
STP16DP05
Detection mode functionality
7.2
Phase two: “error detection”
The 16 data bits must be set “1“ in order to set ON all the outputs during the detection. The
data are latched by LE/DM1 and after that the outputs are ready for the detection process.
When the Micro controller switches the OE\DM2 to LOW, the device drives the LEDs in
order to analyze if an OPEN or SHORT condition has occurred.
Figure 16. Detection diagram
The LEDs status will be detected at least in 1 microsecond and after this time the
microcontroller sets OE\DM2 in HIGH state and the output data detection result will go to
the microprocessor via SDO.
Detection mode and normal mode use both the same format data. As soon as all the
detection data bits are available on the serial line, the device may go back to normal mode
of operation. To re-detect the status the device must go back in normal mode and re-
entering in error detection mode .
17/28
Detection mode functionality
Figure 17. Timing example for open and/or short detection
STP16DP05
18/28
STP16DP05
Detection mode functionality
7.3
Phase three: “resuming to normal mode”
The sequence for re-entering in normal mode is showed in the following Table and diagram:
Figure 18. Resuming to normal mode timing diagram
CLK
1°
H
L
2°
L
3°
H
L
4°
H
L
5°
H
L
OE/DM2
LE/DM1
L
Note:
For proper device operation the "Entering in detection" sequence must be follow by a
"Resume Mode" sequence, it is not possible to insert consecutive equal sequence.
7.4
Error detection conditions
Table 13. Detection conditions (V = 3.3 to 5 V temp. range -40 to 125°C)
DD
SW-1 or Open line or output
SW-3b short to GND detected
==> IODEC ≤ 0.5 x IO
==> IODEC ≥ 0.5 x IO
No error detected
SW-2 or Short on LED or short
SW-3a to V-LED detected
==> VO ≥ 2.4 V
==> VO ≤ 2.2 V
No error detected
Note:
Where: I = the output current programmed by the R
, I
= the detected output
O
EXT ODEC
current in detection mode
Figure 19. Detection circuit
STP16DP05
19/28
Detection mode functionality
Figure 20. Error detection sequence
STP16DP05
During the error
detection are
necessary at least
2 CLK signal plus
oneat the end
16 CLK pulse are required to
load the data setting 1 into
shift register
Every CLK pulse shows the results of
single Output results:Out15;14; 13 etc. etc
The OE Pulse put
the device from
EDM to Normal
Mode
The LE pulse
latch the data
loaded during the
previous state
LE and OE Key
Sequence
necessary to Enter
in EDM
After OE signal turn High the
SDO pin show the results of
Error Detection (Open or
Short in this case)
20/28
STP16DP05
Package mechanical data
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
21/28
Package mechanical data
STP16DP05
Table 14. TSSOP24 mechanical data
mm.
Typ
inch
Typ
Dim.
Min
Max
Min
Max
A
A1
A2
b
1.1
0.043
0.006
0.05
0.15
0.002
0.9
0.035
0.19
0.09
7.7
0.30
0.20
7.9
0.0075
0.0035
0.303
0.0118
0.0079
0.311
c
D
E
4.3
4.5
0.169
0.177
e
0.65 BSC
0.0256 BSC
H
K
6.25
0°
6.5
8°
0.246
0°
0.256
8°
L
0.50
0.70
0.020
0.028
Figure 21. TSSOP24 package dimensions
22/28
STP16DP05
Package mechanical data
inch
Table 15. Tape and reel TSSOP24
mm.
Typ
Dim.
Min
Max
Min
Typ
Max
A
C
330
12.992
0.519
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
7
0.882
0.276
0.331
0.075
0.161
0.476
Ao
Bo
Ko
Po
P
6.8
8.2
0.268
0.323
0.067
0.153
0.468
8.4
1.9
4.1
12.1
1.7
3.9
11.9
Figure 22. Reel dimensions
23/28
Package mechanical data
Table 16. SO-24 mechanical data
STP16DP05
mm.
Typ
inch
Typ
Dim.
Min
Max
Min
Max
A
a1
a2
b
2.65
0.2
0.104
0.008
0.096
0.019
0.012
0.1
0.004
2.45
0.49
0.32
0.35
0.23
0.014
0.009
b1
C
0.5
0.020
c1
D
45°(typ.)
15.20
10.00
15.60
10.65
0.598
0.393
0.614
0.419
E
e
1.27
0.050
0.550
e3
F
13.97
7.40
0.50
7.60
1.27
0.291
0.020
0.300
0.050
L
S
°(max.) 8
Figure 23. SO-24 package dimensions
24/28
STP16DP05
Package mechanical data
inch
Table 17. Tape and reel SO-24
mm.
Dim.
Min
Typ
Max
Min
Typ
Max
A
C
330
12.992
0.519
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
11.0
15.9
3.1
1.197
0.433
0.626
0.122
0.161
0.476
Ao
Bo
Ko
Po
P
10.8
15.7
2.9
0.425
0.618
0.114
0.153
0.468
3.9
4.1
11.9
12.1
Figure 24. Reel dimensions
25/28
Package mechanical data
Table 18. TSSOP24 exposed-pad
STP16DP05
mm
Typ
inch
Typ
Dim.
Min
Max
Min
Max
A
1.2
0.047
0.006
A1
0.15
0.004
0.039
A2
b
0.8
0.19
0.09
7.7
1
1.05
0.30
0.20
7.9
0.031
0.007
0.004
0.303
0.106
0.244
0.169
0.059
0.041
0.012
0.0089
0.311
c
D
7.8
2.7
6.4
4.4
1.5
0.65
0.307
D1
E
6.2
4.3
6.6
4.5
0.252
0.173
0.260
0.177
E1
E2
e
0.0256
0.024
K
0°
8°
0°
8°
L
0.45
0.60
0.75
0.018
0.030
Figure 25. TSSOP24 dimensions
26/28
STP16DP05
Revision history
9
Revision history
Table 19. Revision history
Date
Revision
Changes
9-Jan-2007
21-May-2007
10-Jul-2007
1
2
3
First release
Updated Table 7 on page 6
Updated Table 9: Truth table on page 10
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STP16DP05
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