VNQ600PTR-E [STMICROELECTRONICS]

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VNQ600PTR-E
型号: VNQ600PTR-E
厂家: ST    ST
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外围驱动器 驱动程序和接口 接口集成电路 继电器 固态继电器 光电二极管
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VNQ600  
®
P
QUAD CHANNEL HIGH SIDE SOLID STATE RELAY  
TYPE  
VNQ600  
R
(*)  
I
V
CC  
DS(on)  
lim  
35mΩ  
25A  
36 V  
(*) Per each channel  
DC SHORT CIRCUIT CURRENT: 25A  
CMOS COMPATIBLE INPUTS  
PROPORTIONAL LOAD CURRENT SENSE  
UNDERVOLTAGE & OVERVOLTAGE  
SHUT-DOWN  
SO-28 (DOUBLE ISLAND)  
ORDER CODES  
PACKAGE  
TUBE  
T&R  
SO-28  
VNQ600  
VNQ60013TR  
OVERVOLTAGE CLAMP  
THERMAL SHUT-DOWN  
CURRENT LIMITATION  
package. The VND600 is a monolithic device  
designed in| STMicroelectronics VIPower M0-3  
Technology. The VNQ600 is intended for driving  
any type of multiple loads with one side connected  
to ground. This device has four independent  
channels and four analog sense outputs which  
deliver currents proportional to the outputs  
currents. Active current limitation combined with  
thermal shut-down and automatic restart protect  
the device against overload. Device automatically  
turns off in case of ground pin disconnection.  
VERY LOW STAND-BY POWER DISSIPATION  
PROTECTION AGAINST:  
LOSS OF GROUND & LOSS OF VCC  
REVERSE BATTERY PROTECTION (**)  
DESCRIPTION  
The VNQ600 is  
a quad HSD formed by  
assembling two VND600 chips in the same SO-28  
ABSOLUTE MAXIMUM RATING  
Symbol  
Parameter  
Value  
41  
Unit  
V
V
Supply voltage (continuous)  
CC  
-V  
Reverse supply voltage (continuous)  
Output current (continuous), for each channel  
Reverse output current (continuous), for each channel  
Input current  
-0.3  
15  
V
CC  
I
A
OUT  
I
-15  
A
R
I
+/- 10  
-3  
mA  
V
IN  
V
Current sense maximum voltage  
CSENSE  
+15  
-200  
V
I
Ground current at T  
< 25°C (continuous)  
mA  
GND  
pins  
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)  
- INPUT  
4000  
2000  
5000  
5000  
V
V
V
V
V
- CURRENT SENSE  
- OUTPUT  
ESD  
- V  
CC  
Maximum Switching Energy  
(L=0.11mH; R =0; V =13.5V; T  
E
126  
mJ  
MAX  
=150ºC; I =40A)  
L
bat  
jstart  
L
P
Power dissipation (per island) at T  
Junction operating temperature  
Storage temperature  
=25°C  
lead  
6.25  
W
°C  
°C  
tot  
T
Internally Limited  
-55 to 150  
j
T
stg  
(**) See application schematic at page 9.  
June 2003  
1/18  
VNQ600  
BLOCK DIAGRAM  
V
1,2  
CC  
OVERVOLTAGE  
UNDERVOLTAGE  
DEMAG 1  
DRIVER 1  
OUTPUT 1  
INPUT 1  
I
LIM1  
LOGIC  
I
OUT1  
CURRENT  
SENSE 1  
K
INPUT 2  
GND 1,2  
DEMAG 2  
DRIVER 2  
OUTPUT 2  
I
LIM2  
OVERTEMP. 1  
OVERTEMP. 2  
I
OUT2  
CURRENT  
SENSE 2  
K
V
3,4  
OVERVOLTAGE  
UNDERVOLTAGE  
CC  
DEMAG 3  
DRIVER 3  
OUTPUT 3  
INPUT 3  
I
LIM3  
LOGIC  
I
OUT3  
CURRENT  
SENSE 3  
K
INPUT 4  
GND 3,4  
DEMAG 4  
DRIVER 4  
OUTPUT 4  
I
LIM4  
OVERTEMP. 3  
OVERTEMP. 4  
I
OUT4  
CURRENT  
SENSE 4  
K
2/18  
VNQ600  
CURRENT AND VOLTAGE CONVENTIONS  
I
S1,2  
V
I
CC1,2  
S3,4  
V
V
CC3,4  
CC1,2  
I
IN1  
V
CC3,4  
INPUT1  
I
OUT1  
I
V
SENSE1  
IN1  
OUTPUT1  
OUTPUT2  
OUTPUT3  
CUR. SENSE1  
INPUT2  
I
V
IN2  
SENSE1  
I
OUT2  
V
OUT1  
I
V
SENSE2  
IN2  
CUR. SENSE2  
V
I
OUT2  
V
IN3  
SENSE2  
I
I
OUT3  
INPUT3  
I
SENSE3  
V
IN3  
V
CUR. SENSE3  
INPUT4  
OUT3  
I
I
OUT4  
IN4  
V
SENSE3  
OUTPUT4  
SENSE4  
V
IN4  
V
OUT4  
CUR. SENSE4  
V
SENSE4  
GND  
GND  
3,4  
1,2  
I
I
GND1,2  
GND3,4  
CONNECTION DIAGRAM (TOP VIEW)  
V
1,2  
1
28  
CC  
V
1,2  
CC  
GND 1,2  
OUTPUT 2  
OUTPUT 2  
OUTPUT 2  
INPUT2  
INPUT1  
CURRENT SENSE 1  
CURRENT SENSE 2  
OUTPUT 1  
OUTPUT 1  
OUTPUT 1  
V
V
1,2  
3,4  
CC  
OUTPUT 4  
OUTPUT 4  
OUTPUT 4  
OUTPUT 3  
CC  
GND 3,4  
INPUT4  
INPUT3  
CURRENT SENSE 3  
CURRENT SENSE 4  
OUTPUT 3  
OUTPUT 3  
V
3,4  
V
3,4  
14  
15  
CC  
CC  
3/18  
VNQ600  
THERMAL DATA (Per island)  
Symbol  
Parameter  
Thermal resistance Junction-lead  
Value  
20  
Unit  
°C/W  
°C/W  
°C/W  
R
R
R
thj-lead  
thj-amb  
thj-amb  
Thermal resistance Junction-ambient (one chip ON)  
Thermal Resistance Junction-ambient (two chips ON)  
60 (*)  
46 (*)  
2
(*) When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick) connected to all V pins.  
CC  
Horizontal mounting and no artificial air flow.  
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C; unless otherwise specified)  
(Per each channel)  
POWER  
Symbol  
Parameter  
Test Conditions  
Min  
5.5  
3
Typ  
13  
4
Max  
36  
5.5  
Unit  
V
V
V
(**)  
(**)  
(**)  
Operating supply voltage  
Undervoltage shut-down  
Overvoltage shut-down  
CC  
V
USD  
V
36  
V
OV  
I
1,2,3,4=5A; T =25°C  
35  
70  
mΩ  
OUT  
j
R
On state resistance  
Clamp Voltage  
I
1,2,3,4=5A; T =150°C  
mΩ  
ON  
OUT  
j
I
1,2,3,4=3A; VCC=6V  
=20mA (see note 1)  
120  
55  
40  
mΩ  
V
µA  
OUT  
V
I
41  
48  
12  
clamp  
CC  
Off State; V =13V; V =V  
=0V  
CC  
IN  
OUT  
Off State; V =13V; V =V  
=0V;  
CC  
IN  
OUT  
I (**)  
Supply current  
12  
25  
µA  
T =25°C  
S
j
On State; V =13V; V =5V;  
CC  
IN  
I
=0A; R  
=3.9KΩ  
6
50  
0
5
3
mA  
µA  
µA  
µA  
µA  
OUT  
SENSE  
I
I
I
I
Off state output current  
Off State Output Current  
Off State Output Current  
Off State Output Current  
V =V =0V  
OUT  
V =0V; V  
V =V  
V =V  
0
-75  
L(off1)  
L(off2)  
L(off3)  
L(off4)  
IN  
=3.5V  
IN  
OUT  
=0V; Vcc=13V; T =125°C  
=0V; Vcc=13V; T =25°C  
IN  
OUT  
OUT  
j
IN  
j
SWITCHING (VCC=13V)  
Symbol  
Parameter  
Turn-on delay time  
Turn-off delay time  
Test Conditions  
R =2.6channels 1,2,3,4 (see fig. 1)  
Min  
Typ  
40  
40  
Max  
Unit  
µs  
µs  
t
t
d(on)  
d(off)  
L
R =2.6channels 1,2,3,4 (see fig. 1)  
L
See  
(dV  
(dV  
/dt)  
Turn-on voltage slope  
Turn-off voltage slope  
R =2.6channels 1,2,3,4 (see fig. 1)  
relative  
diagram  
See  
relative  
diagram  
Vs  
Vs  
OUT  
OUT  
on  
off  
L
/dt)  
R =2.6channels 1,2,3,4 (see fig. 1)  
L
PROTECTIONS  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
V
=13V  
25  
40  
70  
A
CC  
I
DC Short circuit current  
lim  
5.5V<V <36V  
70  
A
CC  
Thermal shut-down  
T
150  
175  
15  
200  
°C  
TSD  
temperature  
Thermal reset temperature  
Thermal hysteresis  
Turn-off output voltage clamp I  
Output voltage drop limitation I  
T
T
135  
7
°C  
°C  
V
R
hyst  
V
=2A; L=6mH  
V
-41 V -48 V -55  
CC CC CC  
demag  
OUT  
OUT  
V
=0.5A; T= -40°C...+150°C  
50  
mV  
ON  
j
(**) Per island  
4/18  
1
VNQ600  
CURRENT SENSE (9V< V < 16V) (See Fig. 3)  
CC  
Symbol  
Parameter  
Test Conditions  
=0.35A; V =0.5V;  
Min  
Typ  
Max  
Unit  
I
OUT1,2  
SENSE  
K
I
/I  
3300  
4350  
6000  
1
OUT SENSE  
T= -40°C...+150°C  
j
I
or I  
=0.5A;  
OUT1  
OUT2  
dK /K  
Current Sense Ratio Drift  
V =0.5V; other channels  
-10  
+10  
%
%
1
1
2
SENSE  
open; T= -40°C...150°C  
j
I
=2A; V  
=2.5V; T =-40°C 3900  
4850  
4850  
6000  
5800  
OUT  
SENSE  
j
K
I
/I  
2
OUT SENSE  
T = 25°C...+150°C  
4150  
j
I
or I  
=5A; V  
=4V;  
OUT1  
OUT2  
SENSE  
other channels open;  
dK /K  
Current Sense Ratio Drift  
-6  
+6  
2
T =-40°C...150°C  
j
I
=4A; V  
=4V; T =-40°C  
4150  
4400  
4900  
4900  
6000  
5750  
OUT  
SENSE  
j
K
I
/I  
3
OUT SENSE  
T = 25°C...+150°C  
j
I
or I  
=15A; V  
=4V;  
OUT1  
OUT2  
SENSE  
other channels open;  
dK /K  
Current Sense Ratio Drift  
-6  
+6  
%
V
3
3
T =-40°C...150°C  
j
V
=5.5V; I  
=2A;  
OUT1,2  
CC  
2
4
R
=10KΩ  
SENSE  
Max analog sense output  
voltage  
V
SENSE1,2  
V
>8V; I  
=4A;  
OUT1,2  
CC  
V
V
R
=10KΩ  
SENSE  
Analog sense output voltage in  
overtemperature condition  
V
V
=13V; R =3.9KΩ  
SENSE  
5
SENSEH  
CC  
Analog Sense Output  
Impedance in  
Overtemperature Condition  
V
open  
=13V; T >T  
; All channels  
TSD  
CC  
j
R
t
400  
VSENSEH  
Current sense delay response to 90% I  
(see note 2)  
500  
µs  
DSENSE  
SENSE  
LOGIC INPUT  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
V
V
Low level input voltage  
High level input voltage  
Input hysteresis voltage  
1.25  
IL  
V
3.25  
0.5  
1
V
IH  
V
V
I(hyst)  
I
Input current  
Input current  
V =1.5V  
µA  
µA  
V
IL  
IN  
I
V =3.5V  
10  
8
IN  
IN  
I =1mA  
6
6.8  
IN  
V
Input clamp voltage  
ICL  
I = -1mA  
-0.7  
V
IN  
Note 1: V  
and V are correlated. Typical difference is 5V.  
OV  
clamp  
Note 2: current sense signal delay after positive input slope.  
Note: Sense pin doesn’t have to be left floating.  
5/18  
2
VNQ600  
TRUTH TABLE (per channel)  
CONDITIONS  
INPUT  
OUTPUT  
SENSE  
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
0
Normal operation  
Overtemperature  
Undervoltage  
Nominal  
0
H
L
V
SENSEH  
0
H
L
0
0
0
0
Overvoltage  
H
L
Short circuit to GND  
H
H
L
(T <T  
) 0  
) V  
0
j
TSD  
TSD  
(T >T  
j
SENSEH  
Short circuit to V  
CC  
H
< Nominal  
Negative output voltage  
clamp  
L
L
0
6/18  
VNQ600  
ELECTRICAL TRANSIENT REQUIREMENTS  
ISO T/R  
Test Levels  
I
Test Levels  
II  
Test Levels  
III  
Test Levels  
IV  
Test Levels  
7637/1  
Delays and Impedance  
Test Pulse  
1
2
-25V  
+25V  
-25V  
-50V  
+50V  
-50V  
-75V  
+75V  
-100V  
+75V  
-6V  
-100V  
+100V  
-150V  
+100V  
-7V  
2ms, 10Ω  
0.2ms, 10Ω  
0.1µs, 50Ω  
0.1µs, 50Ω  
100ms, 0.01Ω  
400ms, 2Ω  
3a  
3b  
4
+25V  
-4V  
+50V  
-5V  
5
+26.5V  
+46.5V  
+66.5V  
+86.5V  
ISO T/R  
Test Levels Result  
I
Test Levels Result  
II  
Test Levels Result  
III  
Test Levels Result  
IV  
7637/1  
Test Pulse  
1
2
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
3a  
3b  
4
5
Class  
Contents  
C
All functions of the device are performed as designed after exposure to disturbance.  
One or more functions of the device is not performed as designed after exposure and cannot be  
returned to proper operation without replacing the device.  
E
Figure 1: Switching Characteristics (Resistive load RL=2.6)  
VOUT  
90%  
80%  
dVOUT/dt(off)  
dVOUT/dt(on)  
10%  
tf  
tr  
t
ISENSE  
90%  
t
t
DSENSE  
INPUT  
td(on)  
td(off)  
t
7/18  
1
VNQ600  
Figure 2: Waveforms (per each chip)  
NORMAL OPERATION  
INPUT  
n
LOAD CURRENT  
n
SENSE  
n
UNDERVOLTAGE  
V
CC  
V
USDhyst  
V
USD  
INPUT  
n
LOAD CURRENT  
n
SENSE  
n
OVERVOLTAGE  
V
OV  
V
CC  
V
> V  
OV  
V
< V  
OV  
CC  
CC  
INPUT  
n
LOAD CURRENT  
n
SENSE  
n
SHORT TO GROUND  
INPUT  
n
LOAD CURRENT  
n
LOAD VOLTAGE  
n
SENSE  
n
SHORT TO V  
CC  
INPUT  
n
LOAD VOLTAGE  
n
LOAD CURRENT  
n
SENSE  
n
<Nominal  
<Nominal  
OVERTEMPERATURE  
T
TSD  
T
j
T
R
INPUT  
n
LOAD CURRENT  
n
V
R
SENSEH  
SENSE  
I
=
SENSE  
n
SENSE  
8/18  
VNQ600  
APPLICATION SCHEMATIC  
+5V  
R
prot  
INPUT1  
V
CC1,2  
V
CC3,4  
D
ld  
R
OUTPUT1  
OUTPUT2  
prot  
C. SENSE 1  
INPUT2  
R
prot  
µC  
R
prot  
C. SENSE 2  
R
prot  
INPUT3  
OUTPUT3  
OUTPUT4  
R
prot  
C. SENSE 3  
INPUT4  
R
prot  
R
prot  
C. SENSE 4  
GND3,4  
GND1,2  
R
GND  
R
SENSE1,2,3,4  
D
GND  
V
GND  
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.  
and the status output values. This shift will vary  
depending on how many devices are ON in the case of  
GND PROTECTION NETWORK AGAINST  
REVERSE BATTERY  
several high side drivers sharing the same R  
.
GND  
Solution 1: Resistor in the ground line (R  
can be used with any type of load.  
only). This  
GND  
If the calculated power dissipation leads to a large resistor  
or several devices have to share the same resistor then  
the ST suggests to utilize Solution 2 (see below).  
The following is an indication on how to dimension the  
R
resistor.  
GND  
1) R  
Solution 2: A diode (D  
) in the ground line.  
GND  
600mV / 2(I  
).  
S(on)max  
GND  
A resistor (R  
GND  
=1kΩ) should be inserted in parallel to  
GND  
2) R  
≥ (−V ) / (-I  
)
GND  
CC  
GND  
D
if the device will be driving an inductive load.  
where -I  
is the DC reverse ground pin current and can  
GND  
This small signal diode can be safely shared amongst  
several different HSD. Also in this case, the presence of  
the ground network will produce a shift ( 600mV) in the  
input threshold and the status output values if the  
microprocessor ground is not common with the device  
ground. This shift will not vary if more than one HSD  
shares the same diode/resistor network.  
be found in the absolute maximum rating section of the  
device’s datasheet.  
Power Dissipation in R  
(when V <0: during reverse  
CC  
GND  
battery situations) is:  
2
P = (-V ) /R  
D
CC  
GND  
This resistor can be shared amongst several different  
HSD. Please note that the value of this resistor should be  
LOAD DUMP PROTECTION  
calculated with formula (1) where I  
becomes the  
S(on)max  
D
is necessary (Voltage Transient Suppressor) if the  
ld  
sum of the maximum on-state currents of the different  
devices.  
load dump peak voltage exceeds V max DC rating. The  
CC  
same applies if the device will be subject to transients on  
Please note that if the microprocessor ground is not  
the V  
line that are greater than the ones shown in the  
CC  
common with the device ground then the R  
will  
ISO T/R 7637/1 table.  
GND  
produce a shift (I  
* R  
) in the input thresholds  
S(on)max  
GND  
9/18  
VNQ600  
Calculation example:  
For V = - 100V and I  
µC I/Os PROTECTION:  
20mA; V 4.5V  
OHµC  
If a ground protection network is used and negative  
CCpeak  
latchup  
transients are present on the V line, the control pins will  
5kΩ ≤ R  
65k.  
CC  
prot  
be pulled negative. ST suggests to insert a resistor (R  
)
prot  
Recommended R  
value is 10kΩ.  
prot  
in line to prevent the µC I/Os pins to latch-up.  
The value of these resistors is a compromise between the  
leakage current of µC and the current required by the  
HSD I/Os (Input levels compatibility) with the latch-up limit  
of µC I/Os.  
-V  
/I  
R  
(V  
-V -V  
) / I  
CCpeak latchup  
prot  
OHµC IH GND IHmax  
Figure 3: I  
/I  
versus I  
OUT SENSE  
OUT  
I
/I  
OUT SENSE  
6500  
6000  
5500  
5000  
4500  
4000  
3500  
3000  
max.Tj=-40°C  
max.Tj=25...150°C  
min.Tj=25...150°C  
typical value  
min.Tj=-40°C  
0
2
4
6
8
10  
12  
14  
16  
I
(A)  
OUT  
10/18  
VNQ600  
High Level Input Current  
Off State Output Current  
IL(off1) (uA)  
Iih (uA)  
5
5
4.5  
4.5  
Off state  
Vcc=36V  
Vin=3.25V  
4
4
Vin=Vout=0V  
3.5  
3.5  
3
3
2.5  
2
2.5  
2
1.5  
1
1.5  
1
0.5  
0
0.5  
0
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
Tc (°C)  
Tc (°C)  
Input Clamp Voltage  
Input High Level  
Vih (V)  
Vicl (V)  
3.6  
8
7.8  
3.4  
3.2  
3
Iin=1mA  
7.6  
7.4  
7.2  
7
2.8  
2.6  
2.4  
2.2  
2
6.8  
6.6  
6.4  
6.2  
6
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
Tc (°C)  
Tc (°C)  
Input Low Level  
Input Hysteresis Voltage  
Vil (V)  
Vhyst (V)  
1.5  
2.6  
1.4  
1.3  
1.2  
1.1  
1
2.4  
2.2  
2
1.8  
1.6  
1.4  
1.2  
1
0.9  
0.8  
0.7  
0.6  
0.5  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
Tc (°C)  
Tc (°C)  
11/18  
VNQ600  
ILIM Vs Tcase  
Overvoltage Shutdown  
Vov (V)  
Ilim (A)  
50  
80  
48  
46  
44  
42  
40  
38  
36  
34  
32  
30  
70  
Vcc=13V  
60  
50  
40  
30  
20  
10  
0
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
Tc (°C)  
Tc (°C)  
Turn-on Voltage Slope  
Turn-off Voltage Slope  
dVout/dt(on) (V/ms)  
dVout/dt(off) (V/ms)  
750  
500  
700  
450  
Vcc=13V  
Rl=2.6Ohm  
Vcc=13V  
Rl=2.6Ohm  
650  
400  
600  
350  
550  
500  
450  
400  
350  
300  
250  
300  
250  
200  
150  
100  
50  
0
-50  
-25  
0
25  
50  
75  
100 125  
150  
175  
-50  
-25  
0
25  
50  
75  
100 125  
150  
175  
Tc (ºC)  
Tc (ºC)  
On State Resistance Vs Tcase  
On State Resistance Vs VCC  
Ron (mOhm)  
Ron (mOhm)  
80  
100  
90  
70  
Iout=5A  
Vcc=8V & 36V  
80  
Iout=5A  
Tc= 150°C  
60  
70  
50  
40  
30  
20  
10  
0
60  
50  
40  
30  
20  
10  
0
Tc= 25°C  
Tc= - 40°C  
-75 -50 -25  
0
25  
50  
75  
100 125 150 175  
5
10  
15  
20  
25  
30  
35  
40  
Tc (°C)  
Vcc (V)  
12/18  
VNQ600  
Maximum turn off current versus load inductance  
LMAX (A)  
I
100  
10  
1
A
B
C
0.001  
0.01  
0.1  
1
10  
100  
L(mH)  
A = Single Pulse at TJstart=150ºC  
B= Repetitive pulse at TJstart=100ºC  
C= Repetitive Pulse at TJstart=125ºC  
Conditions:  
VCC=13.5V  
Values are generated with RL=0Ω  
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed  
the temperature specified above for curves B and C.  
VIN, IL  
Demagnetization  
Demagnetization  
Demagnetization  
t
13/18  
VNQ600  
SO-28 DOUBLE ISLAND THERMAL DATA  
SO-28 Double island PC Board  
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,  
th  
th  
2
2
2
Cu thickness=35µm, Copper areas: 0.5cm , 3cm , 6cm ).  
Thermal calculation according to the PCB heatsink area  
Chip 1 Chip 2  
T
T
Note  
jchip1  
jchip2  
ON  
OFF  
ON  
OFF  
ON  
ON  
ON  
R
R
R
x P  
x P  
+ T  
+ T  
R
R
R
x P  
x P  
+ T  
+ T  
thA  
thC  
thB  
dchip1  
amb  
thC  
thA  
thB  
dchip1  
amb  
dchip2  
amb  
dchip2  
amb  
x (P  
+ P  
) + T  
x (P  
+ P  
) + T  
P
P
=P  
dchip1 dchip2  
dchip1  
dchip1  
dchip2  
amb  
dchip1  
dchip2  
dchip2  
amb  
ON  
(R x P  
) + R  
x P  
+ T  
(R x P  
) + R x P  
+ T  
P  
dchip1 dchip2  
thA  
thC  
dchip2  
amb  
thA  
thC  
dchip1  
amb  
R
R
R
= Thermal resistance Junction to Ambient with one chip ON  
= Thermal resistance Junction to Ambient with both chips ON and P  
= Mutual thermal resistance  
thA  
thB  
thC  
=P  
dchip2  
dchip1  
Rthj-amb Vs. PCB copper area in open box free air condition  
RTHj_am b  
(°C/W)  
70  
60  
50  
40  
30  
20  
10  
RthA  
RthB  
RthC  
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)/island  
14/18  
VNQ600  
SO-28 Thermal Impedance Junction Ambient Single Pulse  
Zth(°C/W)  
100  
0,5 cm ^2/island  
3 cm ^2/island  
6 cm ^2/island  
10  
One channel ON  
Two channels  
ON on same chip  
1
0.1  
0.01  
0.0001  
0.001  
0.01  
0.1  
time(s)  
1
10  
100  
1000  
Thermal fitting model of a four channels HSD  
in SO-28  
Pulse calculation formula  
ZTHδ = RTH δ + ZTHtp(1 δ)  
δ = tp T  
where  
Tj_1  
C1  
C2  
R2  
C3  
R3  
C4  
R4  
C5  
R5  
C6  
R6  
Thermal Parameter  
R1  
Pd1  
2
Area/island (cm )  
R1=R7=R13=R15 (°C/W)  
R2=R8=R14=R16 (°C/W)  
R3=R9 (°C/W)  
0.5  
0.05  
0.3  
3.4  
11  
6
C13  
R13  
C14  
Tj_2  
R14  
Pd2  
R17  
R18  
R4=R10 (°C/W)  
R5=R11 (°C/W)  
15  
Tj_3  
C7  
R7  
C8  
C9  
R9  
C10  
C11  
C12  
R6=R12 (°C/W)  
30  
13  
Pd3  
R8  
R10  
R11  
R12  
C1=C7=C13=C15 (W.s/°C)  
C2=C8=C14=C16 (W.s/°C)  
C3=C9 (W.s/°C)  
0.001  
5.00E-03  
1.00E-02  
0.2  
C15  
R15  
C16  
Tj_4  
R16  
Pd4  
C4=C10 (W.s/°C)  
C5=C11 (W.s/°C)  
1.5  
T_amb  
C6=C12 (W.s/°C)  
5
8
R17=R18 (°C/W)  
150  
15/18  
VNQ600  
SO-28 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
2.65  
0.30  
0.49  
0.32  
MIN.  
MAX.  
0.104  
0.012  
0.019  
0.012  
A
a1  
b
0.10  
0.35  
0.23  
0.004  
0.013  
0.009  
b1  
C
0.50  
0.020  
c1  
D
45 (typ.)  
17.7  
18.1  
0.697  
0.393  
0.713  
0.419  
E
10.00  
10.65  
e
1.27  
0.050  
0.650  
e3  
F
16.51  
7.40  
0.40  
7.60  
1.27  
0.291  
0.016  
0.299  
0.050  
L
S
8 (max.)  
16/18  
2
VNQ600  
SO-28 TUBE SHIPMENT (no suffix)  
Base Q.ty  
28  
700  
532  
3.5  
Bulk Q.ty  
Tube length (± 0.5)  
C
B
A
B
13.8  
0.6  
C (± 0.1)  
All dimensions are in mm.  
A
TAPE AND REEL SHIPMENT (suffix “13TR”)  
REEL DIMENSIONS  
Base Q.ty  
1000  
1000  
330  
1.5  
Bulk Q.ty  
A (max)  
B (min)  
C (± 0.2)  
F
13  
20.2  
16.4  
60  
G (+ 2 / -0)  
N (min)  
T (max)  
22.4  
TAPE DIMENSIONS  
According to Electronic Industries Association  
(EIA) Standard 481 rev. A, Feb. 1986  
Tape width  
W
P0 (± 0.1)  
P
16  
4
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
12  
D (± 0.1/-0) 1.5  
Hole Diameter  
D1 (min)  
F (± 0.05)  
K (max)  
1.5  
7.5  
6.5  
2
Hole Position  
Compartment Depth  
Hole Spacing  
P1 (± 0.1)  
End  
All dimensions are in mm.  
Start  
Top  
No components  
500mm min  
Components  
No components  
cover  
tape  
Empty components pockets  
saled with cover tape.  
500mm min  
User direction of feed  
17/18  
VNQ600  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is  
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are  
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products  
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a trademark of STMicroelectronics  
2003 STMicroelectronics - Printed in ITALY- All Rights Reserved.  
STMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia -  
Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.  
http://www.st.com  
18/18  

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