TP2540N3 [SUPERTEX]
P-Channel Enhancement-Mode Vertical DMOS FETs; P沟道增强型垂直DMOS场效应管型号: | TP2540N3 |
厂家: | Supertex, Inc |
描述: | P-Channel Enhancement-Mode Vertical DMOS FETs |
文件: | 总4页 (文件大小:481K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TP2535
TP2540
Low Threshold
P-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
Order Number / Package
BVDSS
/
RDS(ON)
VGS(th)
ID(ON)
(min)
BVDGS
-350V
-400V
(max)
(max)
TO-92
TO-243AA*
—
Die†
—
25Ω
25Ω
-2.4V
-2.4V
-0.4A
-0.4A
TP2535N3
TP2540N3
TP2540N8
TP2540ND
* Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
†
MIL visual screening available.
Product marking for TO-243AA
Features
TP5D❋
Where ❋ = 2-week alpha date code
❏
❏
❏
❏
❏
❏
❏
❏
Low threshold — -2.4V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low Threshold DMOS Technology
Low on resistance
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, highbreakdownvoltage, highinputimpedance, lowinput
capacitance, and fast switching speeds are desired.
❏
❏
❏
❏
❏
❏
❏
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
Package Options
General purpose line drivers
Telecom switches
Absolute Maximum Ratings
D
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
BVDSS
BVDGS
± 20V
G
D
S
S G
D
TO-243AA
(SOT-89)
TO-92
Operating and Storage Temperature
-55°C to +150°C
300°C
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
Note: See Package Outline section for dimensions.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
TP2535/TP2540
Thermal Characteristics
Package
ID (continuous)*
ID (pulsed)
Power Dissipation
θjc
θja
IDR
*
IDRM
@ TA = 25°C
°C/W
°C/W
TO-92
TO-243AA
-86mA
-0.6A
-1.2A
0.74W
1.6W†
125
15
170
78†
-86mA
-0.6A
-1.2A
-125mA
-125mA
* I (continuous) is limited by max rated T .
D
j
†
Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Signficant P increase possible on ceramic substrate.
D
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
Parameter
Min
-400
-350
-1.0
Typ
Max
Unit
Conditions
BVDSS
Drain-to-Source
TP2540
TP2535
V
VGS = 0V, ID = -2mA
Breakdown Voltage
VGS(th)
∆VGS(th)
IGSS
Gate Threshold Voltage
-2.4
4.8
V
mV/°C
nA
VGS = VDS, ID = -1mA
VGS = VDS, ID = -1mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max Rating
Change in VGS(th) with Temperature
Gate Body Leakage
-100
-10
IDSS
Zero Gate Voltage Drain Current
µA
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
-1.0
mA
ID(ON)
ON-State Drain Current
-0.2
-0.4
-0.3
-1.1
20
VGS = -4.5V, VDS = -25V
VGS = -10V, VDS = -25V
VGS = -4.5V, ID = -100mA
VGS = -10V, ID = -100mA
VGS = -10V, ID = -100mA
VDS = -25V, ID = -100mA
A
RDS(ON)
Static Drain-to-Source
ON-State Resistance
30
25
Ω
19
∆RDS(ON)
GFS
CISS
COSS
CRSS
td(ON)
tr
Change in RDS(ON) with Temperature
Forward Transconductance
Input Capacitance
0.75
%/°C
Ω
100
175
60
m
125
70
VGS = 0V, VDS = -25V
f = 1 MHz
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
20
pF
10
25
10
V
DD = -25V
ID = -0.4A
GEN = 25Ω
Rise Time
10
ns
td(OFF)
tf
Turn-OFF Delay Time
Fall Time
20
R
13
VSD
trr
Diode Forward Voltage Drop
Reverse Recovery Time
-1.8
V
VGS = 0V, ISD = -100mA
VGS = 0V, ISD = -100mA
300
ns
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V
10%
PULSE
GENERATOR
INPUT
90%
-10V
Rgen
t(ON)
td(ON)
t(OFF)
td(OFF)
tr
tF
D.U.T.
OUTPUT
0V
INPUT
90%
90%
RL
OUTPUT
VDD
10%
10%
VDD
2
TP2535/TP2540
Typical Performance Curves
°
°
°
°
°
°
°
3
TP2535/TP2540
Typical Performance Curves
BVDSS Variation with Temperature
On-Resistance vs. Drain Current
1.1
100
80
60
40
20
0
V
= -4.5V
GS
1.0
V
= -10V
GS
0.9
-50
0
50
100
150
0
-0.4
-0.8
-1.2
-1.6
-2.0
ID (amperes)
Tj (°C)
Transfer Characteristics
V(th) and RDS Variation with Temperature
-2
-1.6
-1.2
-0.8
-0.4
0
2.5
2.0
1.5
1.0
0.5
0
1.2
1.1
1.0
0.9
0.8
V
= - 25V
DS
T
= -55°C
A
R
@ -10V, -0.1A
DS(ON)
25°C
V
@ -1mA
100
(th)
125°C
0
-2
-4
-6
-8
-10
-50
0
50
150
VGS (volts)
Tj (°C)
Capacitance vs. Drain-to-Source Voltage
f = 1MHz
Gate Drive Dynamic Characteristics
200
150
-10
-8
V
= - 10V
DS
-6
V
= - 40V
DS
100
50
-4
190 pF
CISS
-2
0
60pF
0.4
COSS
CRSS
0
1.2
0
-10
-20
-30
-40
0
0.8
1.6
2.0
QG (nanocoulombs)
VDS (volts)
11/12/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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