VN0300L-GP013 [SUPERTEX]

N-Channel Enhancement-Mode Vertical DMOS FET;
VN0300L-GP013
型号: VN0300L-GP013
厂家: Supertex, Inc    Supertex, Inc
描述:

N-Channel Enhancement-Mode Vertical DMOS FET

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Supertex inc.  
VN0300  
N-Channel Enhancement-Mode  
Vertical DMOS FET  
Features  
General Description  
Free from secondary breakdown  
Low power drive requirement  
Ease of paralleling  
This enhancement-mode (normally-off) transistor utilizes  
a vertical DMOS structure and Supertex’s well-proven,  
silicon-gate manufacturing process. This combination  
produces a device with the power handling capabilities  
of bipolar transistors and the high input impedance and  
positive temperature coefficient inherent in MOS devices.  
Characteristic of all MOS structures, this device is free  
from thermal runaway and thermally-induced secondary  
breakdown.  
Low CISS and fast switching speeds  
Excellent thermal stability  
Integral source-drain diode  
High input impedance and high gain  
Applications  
Motor controls  
Converters  
Supertex’s vertical DMOS FETs are ideally suited to a  
wide range of switching and amplifying applications where  
very low threshold voltage, high breakdown voltage, high  
input impedance, low input capacitance, and fast switching  
speeds are desired.  
Amplifiers  
Switches  
Power supply circuits  
Drivers (relays, hammers, solenoids, lamps, memories,  
displays, bipolar transistors, etc.)  
Ordering Information  
Product Summary  
RDS(ON)  
(max)  
Part Number  
Package Option  
Packing  
IDSS  
(min)  
BVDSS/BVDGS  
VN0300L-G  
TO-92  
1000/Bag  
30V  
1.2Ω  
1.0A  
VN0300L-G P002  
VN0300L-G P003  
VN0300L-G P005  
VN0300L-G P013  
VN0300L-G P014  
Pin Configuration  
TO-92  
2000/Reel  
-G denotes a lead (Pb)-free / RoHS compliant package.  
Contact factory for Wafer / Die availablity.  
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.  
DRAIN  
SOURCE  
Absolute Maximum Ratings  
Parameter  
Value  
GATE  
TO-92  
Drain-to-source voltage  
Drain-to-gate voltage  
BVDSS  
BVDGS  
±30V  
Gate-to-source voltage  
Product Marking  
Operating and storage temperature  
-55OC to +150OC  
Si VN  
0 3 0 0 L  
YYWW  
YY = Year Sealed  
Absolute Maximum Ratings are those values beyond which damage to the device may  
occur. Functional operation under these conditions is not implied. Continuous operation  
of the device at the absolute rating level may affect device reliability. All voltages are  
referenced to device ground.  
WW = Week Sealed  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
Typical Thermal Resistance  
TO-92  
Package  
θja  
TO-92  
132OC/W  
Doc.# DSFP-VN0300  
B081913  
Supertex inc.  
www.supertex.com  
VN0300  
Thermal Characteristics  
ID  
ID  
Power Dissipation  
Package  
IDR  
IDRM  
@TC = 25OC  
(continuous)†  
(pulsed)  
TO-92  
640mA  
3.0A  
1.0W  
640mA  
3.0A  
Notes:  
ID (continuous) is limited by max rated Tj .  
Electrical Characteristics(TA = 25OC unless otherwise specified)  
Sym  
Parameter  
Min  
Typ  
Max Units Conditions  
BVDSS  
VGS(th)  
IGSS  
Drain-to-source breakdown voltage  
Gate threshold voltage  
30  
0.8  
-
-
-
-
-
-
V
V
VGS = 0V, ID = 10µA  
2.5  
100  
10  
VGS = VDS, ID= 1.0mA  
Gate body leakage  
nA  
VGS = ± 30V, VDS = 0V  
VGS = 0V, VDS = Max Rating  
-
IDSS  
Zero gate voltage drain current  
On-state drain current  
µA  
V
GS = 0V, VDS = 30V,  
-
-
500  
TA = 125°C  
ID(ON)  
1.0  
-
-
-
-
-
-
-
-
A
VGS = 10V, VDS = 10V  
VGS = 5.0V, ID = 300mA  
VGS = 10V, ID = 1.0A  
-
3.3  
1.2  
-
RDS(ON) Static drain-to-source on-state resistance  
Ω
-
GFS  
CISS  
COSS  
CRSS  
Forward transductance  
200  
mmho VDS = 10V, ID = 500mA  
Input capacitance  
-
-
-
190  
110  
50  
VGS = 0V,  
VDS = 20V,  
f = 1.0MHz  
Common source output capacitance  
Reverse transfer capacitance  
pF  
VDD = 25V,  
ID = 1.0A,  
RGEN = 25Ω  
t(ON)  
Turn-on time  
-
-
30  
ns  
V
t(OFF)  
VSD  
Turn-off time  
-
-
-
30  
-
Diode forward voltage drop  
0.9  
VGS = 0V, ISD = 630mA  
Notes:  
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)  
2. All A.C. parameters sample tested.  
Switching Waveforms and Test Circuit  
10V  
VDD  
90%  
INPUT  
0V  
Pulse  
RL  
10%  
Generator  
OUTPUT  
t(ON)  
td(ON)  
t(OFF)  
td(OFF)  
RGEN  
tf  
tr  
VDD  
OUTPUT  
0V  
INPUT  
D.U.T.  
10%  
10%  
90%  
90%  
Doc.# DSFP-VN0300  
B081913  
Supertex inc.  
www.supertex.com  
2
VN0300  
3-Lead TO-92 Package Outline (L)  
D
A
Seating  
Plane  
1
2
3
L
c
b
e1  
e
Side View  
Front View  
E
E1  
1
3
2
Bottom View  
Symbol  
A
.170  
-
b
.014†  
-
c
D
.175  
-
E
.125  
-
E1  
.080  
-
e
e1  
.045  
-
L
.500  
-
MIN  
NOM  
MAX  
.014†  
-
.095  
-
Dimensions  
(inches)  
.210  
.022†  
.022†  
.205  
.165  
.105  
.105  
.055  
.610*  
JEDEC Registration TO-92.  
* This dimension is not specified in the JEDEC drawing.  
† This dimension differs from the JEDEC drawing.  
Drawings not to scale.  
Supertex Doc.#: DSPD-3TO92N3, Version E041009.  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline  
information go to http://www.supertex.com/packaging.html.)  
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives  
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability  
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and  
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)  
©2013 Supertex inc.All rights reserved. Unauthorized use or reproduction is prohibited.  
Supertex inc.  
1235 Bordeaux Drive, Sunnyvale, CA 94089  
Tel: 408-222-8888  
www.supertex.com  
Doc.# DSFP-VN0300  
B081913  
3

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