ICS-43432 [TDK]
MEMS麦克风(麦克风);
| 型号： | ICS-43432 |
| 厂家： | 
TDK ELECTRONICS |
| 描述： | MEMS麦克风(麦克风) 商用集成电路 |
| 文件： | 总20页 (文件大小：988K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS‐43432
Low‐Noise Microphone with I2S Digital Output
APPLICATIONS
GENERAL DESCRIPTION
Wearables
The ICS‐43432 is a digital I2S output bottom port microphone.
The complete ICS‐43432 solution consists of a MEMS sensor,
signal conditioning, an analog‐to‐digital converter, decimation
and anti‐aliasing filters, power management, and an industry
standard 24‐bit I²S interface. The I²S interface allows the
ICS‐43432 to connect directly to digital processors, such as DSPs
and microcontrollers, without the need for an audio codec in the
system.
Smart Televisions
Remote Controls
Teleconferencing Systems
Gaming Consoles
Security Systems
Microphone Arrays
The ICS‐43432 has a high SNR of 65 dBA and a wideband
frequency response. The sensitivity tolerance of the ICS‐43432
is ±1 dB, which enables high‐performance microphone arrays
without the need for system calibration.
FEATURES
Digital I²S Interface with High Precision 24‐bit Data
High 65 dBA SNR
−26 dB FS Sensitivity
±1 dB Sensitivity Tolerance
The ICS‐43432 is available in a small 4 mm × 3 mm × 1 mm
surface‐mount package.
Wide Frequency Response from 50 Hz to 20 kHz
Low Current Consumption: 1.0 mA
High Power Supply Rejection: −80 dB FS
116 dB SPL Acoustic Overload Point
Small 4 mm × 3 mm × 1 mm Surface‐Mount Package
Compatible with Sn/Pb and Pb‐Free Solder Processes
RoHS/WEEE Compliant
FUNCTIONAL BLOCK DIAGRAM
ORDERING INFORMATION
PART
ICS‐43432
TEMP RANGE
−40°C to +85°C
PACKAGING
13” Tape & Reel
ICS‐43432
FILTER
ADC
SCK
SD
EV_ICS‐43432‐FX
—
2
I S
SERIAL
PORT
WS
POWER
MANAGEMENT
HARDWARE
CONTROL
InvenSense Inc.
1745 Technology Drive, San Jose, CA 94089 U.S.A
+1(408) 988–7339
InvenSense reserves the right to change the detail
specifications as may be required to permit
improvements in the design of its products.
Document Number: DS‐000038
Revision: 1.3
Release Date: 4/27/2016
www.invensense.com
ICS‐43432
TABLE OF CONTENTS
General Description..................................................................................................................................................................... 1
Applications ................................................................................................................................................................................. 1
Features....................................................................................................................................................................................... 1
Functional Block Diagram ............................................................................................................................................................ 1
Ordering Information................................................................................................................................................................... 1
Table of Contents.................................................................................................................................................................................... 2
Specifications.......................................................................................................................................................................................... 4
Table 1. Electrical Characteristics ................................................................................................................................................ 4
Table 2. I²S Digital INPUT/Output................................................................................................................................................ 5
Table 3. Serial Data Port Timing Specification............................................................................................................................. 5
Timing Diagram............................................................................................................................................................................ 5
Absolute Maximum Ratings.................................................................................................................................................................... 6
Table 4. Absolute Maximum Ratings ........................................................................................................................................... 6
ESD Caution ................................................................................................................................................................................. 6
Soldering Profile........................................................................................................................................................................... 7
Table 5. Recommended Soldering Profile.................................................................................................................................... 7
Pin Configurations And Function Descriptions ....................................................................................................................................... 8
Table 6. Pin Function Descriptions............................................................................................................................................... 8
Typical Performance Characteristics....................................................................................................................................................... 9
Theory of Operation ............................................................................................................................................................................. 10
Power Management .................................................................................................................................................................. 10
Startup and Normal Operation....................................................................................................................................... 10
Table 7. Startup time ...................................................................................................................................................... 10
Standby Mode ................................................................................................................................................................ 10
Soft Unmute ................................................................................................................................................................... 10
Synchronizing Microphones ...................................................................................................................................................... 10
I²S Data Interface....................................................................................................................................................................... 10
Data Output Mode ......................................................................................................................................................... 10
Data Word Length .......................................................................................................................................................... 11
Data Word Format.......................................................................................................................................................... 11
Data Output Format ....................................................................................................................................................... 12
Digital Microphone Sensitivity................................................................................................................................................... 12
Digital Filter Characteristics....................................................................................................................................................... 12
High‐Pass Filter ............................................................................................................................................................... 12
Low‐Pass Decimation Filter ............................................................................................................................................ 12
Applications Information ...................................................................................................................................................................... 14
SD Output Drive Strength .......................................................................................................................................................... 14
Power Supply Decoupling.......................................................................................................................................................... 14
Page 2 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
Supporting Documents ......................................................................................................................................................................... 15
Evaluation Board User Guide..................................................................................................................................................... 15
Application Notes ...................................................................................................................................................................... 15
PCB Design And Land Pattern Layout ................................................................................................................................................... 16
PCB Material And Thickness ...................................................................................................................................................... 16
Handling Instructions............................................................................................................................................................................ 17
Pick And Place Equipment ......................................................................................................................................................... 17
Reflow Solder............................................................................................................................................................................. 17
Board Wash ............................................................................................................................................................................... 17
Outline Dimensions............................................................................................................................................................................... 18
Ordering Guide .......................................................................................................................................................................... 18
Revision History ......................................................................................................................................................................... 19
Compliance Declaration Disclaimer...................................................................................................................................................... 20
Page 3 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
SPECIFICATIONS
TABLE 1. ELECTRICAL CHARACTERISTICS
(TA = +25°C, VDD = 1.8 to 3.3 V, SCK = 3.072 MHz, CLOAD = 30 pF unless otherwise noted. Typical specifications are not guaranteed.)
PARAMETER
PERFORMANCE
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Directionality
Sensitivity
Signal‐to‐Noise Ratio (SNR)
Equivalent Input Noise (EIN)
Omni
−26
65
1 kHz, 94 dB SPL
−27
−25
dB FS
dBA
29
dBA SPL
Derived from EIN and acoustic
overload point
Derived from EIN and full‐scale
acoustic level
Acoustic Dynamic Range
Digital Dynamic Range
87
91
dB
dB
Low frequency −3 dB point
High frequency −3 dB point
105 dB SPL
50
>20
0.3
Hz
kHz
%
Frequency Response
1
Total Harmonic Distortion (THD)
1
217 Hz, 100 mVp‐p square wave
superimposed on VDD = 1.8 V (A‐
weighted)
Power‐Supply Rejection (PSR)
−80
dB FS
Power‐Supply Rejection – Swept Sine
1 kHz sine wave
−90
dB FS
Acoustic Overload Point
Full‐Scale Digital Input
Noise Floor
10% THD
0 dB FS output
20 Hz to 20 kHz, A‐weighted, rms
116
120
−91
dB SPL
dB SPL
dB FS
POWER SUPPLY
Supply Voltage (VDD)
1.62
3.63
1.4
20
1.5
24
V
Normal Mode
Standby
Normal Mode
Standby
1.0
5
1.1
7
mA
µA
mA
µA
V
DD = 1.8 V
Supply Current (IS)
VDD = 3.3 V
DIGITAL FILTER
Acoustic input to digital output –
includes filter and I2S serial
output
Group Delay
2/fS
sec
Pass Band Ripple
Stop Band Attenuation
±0.3
dB
dB
58
20
Pass Band
kHz
fs = 48 kHz
Note 1: See Figure 4 and 5.
Page 4 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
TABLE 2. I²S DIGITAL INPUT/OUTPUT
(–40°C < TA < +85°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.)
NOTES
PARAMETER
CONDITIONS
MIN
MAX
UNITS
DIGITAL INPUT
0
0.25 × VDD
VDD
Voltage Input Low (VIL)
V
V
0.7 × VDD
Voltage Input High (VIH)
SD DIGITAL OUTPUT
0
0.25 × VDD
VDD
Voltage Output Low (VOL)
V
V
0.7 × VDD
Voltage Output High (VOH)
Maximum Load
CLK = 3.072 MHz
150
pF
TABLE 3. SERIAL DATA PORT TIMING SPECIFICATION
(–40°C < TA < +85°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.)
NOTES
PARAMETER
MIN
MAX
UNITS
SCK high (tSCH
SCK low (tSCL
SCK period (tSCP
SCK frequency (fSCK
WS setup (tWSS
WS hold (tWSH
)
50
ns
)
50
296
0.460
0
ns
ns
)
)
3.379
52.8
MHz
ns
)
)
20
ns
WS frequency (fWS)
7.19
kHz
TIMING DIAGRAM
t
SCP
t
SCH
SCK
WS
SD
t
t
t
WSH
WSS
SCL
Figure 1. Serial Data Port Timing
Page 5 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
ABSOLUTE MAXIMUM RATINGS
Stress above those listed as Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for
extended periods may affect device reliability.
TABLE 4. ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage (VDD)
RATING
−0.3 V to +3.63 V
−0.3 V to VDD + 0.3 V or 3.63 V, whichever is less
Digital Pin Input Voltage
Sound Pressure Level
Mechanical Shock
Vibration
160 dB
10,000 g
Per MIL‐STD‐883 Method 2007, Test Condition B
−40°C to +85°C
Biased
Temperature Range
−55°C to +150°C
Storage
ESD CAUTION
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can
discharge without detection. Although this
product features patented or proprietary
protection circuitry, damage may occur on
devices subjected to high energy ESD.
Therefore proper ESD precautions should be
taken to avoid performance degradation or
loss of functionality.
Page 6 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
SOLDERING PROFILE
CRITICAL ZONE
TO T
tP
T
L
P
T
P
RAMP-UP
T
L
tL
T
SMAX
T
SMIN
tS
RAMP-DOWN
PREHEAT
t25°C TO PEAK TEMPERATURE
TIME
Figure 2. Recommended Soldering Profile Limits
TABLE 5. RECOMMENDED SOLDERING PROFILE
PROFILE FEATURE
Sn63/Pb37
Pb‐Free
Average Ramp Rate (TL to TP)
1.25°C/sec max
1.25°C/sec max
Minimum Temperature
100°C
150°C
100°C
(TSMIN
Minimum Temperature
(TSMIN
Time (TSMIN to TSMAX), tS
)
Preheat
200°C
)
60 sec to 75 sec
1.25°C/sec
60 sec to 75 sec
1.25°C/sec
~50 sec
Ramp‐Up Rate (TSMAX to TL)
Time Maintained Above Liquidous (tL)
Liquidous Temperature (TL)
Peak Temperature (TP)
45 sec to 75 sec
183°C
217°C
215°C ±3°C/−3°C
260°C +0°C/−5°C
Time Within +5°C of Actual Peak
Temperature (tP)
20 sec to 30 sec
20 sec to 30 sec
3°C/sec max
5 min max
Ramp‐Down Rate
3°C/sec max
5 min max
Time +25°C (t25°C) to Peak Temperature
*The reflow profile in Table 5 is recommended for board manufacturing with InvenSense MEMS microphones. All microphones are
also compatible with the J‐STD‐020 profile
Page 7 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
GND
4
3
2
WS
5
6
VDD
SCK
CONFIG
SD
7
1
LR
Figure 3. Pin Configuration (Top View, Terminal Side Down)
TABLE 6. PIN FUNCTION DESCRIPTIONS
PIN
NAME
TYPE
FUNCTION
1
LR
Input
Left/Right channel select. When set low, the microphone outputs its signal in the left
channel of the I²S frame. When set high, the microphone outputs its signal in the right
channel.
2
3
CONFIG
VDD
Input
Pull to ground. The state of this pin is used at power‐up.
Power
Power, 1.62 to 3.63 V. This pin should be decoupled to GND with a 0.1 μF capacitor.
4
5
GND
WS
Ground
Input
Ground. Connect to ground on the PCB.
Serial Data‐Word Select for I²S Interface
6
7
SCK
SD
Input
Output
Serial Data Clock for I²S Interface
Serial Data Output for I²S Interface. This pin tri‐states when not actively driving the
appropriate output channel. The SD trace should have a 100 kΩ pulldown resistor to
discharge the line during the time that all microphones on the bus have tri‐stated their
outputs.
Page 8 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
TYPICAL PERFORMANCE CHARACTERISTICS
20
30
15
10
5
20
10
0
0
–5
‐10
‐20
‐30
–10
–15
10
100
1k
10k
FREQUENCY (Hz)
10
100
1k
10k
FREQUENCY (Hz)
Figure 4. Frequency Response Mask
Figure 5. Typical Frequency Response (Measured)
0
–20
10
–40
–60
1
–80
–100
0.1
–120
90
95
100
105
110
115
120
125
100
1k
10k
INPUT (dB SPL)
FREQUENCY (Hz)
Figure 7. Total Harmonic Distortion + Noise (THD+N) vs. Input SPL
Figure 6. PSR vs. Frequency, 100 mV p‐p Swept Sine Wave
1.0
0
112 dB SPL
116 dB SPL
0.8
120 dB SPL
‐5
124 dB SPL
0.6
‐10
0.4
0.2
‐15
‐20
‐25
‐30
‐35
0
–0.2
–0.4
–0.6
–0.8
90
95
100
105
110
115
120
125
0
0.0002
0.0004
TIME (Seconds)
0.0006
0.0008
0.0010
INPUT AMPLITUDE (dB SPL)
Figure 8. Linearity
Figure 9. Clipping Characteristics
Page 9 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
THEORY OF OPERATION
POWER MANAGEMENT
The ICS‐43432 has two power states: normal operation, and standby mode.
Startup and Normal Operation
The ICS‐43432 will begin to output non‐zero data 4462 SCK clock cycles (1.5 ms with fSCK = 3.072 MHz) after initial power‐up. The
data is valid to use after the initial 262,144 SCK cycles (85 ms with fSCK = 3.072 MHz). This startup time is applicable any time it is
entering normal operation mode, coming either from power‐down or out of standby. The part is in normal operation mode when SCK
and WS are active.
Table 7 shows the startup time for different sampling rates.
Table 7. Startup time
fS (WS frequency)
Time to non‐zero data output
Startup time to valid data
48 kHz
1.5 ms
3.0 ms
4.5 ms
9.0 ms
85 ms
171 ms
256 ms
512 ms
24 kHz
16 kHz
8 kHz
Standby Mode
The microphone enters standby mode when the frequency of SCK falls below about 1 kHz. It is recommended to enter standby
mode by stopping both the SCK and WS clock signals and pulling those signals to ground to avoid drawing current through the WS
pin’s internal pull‐down resistor. The timing for exiting standby mode is the same as normal startup.
It is not recommended to supply active clocks (WS and SCK) to the ICS‐43432 while there is no power supplied to VDD, doing this
continuously turns on ESD protection diodes, which may affect long‐term reliability of the microphone.
Soft Unmute
The ICS‐43432 has a soft unmute feature to prevent pops on power‐up. From the time that the ICS‐43432 starts to output data, the
volume will ramp up to the full‐scale output level over 256 WS clock cycles. With a 48 kHz sampling rate, this unmute sequence will
take about 5.3 ms.
SYNCHRONIZING MICROPHONES
Stereo ICS‐43432 microphones are synchronized by the WS signal, so audio captured from two microphones sharing the same clock
will be in sync. If the mics are enabled separately, this synchronization may take up to 0.35 ms after the enable signal is asserted
while internal data paths are flushed.
I²S DATA INTERFACE
The slave serial data port’s format is I²S, 24‐bit, twos complement. There must be 64 SCK cycles in each WS stereo frame. The L/R
control pin determines whether the ICS‐43432 outputs data in the left or right channel. When set to the left channel, the data will be
output following WS’s falling edge and when set to output on the right channel, data will be output following WS’s rising edge.
For a stereo application, the SD pins of the left and right ICS‐43432 microphones should be tied together as shown in Figure 10. The
format of a stereo I²S data stream is shown in Figure 11. Figure 12 and Figure 13 show the formats of a mono microphone data
stream for left and right microphones, respectively.
Data Output Mode
The output data pin (SD) is tri‐stated when it is not actively driving I²S output data. SD immediately tristates after the LSB
is output so that another microphone can drive the common data line.
Page 10 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
The SD trace should have a pulldown resistor to discharge the line during the time that all microphones on the bus have tri‐stated
their outputs. A 100 kΩ resistor is sufficient for this, as shown in Figure 10. If the SD line needs to be discharged faster than a 100 kΩ
resistor can, a smaller resistor, such as 10 kΩ, can be used.
Data Word Length
The output data word length is 24 bits per channel.
Data Word Format
The default data format is I²S (twos complement), MSB‐first. In this format, the MSB of each word is delayed by one SCK cycle from
the start of each half‐frame.
FROM VOLTAGE
SYSTEM MASTER
REGUL ATOR
(DSP, MICROCONTROLLER,
(1.8VTO 3.3V)
CODEC)
0.1µF
0.1µF
V
DD
VDD
LEFT
VDD
SCK
WS
SD
SCK
LR
LR
CONFIG
WS
SD
CONFIG
RIGHT
ICS‐43432
ICS‐43432
100kΩ
GND
GND
Figure 10. System Block Diagram
1
2
3
3
3
4
24
25
26
32
33
34
35
36
56
57
58
58
58
64
WS
SCK (64 × f )
S
SD (24‐BIT)
MSB
LSB
MSB
LSB
HIGH‐Z
LEFT CHANNEL
HIGH‐Z
RIGHT CHANNEL
HIGH‐Z
Figure 11. Stereo Output I²S Format
1
2
4
24
25
26
32
33
34
35
36
56
57
64
WS
SCK (64 × f )
S
SD (24‐BIT)
MSB
LSB
HIGH‐Z
HIGH‐Z
LEFT CHANNEL
Figure 12. Mono Output I²S Format Left Channel (LR = 0)
1
2
4
24
25
26
32
33
34
35
36
56
57
64
WS
SCK (64 × f )
S
SD (24‐BIT)
MSB
LSB
HIGH‐Z
RIGHT CHANNEL
HIGH‐Z
Figure 13. Mono Output I²S Format Right Channel (LR = 1)
Page 11 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
Data Output Format
The output data word length is 24 bits/channel. The data word format is 2’s complement, MSB first.
The output data pin (SD) is tri‐stated when it is not actively driving output data. SD will immediately tri‐state after the LSB is output
so that another microphone can drive the common data line.
DIGITAL MICROPHONE SENSITIVITY
The sensitivity of a digital output microphone is specified in units of dB FS (decibels relative to a full‐scale digital output). A 0 dB FS
sine wave is defined as a signal whose peak just touches the full‐scale code of the digital word (see Figure 5). This measurement
convention means that signals with a different crest factor may have an RMS level higher than 0 dB FS. For example, a full‐scale
square wave has an RMS level of 3 dB FS.
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
TIME (ms)
Figure 11. 1 kHz, 0 dB FS Sine Wave
The definition of a 0 dB FS signal must be understood when measuring the sensitivity of the ICS‐43432. An acoustic input signal of a
1 kHz sine wave at 94 dB SPL applied to the ICS‐43432 results in an output signal with a −26 dB FS level. This means that the output
digital word peaks at −26 dB below the digital full‐scale level. A common misunderstanding is that the output has an RMS level of
−29 dB FS; however, this is not the case because of the definition of a 0 dB FS sine wave.
There is no commonly accepted unit of measurement to express the instantaneous level of a digital signal output from the
microphone, as opposed to the RMS level of the signal. Some measurement systems express the instantaneous level of an individual
sample in units of D, where 1.0 D is digital full scale (see Figure 11). In this case, a −26 dB FS sine wave has peaks at 0.05 D.
For more information about digital microphone sensitivity, see the AN‐1112 Application Note, Microphone Specifications Explained.
DIGITAL FILTER CHARACTERISTICS
The ICS‐43432 has an internal digital bandpass filter. A high‐pass filter eliminates unwanted low frequency signals. A low‐pass
decimation filter scales the pass band with the sampling frequency and performs required out‐of‐band noise reduction.
High‐Pass Filter
The ICS‐43432 incorporates a high‐pass filter to remove unwanted dc and very low frequency components. With fS = 48 kHz, this high
pass filter has a −3 dB corner frequency of 3.7 Hz. The cutoff frequency scales with changes in sampling rate.
This digital filter response is in addition to the acoustic high‐pass response of the ICS‐43432 that has a −3 dB corner of 50 Hz.
Low‐Pass Decimation Filter
The analog‐to‐digital converter in the ICS‐43432 is a single‐bit, high order, sigma‐delta (Σ‐Δ) running at a high oversampling ratio.
The noise shaping of the converter pushes the majority of the noise well above the audio band and gives the microphone a wide
dynamic range. However, it does require a good quality low‐pass decimation filter to eliminate the high frequency noise.
Page 12 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
The pass band of the filter extends to 0.417 × fS and, in that band, has only 0.04 dB of ripple. The high frequency cutoff of −3 dB
occurs at 0.5 × fS. A 48 kHz sampling rate results in a pass band of 20.3 kHz and a half amplitude corner at 24 kHz; the stop‐band
attenuation of the filter is 58 dB. Note that these filter specifications scale with sampling frequency.
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Document Number: DS‐000038
Revision: 1.3
ICS‐43432
APPLICATIONS INFORMATION
SD OUTPUT DRIVE STRENGTH
The SD data output pin must drive a load that includes the PCB trace and the tri‐stated inputs of the other ICS‐43432 SD pins
connected to that same trace. The tri‐stated load capacitance of the ICS‐43432 SD pin is about 6 pF. The ICS‐43432 has been
designed to drive a load of 150 pF.
POWER SUPPLY DECOUPLING
For best performance and to avoid potential parasitic artifacts, placing a 0.1 µF ceramic type X7R or better capacitor between
Pin 3 (VDD) and ground is strongly recommended. The capacitor should be placed as close to Pin 3 as possible.
The connections to each side of the capacitor should be as short as possible, and the trace should stay on a single layer with no vias.
For maximum effectiveness, locate the capacitor equidistant from the power and ground pins or, when equidistant placement is not
possible, slightly closer to the power pin. Thermal connections to the ground planes should be made on the far side of the capacitor,
as shown in Figure 14.
VDD GND
CAPACITOR
TO V
DD
TO GND
Figure 14. Recommended Power Supply Bypass Capacitor Layout
Page 14 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
SUPPORTING DOCUMENTS
For additional information, see the following documents.
EVALUATION BOARD USER GUIDE
UG‐303, Bottom‐Port I2S Output MEMS Microphone Evaluation Board
APPLICATION NOTES
AN‐100, MEMS Microphone Handling and Assembly Guide
AN‐1003, Recommendations for Mounting and Connecting the InvenSense Bottom‐Ported MEMS Microphones
AN‐1112, Microphone Specifications Explained
AN‐1124, Recommendations for Sealing InvenSense Bottom‐Port MEMS Microphones from Dust and Liquid Ingress
AN‐1140, Microphone Array Beamforming
Page 15 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
PCB DESIGN AND LAND PATTERN LAYOUT
The recommended PCB land pattern for the ICS‐43432 should be laid out to a 1:1 ratio to the solder pads on the microphone
package, as shown in Figure 15. Take care to avoid applying solder paste to the sound hole in the PCB. A suggested solder paste
stencil pattern layout is shown in Figure 16. The diameter of the sound hole in the PCB should be larger than the diameter of the
sound port of the microphone. A minimum diameter of 0.5 mm is recommended.
6X 0.40X0.60
0.65
0.65
1.275
Ø1.65
Ø1.05
Figure 15. PCB Land Pattern Layout
Dimensions shown in millimeters
6X 0.30X0.50
Ø1.65
Ø1.15
2.15
0.1(4x)
0.65
0.65
1.275
Figure 16. Suggested Solder Paste Stencil Pattern Layout
Dimensions shown in millimeters
PCB MATERIAL AND THICKNESS
The performance of the ICS‐43432 is not affected by PCB thickness. The ICS‐43432 can be mounted on either a rigid or flexible PCB.
A flexible PCB with the microphone can be attached directly to the device housing with an adhesive layer. This mounting method
offers a reliable seal around the sound port while providing the shortest acoustic path for good sound quality.
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Document Number: DS‐000038
Revision: 1.3
ICS‐43432
HANDLING INSTRUCTIONS
PICK AND PLACE EQUIPMENT
The MEMS microphone can be handled using standard pick‐and‐place and chip shooting equipment. Take care to avoid damage to the
MEMS microphone structure as follows:
Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the
pickup tool can make contact with any part of the lid surface.
Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone.
Do not pull air out of or blow air into the microphone port.
Do not use excessive force to place the microphone on the PCB.
REFLOW SOLDER
For best results, the soldering profile must be in accordance with the recommendations of the manufacturer of the solder paste used to
attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified
in Figure 2 and Table 5.
BOARD WASH
When washing the PCB, ensure that water does not make contact with the microphone port. Do not use blow‐off procedures or
ultrasonic cleaning.
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Document Number: DS‐000038
Revision: 1.3
ICS‐43432
OUTLINE DIMENSIONS
f
0.10 C
d
0.10 (4X)
C
A
0.40X0.60 (6x)
(0.266)
4.00±0.10
j
0.10 m C A B
0.25
1.075
REFERENCECORNER
(0.72)
0.07
0.125±0.05
0.125±0.05
Ø1.65
Ø1.05
Ø0.35
B
0.25
1.10
(3.86)
0.125±0.05
4.00
1.0±0.10
TOP VIEW
SIDE VIEW
BOTTOM VIEW
Figure 17. 7‐Terminal Chip Array Small Outline No Lead Cavity
4.00 × 3.00 × 1.00 mm Body
Dimensions shown in millimeters
PIN 1 INDICATION
PART NUMBER
432
YYXXXX
DATE CODE
LOT TR ACEABILITY
Figure 18. Package Marking Specification (Top View)
ORDERING GUIDE
PART
TEMP RANGE
−40°C to +85°C
PACKAGE
7‐Terminal LGA_CAV
QUANTITY
5,000
PACKAGING
13” Tape and Reel
ICS‐43432
EV_ICS‐43432‐FX
Flex Evaluation Board
Page 18 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
REVISION HISTORY
REVISION DATE
REVISION DESCRIPTION
12/10/2014
11/02/2015
1/19/2016
4/27/2016
1.0
1.1
1.2
1.3
Initial Release
Updated Figure 15
Updated Power Management section
Updated Ordering Guide
Page 19 of 20
Document Number: DS‐000038
Revision: 1.3
ICS‐43432
COMPLIANCE DECLARATION DISCLAIMER
InvenSense believes the environmental and other compliance information given in this document to be correct but cannot
guarantee accuracy or completeness. Conformity documents substantiating the specifications and component characteristics are on
file. InvenSense subcontracts manufacturing, and the information contained herein is based on data received from vendors and
suppliers, which has not been validated by InvenSense.
This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by
InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications
are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and
software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither
expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no
responsibility for any claims or damages arising from information contained in this document, or from the use of products and
services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights,
mask work and/or other intellectual property rights.
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by
implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information
previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors
should not be used or sold in the development, storage, production or utilization of any conventional or mass‐destructive weapons
or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment,
transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime
prevention equipment.
©2016 InvenSense, Inc. All rights reserved. InvenSense, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion,
MotionApps, Digital Motion Processor, AAR and the InvenSense logo are trademarks of InvenSense, Inc. Other company and product
names may be trademarks of the respective companies with which they are associated.
©2016 InvenSense, Inc. All rights reserved.
Page 20 of 20
Document Number: DS‐000038
Revision: 1.3
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