U4083B-AFPG3 [TEMIC]
Low-Power Audio Amplifier for Telephone Applications; 低功耗音频放大器电话应用
| 型号： | U4083B-AFPG3 |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Low-Power Audio Amplifier for Telephone Applications |
| 文件： | 总11页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U4083B
Low-Power Audio Amplifier for Telephone Applications
Description
The integrated circuit, U4083B, is a low power audio The U4083B has an open loop gain of 80 dB whereas the
amplifier for a telephone loudspeaker. It has differential closed loop gain is adjusted with two external resistors. A
speaker outputs to maximize the output swing at low chip disable pin permits powering down and/or muting
supply voltages. There is no need for coupler capacitors. the input signal.
Features
Wide operating voltage range: 2 to 16 V
Output Power, P = 250 mW @ R = 32 (speaker)
o L
Low harmonic distortion (0.5% typical)
Wide range gain adjustable: 0 dB to 46 dB
Battery powered application due to low quiescent
supply current: 2.7 mA typical
Chip disable input to power down the integrated
circuit
Benefits
Low power down quiescent current
Drives a wide range of speaker loads
Low number of external components
Low current consumption
Block Diagram / Application Circuit
V
75 k
R
f
S
0.1 F
6
R
i
4
Amp.1
–
Input
5
V
i
3 k
C
i
+
VO1
FC1 3
4 k
4 k
C
1
1 F
50 k
–
8
5 F
125 k
2
VO2
+
Amp.2
C
2
FC2
1
50 k
Bias
CD
circuit
7
GND
93 7781 e
Figure 1.
Order Information
Extended Type Number
U4083B-AFP
Package
SO8
SO8
Remarks
U4083B-AFPG3
Taped and reeled
TELEFUNKEN Semiconductors
1 (11)
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Pin Description
Pin
1
2
3
4
5
6
7
8
Symbol
CD
FC2
FC1
V
i
VO1
V
S
GND
VO2
Function
1
2
3
4
8
7
6
5
CD
VO2
Chip disable
Filtering, power supply rejection
Filtering, power supply rejection
Amplifier input
Amplifier output 1
Voltage supply
GND
FC2
FC1
V
S
Ground
Amplifier output 2
V
i
VO1
94 8022
Figure 2. Pinning
(see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C and C also influence
the turn-on time of the circuit at power-up since capaci-
tors are charged up through the internal resistors (50 k
and 125 k ) as shown in the block diagram.
Functional Description
Including External Circuitry
1
2
Pin 1: Chip disable digital input (CD)
Pin 1 (chip disable) is used to power down the IC to con-
serve power or muting or both.
Figure 1 shows turn-on time versus C at V = 6 V, for two
2
S
different C values.
1
Turn-on time is 60% longer when V = 3 V and 20%
S
Input impedance at pin 1 is typically 90 k .
shorter when V = 9 V.
S
Logic 0 < 0.8 V
Logic 1 > 2 V
IC enabled (normal operation)
IC disabled
Turn-off time is less than 10 s
Figure 15 shows power supply current diagram. The
change in differential gain from normal operation to
muted operation (muting) is more than 70 dB.
Pin 4: Amplifier input
Pin 5: Amplifier output 1 V
Pin 8: Amplifier output 2 V
V
i
O1
O2
Switching characteristics are as follows:
turn-on time
turn-off time
t
t
= 12 to 15 ms
2 s
on
There are two identical operational amplifiers. Amp.1 has
an open loop gain 80 dB at 100 Hz (figure 2), whereas
the closed loop gain is set by external resistors, Rf and Ri
(figure 3). The amplifier is unity gain stable, and has a
unity gain frequency of approximately 1.5 MHz. A closed
loop gain of 46 dB is recommended for a frequency range
of 300 to 3400 Hz (voice band). Amp.2 is internally set
to a gain of –1.0 (0 dB). The outputs of both amplifiers are
capable of sourcing and sinking a peak current of 200 mA.
off
They are independent of C , C and V .
1
2
S
Voltages at Pins 2 and 3 are supplied from V and there-
S
fore do not change when the U4083B is disabled.
Outputs– V (Pin 5) and V (Pin 8) –turn to a high im-
pedance condition by removing the signal from the
speaker.
O1
O2
When signals are applied from an external source to the
outputs (disabled), they must not exceed the range be-
tween the supply voltage, V , and Ground.
Output voltage swing is between 0.4 V and V – 1.3 V at
s
maximum current (figures 18 and 19).
s
The output dc offset voltage between Pins 5 and 8 (V
O1
– V ) is mainly a function of the feedback resistor, R ,
Pins 2 and 3: Filtering, power supply rejection
O2
f
because the input offset voltage of the two amplifiers
generally neutralize each other.
Bias current of Amp. 1 which is constant with respect to
Power supply rejection is provided by capacitors C and
1
C at Pin 3 and Pin 2, respectively. C is dominant at high
2
1
frequencies whereas C is dominant at low frequencies
2
V , however flows out of Pin 4 (V ) and through R ,
s
i
f
(figures 4 to 7). Values of C and C depend on the
1
2
forcing V to shift negative by an amount equal to R I
01
f
IB
conditions of each application. For example, a line
powered speakerphone (telephone amplifier) will require
more filtering than a system powered by regulated power
supply.
and V positive to an equal amount.
O2
The output offset voltage specified in the electrical char-
acteristics is measured with the feedback resistor
(R = 75 k ) shown in typical application circuit. It takes
f
The amount of rejection is a function of the capacitors and into account bias current as well as internal offset voltages
the equivalent impedance looking into Pin 3 and Pin 2 of the amplifiers.
2 (11)
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Pin 6: Supply and power dissipation
Operating range of the integrated circuit is defined with
a peak operating load current of 200 mA (figures 8 to
13). It is further specified with respect to different loads
in figure 14. The left (ascending) portion of each of the
three curves is defined by the power level at which 10%
distortion occurs. The center flat portion of each curve is
defined by the maximum output current capability of the
integrated circuit. The right (descending) portion of each
curve is defined by the maximum internal power dissipa-
tion of the IC at 25°C. At higher ambient temperatures,
the maximum load power must be reduced according to
the above mentioned equation.
Power dissipation is shown in figures 8 to 10 for different
loads. Distortion characteristics are given in figures 11 to
13.
Tjmax – Tamb
Ptotmax
RthJA
where
T
= Junction temperature = 140°C
= Ambient temperature
jmax
T
amb
R
= Thermal resistance, junction-ambient
thJA
Layout Considerations
Power dissipated within the IC in a given application is
found from the following equation:
Normally a snubber is not needed at the output of the IC,
unlike many other audio amplifiers. However, the PC
board layout, stray capacitances, and the manner in which
the speaker wires are configured, may dictate otherwise.
Generally the speaker wires should be twisted tightly, and
be not more than a few cm (or inches) in length.
2
P
tot
= (V
I ) + (I
S
V ) – (R
I
)
S
RMS
S
L
RMS
I is obtained from figures 15
S
I
is the RMS current at the load R
RMS
L.
Absolute Maximum Ratings
Reference point Pin 7, T
= 25°C unless otherwise specified.
amb
Parameters
Symbol
Value
Unit
V
Supply voltage
Pin 6
V
S
–1.0 to +18
Voltages
Disabled
Pins 1, 2, 3 and 4
Pins 5 and 8
–1.0 to (VS +1.0)
–1.0 to (VS +1.0)
V
V
Output current
Pins 5 and 8
250
+140
mA
°C
Junction temperature
T
j
Storage temperature range
Ambient temperature range
T
–55 to +150
–20 to +70
440
°C
stg
T
amb
°C
Power dissipation: T
= 60°C
SO8
P
tot
mW
amb
Thermal Resistance
Parameters
Symbol
Value
180
Unit
K/W
Junction ambient
SO8
R
thJA
Operation Recommendation
Parameters
Symbol
Value
2 to 16
8.0 to 100
200
Unit
V
Supply voltage
Load impedance
Load current
Pin 6
V
S
L
Pins 5 to 8
R
I
mA
dB
V
L
Differential gain (5.0 kHz bandwidth)
Voltage @ CD Pin 1
G
0 to 46
VS
V
CD
Ambient temperature range
T
amb
–20 to +70
°C
TELEFUNKEN Semiconductors
3 (11)
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Electrical Characteristics
T
amb
= +25°C, reference point Pin 7, unless otherwise specified
Parameters
Test Conditions / Pins
Symbol Min.
Typ.
Max.
Unit
dB
Amplifiers (AC Characteristics)
Open gain loop
(Amp. 1, f < 100 Hz)
G
VOL1
80
Closed gain loop (Amp. 2)
V = 6.0 V, f = 1.0 kHz, R = 32
S L
G
V2
–0.35
0
+0.35
dB
Gain bandwidth product
Output power
G
1.5
MHz
BW
V = 3.0 V, R = 16 , d < 10%
Po
Po
Po
55
250
400
S
L
V = 6.0 V, R = 32 , d < 10%
mW
S
L
V = 12 V, R = 100 , d < 10%
S
L
Total harmonic distortion
(f = 1.0 kHz)
V = 6.0 V, R = 32 ,
S L
P = 125 mW
d
d
d
0.5
0.5
0.6
1.0
o
V > 3.0 V, R = 8
,
S
L
P = 20 mW
%
o
V > 12 V, R = 32
,
S
L
P = 200 mW
o
Power supply rejection ra-
tio
V = 6.0 V, V = 3.0 V
S S
C = , C = 0.01 F
PSRR
PSRR
50
dB
1
2
C = 0.1 F, C = 0, f = 1.0 kHz
12
52
1
2
C = 1.0 F, C = 5.0 F,
1
2
f = 1.0 kHz
PSRR
Muting
V = 6.0 V, 1.0 kHz < f < 20 kHz,
S
CD = 2.0 V
G
MUTE
>70
dB
Amplifiers (DC Characteristics)
Output dc level at V V = 3.0 V, R = 16
,
V
O
V
O
V
O
1.0
1.15
2.65
5.65
1.25
O1
S
L
V
O2
V = 6.0 V
S
V
V
V
R = 75 kW
f
V = 12 V
S
Output high level
I = – 75 mA,
V
V –1
O
OH
S
2.0 V < V < 16 V
S
Output low level
I = 75 mA,
O
V
0.16
OL
2.0 V < V < 16 V
S
Output dc offset voltage
(V – V
V = 6.0 V, R = 75 k ,
S f
R = 32
L
)
V
O
–30
0
+30
200
220
mV
nA
k
O1
O2
Input bias current at V
V = 6.0 V
S
–I
IB
100
150
i
Equivalent resistance at
Pin 3
V = 6.0 V
S
R
100
18
Equivalent resistance at
Pin 2
V = 6.0 V
S
R
25
40
k
Chip disable Pin 1
Input voltage low
Input voltage high
Input resistance
V
0.8
V
V
kW
IL
V
IH
2.0
50
V = V = 16 V
R
CD
90
65
175
S
CD
Power supply current
V = 3.0 V, R = , CD = 0.8 V
I
I
I
4.0
5.0
100
mA
mA
A
S
L
S
S
S
V = 16 V, R = , CD = 0.8 V
S
L
V = 3.0 V, R = , CD = 2.0 V
S
L
4 (11)
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Typical Temperature Performance
T
amb
= –20 to +70°C
Function
Input bias current at V
Typical Change
40
Units
pA/ °C
i
Total harmonic distortion
V = 6.0 V, R = 32 , P = 125 mW,
+ 0.003
%/ °C
S
L
o
f = 1.0 kHz
Power supply current
V = 3.0 V, R = , CD = 0 V
– 2.5
– 0.03
A/ °C
A/ °C
S
L
V = 3.0 V, R = , CD = 2.0 V
S
L
360
300
240
180
120
40
32
R = 150 k
R = 6 k
i
f
C = 5
F
1
R = 75k
R = 3 k
f
i
24
R
f
C
i
Input
R
i
V
O1
16
8
0.1
F
Amp 1
Amp 2
Outputs
1
F
V
O2
60
0
V switching from 0 to + 6V
S
0
100
10
0
1
10
0
2
4
6
8
93 7797 e
C ( F )
2
94 7838 e
Figure 1.
Figure 3.
60
50
40
30
100
80
99.33
92.67
C
1
F
1
Phase
C = 0.1
F
1
60
40
86.00
79.33
C = 10
F
2
Gain
C = 0
1
20
0
72.67
66.00
20
10
1000
0.1
1
10
100
100
0.1
1
10
94 7839 e
f ( kH )
93 7798 e
f ( kHz )
Figure 2.
Figure 4.
TELEFUNKEN Semiconductors
5 (11)
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
60
1200
1000
C
1 F
1
V
= 12 V
R
L
= 8
6 V
S
50
40
800
600
400
C = 0.1
1
F
C = 5
2
F
30
20
3V
C = 0
1
200
0
10
100
100
100
0
0
0
30
60
90
120
150
180
0.1
1
10
10
10
93 7799 e
P
( 150 mW )
93 7802 e
f ( kHz )
L
Figure 5.
Figure 8.
60
50
40
1200
1000
V
= 16 V
S
C
5
F
F
1
12 V
C = 1
1
R = 16
L
800
600
400
C = 1
2
F
6 V
C = 0.1
F
1
30
20
3V
200
0
C = 0
1
10
400
100
200
( 150 mW )
300
0.1
1
P
L
93 7803 e
f ( kHz )
93 7800 e
Figure 6.
Figure 9.
1200
1000
55
45
35
V
= 16 V
S
C
5 F
12 V
= 32
1
800
600
400
C = 1
F
1
R
L
C = 0
2
25
15
6 V
C = 0.1
F
1
200
0
3V
5
0.1
1
500
600
100
200
300
400
93 7801 e
f ( kHz )
P
L
( 150 mW )
93 7804 e
Figure 7.
Figure 10.
6 (11)
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
10
8
94 7842
e
V
R
= 3V
= 16
V
R
= 3V
= 8
f = 1 kHz
= 34dB
V
R
= 6V
= 32
S
L
S
L
S
L
G
V
6
4
2
0
V
R
= 16V
= 32
S
L
V
R
= 6V
= 16
S
L
V
R
= 12V
= 32
S
L
0
100
200
300
400
P
O
( mW )
Figure 11.
10
8
94 7843
e
V
R
= 3V
= 16
V
R
= 3V
= 8
f = 3 kHz
= 34dB
V
R
= 6V
= 32
S
L
S
L
S
L
G
V
6
4
2
0
V
R
= 6V
= 16
S
L
V
= 16V
S
R = 32 Limit
L
V
R
= 12V
= 32
S
L
0
100
200
300
400
P
O
( mW )
Figure 12.
TELEFUNKEN Semiconductors
7 (11)
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
10
94 7844
e
8
6
4
2
V
R
= 3V
= 16
V
R
= 3V
= 8
f = 1 or 3 kHz
= 12dB
V
R
= 6V
= 32
S
L
S
L
S
L
G
V
V
= 16V
V = 6V
S
R = 16 Limit
L
S
R = 32 Limit
L
V
R
= 12V
= 32
S
L
0
0
100
200
300
400
P
O
( mW )
Figure 13.
600
5
4
R
L
=
T
= 25°C - Derate at higher temperature
amb
500
400
300
200
R
= 32
L
C
C
= 0
D
3
16
2
1
0
100
0
8
= V
D
S
20
0
4
8
12
( V )
16
20
0
4
8
12
( V )
16
93 7806 e
V
S
93 7805 e
V
S
Figure 14.
Figure 15.
8 (11)
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
1.3
1.2
1.1
1.0
0.9
0.8
2V≤V ≤16V
S
200
0
40
80
120
( mA )
160
20 s/Div
93 7807 e
93 7809 e
I
L
Figure 16.
Figure 18.
2.0
1.6
1.2
V = 2V
S
0.8
0.4
0
V = 3V
S
V ≥ 6V
S
200
0
40
80
120
( mA )
160
20 s/Div
93 7808 e
93 7810 e
I
L
Figure 17.
Figure 19.
TELEFUNKEN Semiconductors
9 (11)
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Package Information
Package SO8
Dimensions in mm
5.2
4.8
5.00
4.85
3.7
1.4
0.25
0.2
0.4
3.8
0.10
1.27
6.15
5.85
3.81
8
5
technical drawings
according to DIN
specifications
13034
8
5
10 (11)
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
U4083B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of
continuous improvements to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain
such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
TELEFUNKEN Semiconductors
11 (11)
Rev. A2, 07-Apr-97
Preliminary Information
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