U4083B-MFPG3 [TEMIC]

Audio Amplifier, PDSO8, SOP-8;
U4083B-MFPG3
型号: U4083B-MFPG3
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

Audio Amplifier, PDSO8, SOP-8

放大器 光电二极管 商用集成电路
文件: 总11页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
U4083B  
Low-Power Audio Amplifier for Telephone Applications  
Description  
The integrated circuit, U4083B, is a low-power audio The U4083B has an open loop gain of 80 dB whereas the  
amplifier for telephone loudspeakers. It has differential closed loop gain is adjusted with two external resistors.  
speaker outputs to maximize the output swing at low A chip disable pin permits powering down and/or muting  
supply voltages. There is no need for coupler capacitors. the input signal.  
FD eWatidueroepserating voltage range: 2 to 16 V  
D Output power, P = 250 mW @ R = 32 W (speaker)  
o
L
D Low harmonic distortion (0.5% typical)  
D Wide gain range: 0 dB to 46 dB  
D Battery-powered application due to low quiescent  
supply current: 2.7 mA typical  
D Chip disable input to power down the integrated  
circuit  
Benefits  
D Low power-down quiescent current  
D Drives a wide range of speaker loads  
D Low number of external components  
D Low current consumption  
Block Diagram / Application Circuit  
75 kW  
V
S
R
f
0.1mF  
6
R
i
4
Amp.1  
Input  
5
VO1  
V
i
3 k  
W
C
i
+
FC1 3  
4 kW  
4 kW  
C
1
1mF  
50 k  
W
8
5mF  
125 k  
W
2
VO2  
+
Amp.2  
C
2
FC2  
1
50 k  
W
Bias  
circuit  
CD  
7
GND  
93 7781 e  
Figure 1. Block diagram/ application circuit  
Order Information  
Extended Type Number  
U4083B-MFP  
Package  
SO8  
SO8  
Remarks  
Tube  
Taped and reeled  
U4083B-MFPG3  
Rev. A4, 06-Mar-01  
1 (11)  
U4083B  
Pin Description  
Pins 2 and 3: Filtering,power supply rejection  
Power supply rejection is provided by capacitors C and  
1
2
3
4
8
7
6
5
CD  
VO2  
1
C at Pin 3 and Pin 2, respectively. C is dominant at high  
2
1
frequencies whereas C is dominant at low frequencies  
2
GND  
FC2  
FC1  
(figures 4 to 7). The values of C and C depend on the  
1
2
conditions of each application. For example, a line-  
powered speakerphone (telephone amplifier) will require  
more filtering than a system powered by regulated power  
supply.  
V
S
V
i
The amount of rejection is a function of the capacitors and  
the equivalent impedance at Pin 3 and Pin 2 (see electrical  
characteristic equivalent resistance, R).  
VO1  
94 8022  
Figure 2. Pinning  
Apart from filtering, capacitors C and C also influence  
1
2
the turn-on time of the circuit at power-up since capaci-  
tors are charged up through the internal resistors (50 kW  
and 125 kW) as shown in the block diagram.  
Pin  
1
2
3
4
Symbol  
CD  
FC2  
FC1  
V
i
Function  
Chip disable  
Filtering, power supply rejection  
Filtering, power supply rejection  
Amplifier input  
Figure 1 shows turn-on time versus C at V = 6 V, for  
2
S
two different C values.  
1
5
6
VO1  
Amplifier output 1  
Voltage supply  
Turn-on time is 60% longer when V = 3 V and 20%  
S
shorter when V = 9 V.  
V
S
S
7
8
GND  
VO2  
Ground  
Amplifier output 2  
Turn-off time is less than 10 ms  
Pin 4: Amplifier input  
V
i
Pin 5: Amplifier output 1 V  
Pin 8: Amplifier output 2 V  
O1  
O2  
Functional Description  
Including External Circuitry  
There are two identical operational amplifiers. Amp.1 has  
an open-loop gain w 80 dB at 100 Hz (figure 2), whereas  
the closed-loop gain is set by external resistors, R and R  
(figure 3). The amplifier is unity gain stable, and has a  
f
i
Pin 1: Chip disable * digital input (CD)  
Pin 1 (chip disable) is used to power down the IC to con-  
serve power or muting or both.  
unity gain frequency of approximately 1.5 MHz. A  
closed-loop gain of 46 dB is recommended for a  
frequency range of 300 to 3400 Hz (voice band). Amp.2  
is internally set to a gain of –1.0 (0 dB). The outputs of  
both amplifiers are capable of sourcing and sinking a peak  
current of 200 mA. Output voltage swing is between 0.4  
Input impedance at Pin 1 is typically 90 kW.  
Logic 0 < 0.8 V IC enabled (normal operation)  
Logic 1 > 2 V  
IC disabled  
Figure 15 shows the power supply current diagram. The  
change in differential gain from normal operation to  
muted operation (muting) is more than 70 dB.  
V and V – 1.3 V at maximum current (figures 18 and 19).  
s
The output dc offset voltage between Pins 5 and 8 (V  
O1  
– V ) is mainly a function of the feedback resistor, R ,  
because the input offset voltage of the two amplifiers  
neutralize each other.  
O2  
f
Switching characteristics are as follows:  
turn-on time  
t
= 12 to 15 ms  
on  
turn-off time  
t
v 2 ms  
off  
Bias current of Amp. 1 which is constant with respect to  
They are independent of C , C and V .  
1
2
S
V , however, flows out of Pin 4 (V ) and through R ,  
s
i
f
Voltages at Pins 2 and 3 are supplied from V and there- forcing V to shift negative by an amount equal to R I  
S
01  
f IB  
fore do not change when the U4083B is disabled. Outputs and V positive to an equal amount.  
O2  
* V (Pin 5) and V (Pin 8) * turn to a high imped-  
ance condition by removing the signal from the speaker.  
O1  
O2  
The output offset voltage specified in the electrical char-  
acteristics is measured with the feedback resistor  
When signals are applied from an external source to the (R = 75 kW) shown in typical application circuit. It takes  
f
outputs (disabled), they must not exceed the range into account bias current as well as internal offset voltages  
between the supply voltage, V , and ground.  
of the amplifiers.  
S
2 (11)  
Rev. A4, 06-Mar-01  
U4083B  
Pin 6: Supply and power dissipation  
The IC’s operating range is defined by a peak operating  
load current of "200 mA (figures 8 to 13). It is further  
specified with respect to different loads (see figure 14).  
The left (ascending) portion of each of the three curves is  
defined by the power level at which 10% distortion  
occurs. The center flat portion of each curve is defined by  
the maximum output current capability of the integrated  
circuit. The right (descending) portion of each curve is  
defined by the maximum internal power dissipation of the  
IC at 25°C. At higher ambient temperatures, the  
maximum load power must be reduced according to the  
above mentioned equation.  
Power dissipation is shown in figures 8 to 10 for different  
loads. Distortion characteristics are given in figures 11 to  
13.  
Tjmax – Tamb  
+
Ptotmax  
RthJA  
where  
T
= Junction temperature = 140°C  
= Ambient temperature  
jmax  
T
amb  
R
= Thermal resistance, junction-ambient  
thJA  
Layout Considerations  
Power dissipated within the IC in a given application is  
found from the following equation:  
Normally, a snubber is not needed at the output of the IC,  
unlike many other audio amplifiers. However, the PC  
board layout, stray capacitances, and the manner in which  
the speaker wires are configured, may dictate otherwise.  
Generally, the speaker wires should be twisted tightly, and  
be not more than a few cm (or inches) in length.  
2
P
tot  
= (V   I ) + (I  
  V ) – (R   I  
)
S
S
RMS  
S
L
RMS  
I is obtained from figure 15  
S
I
is the RMS current at the load R  
RMS  
L.  
Absolute Maximum Ratings  
Reference point Pin 7, T  
= 25°C unless otherwise specified.  
amb  
Parameters  
Symbol  
Value  
Unit  
V
Supply voltage  
Pin 6  
V
S
–1.0 to +18  
Voltages  
Disabled  
Pins 1, 2, 3 and 4  
Pins 5 and 8  
–1.0 to (VS +1.0)  
–1.0 to (VS +1.0)  
V
V
Output current  
Pins 5 and 8  
"250  
+140  
mA  
°C  
Junction temperature  
T
j
Storage temperature range  
Ambient temperature range  
T
–55 to +150  
–20 to +70  
440  
°C  
stg  
T
amb  
°C  
Power dissipation: T  
= 60°C  
SO8  
P
tot  
mW  
amb  
Thermal Resistance  
Parameters  
Symbol  
Value  
180  
Unit  
K/W  
Junction ambient  
SO8  
R
thJA  
Operation Recommendation  
Parameters  
Symbol  
Value  
2 to 16  
8.0 to 100  
"200  
Unit  
V
Supply voltage  
Load impedance  
Load current  
Pin 6  
V
S
L
Pins 5 to 8  
R
W
I
mA  
dB  
V
L
Differential gain (5.0 kHz bandwidth)  
Voltage @ CD Pin 1  
DG  
0 to 46  
VS  
V
CD  
Ambient temperature range  
T
amb  
–20 to +70  
°C  
Rev. A4, 06-Mar-01  
3 (11)  
U4083B  
Electrical Characteristics  
T
amb  
= +25°C, reference point Pin 7, unless otherwise specified  
Parameters  
Test Conditions / Pins  
Symbol Min.  
Typ.  
Max.  
Unit  
dB  
Amplifiers (AC Characteristics)  
Open-loop gain  
(Amp. 1, f < 100 Hz)  
G
VOL1  
80  
Closed-loop gain (Amp. 2) V = 6.0 V, f = 1.0 kHz, R = 32 W  
S
L
G
V2  
–0.35  
0
+0.35  
dB  
Gain bandwidth product  
Output power  
G
1.5  
MHz  
BW  
V = 3.0 V, R = 16 W, d < 10%  
Po  
55  
S
L
V = 6.0 V, R = 32 W, d < 10%  
Po  
Po  
250  
400  
mW  
S
L
V = 12 V, R = 100 W, d < 10%  
S
L
Total harmonic distortion  
(f = 1.0 kHz)  
V = 6.0 V, R = 32 W,  
S L  
P = 125 mW  
d
d
d
0.5  
0.5  
0.6  
1.0  
o
V > 3.0 V, R = 8 W,  
S
L
P = 20 mW  
%
o
V > 12 V, R = 32 W,  
S
L
P = 200 mW  
o
Power supply rejection  
ratio  
V = 6.0 V, DV = 3.0 V  
S S  
C = T, C = 0.01 mF  
PSRR  
PSRR  
50  
dB  
1
2
C = 0.1 mF, C = 0, f = 1.0 kHz  
12  
52  
1
2
C = 1.0 mF, C = 5.0 mF,  
1
2
f = 1.0 kHz  
PSRR  
Muting  
V = 6.0 V, 1.0 kHz < f < 20 kHz,  
S
CD = 2.0 V  
G
MUTE  
>70  
dB  
Amplifiers (DC Characteristics)  
Output DC level at V V = 3.0 V, R = 16 W  
,
V
O
V
O
V
O
1.0  
1.15  
2.65  
5.65  
1.25  
O1  
S
L
V
O2  
V = 6.0 V  
S
V
V
V
R = 75 kW  
f
V = 12 V  
S
Output high level  
I = – 75 mA,  
V
V –1  
O
OH  
S
2.0 V < V < 16 V  
S
Output low level  
I = 75 mA,  
O
V
0.16  
OL  
2.0 V < V < 16 V  
S
Output DC offset voltage  
(V – V  
V = 6.0 V, R = 75 kW,  
S f  
R = 32 W  
L
)
DV  
O
–30  
0
+30  
200  
220  
mV  
nA  
kW  
O1  
O2  
Input bias current at V  
V = 6.0 V  
S
–I  
IB  
100  
150  
i
Equivalent resistance at  
Pin 3  
V = 6.0 V  
S
R
100  
18  
Equivalent resistance at  
Pin 2  
V = 6.0 V  
S
R
25  
40  
kW  
Chip disable Pin 1  
Input voltage * low  
Input voltage * high  
Input resistance  
V
0.8  
V
V
kW  
IL  
V
IH  
2.0  
50  
V = V = 16 V  
R
90  
65  
175  
S
CD  
CD  
Power supply current  
V = 3.0 V, R = T, CD = 0.8 V  
I
I
I
4.0  
5.0  
100  
mA  
mA  
mA  
S
L
S
S
S
V = 16 V, R = T, CD = 0.8 V  
S
L
V = 3.0 V, R = T, CD = 2.0 V  
S
L
4 (11)  
Rev. A4, 06-Mar-01  
U4083B  
Typical Temperature Performance  
T
amb  
= –20 to +70°C  
Function  
Input bias current at V  
Typical Change  
Units  
"40  
pA/ °C  
i
Total harmonic distortion  
V = 6.0 V, R = 32 W, P = 125 mW,  
+ 0.003  
%/ °C  
S
L
o
f = 1.0 kHz  
Power supply current  
V = 3.0 V, R = T, CD = 0 V  
– 2.5  
– 0.03  
mA/ °C  
mA/ °C  
S
L
V = 3.0 V, R = T, CD = 2.0 V  
S
L
360  
300  
40  
32  
R = 150 kW  
R = 6 kW  
i
f
C = 5mF  
1
R = 75 kW  
R = 3 kW  
i
f
240  
180  
120  
24  
R
f
C
i
Input  
R
i
V
O1  
16  
8
0.1 mF  
Amp 1  
Amp 2  
1 mF  
Outputs  
V
O2  
60  
0
V switching from 0 to +6V  
S
0
10  
100  
0
2
4
6
8
0
1
10  
C ( mF )  
2
Frequency ( kHz )  
93 7797 e  
94 7838 e  
Figure 1. Turn-on time vs. C1, C2 at power on  
Figure 3. Differential gain vs. frequency  
60  
50  
40  
30  
100  
99.33  
92.67  
C w1 mF  
1
80  
60  
40  
Phase  
C = 0.1 mF  
1
86.00  
79.33  
C = 10 mF  
2
Gain  
C = 0  
1
20  
10  
20  
0
72.67  
66.00  
1000  
100  
0.1  
1
10  
f ( kHz )  
100  
0.1  
1
10  
94 7839 e  
f ( kHz )  
93 7798 e  
Figure 2. Amplifier 1 – open-loop gain and phase  
Figure 4. Power supply rejection vs. frequency  
Rev. A4, 06-Mar-01  
5 (11)  
U4083B  
60  
1200  
1000  
C w1 mF  
1
V = 12 V  
S
R
L
= 8 W  
50  
40  
C = 0.1 mF  
1
800  
600  
6 V  
C = 5 mF  
2
30  
20  
400  
200  
0
3V  
C = 0  
1
10  
100  
0.1  
1
10  
0
30  
60  
90  
P ( mW )  
L
120  
150  
180  
400  
600  
93 7799 e  
f ( kHz )  
93 7802 e  
Figure 5. Power supply rejection vs. frequency  
Figure 8. Device dissipation  
60  
1200  
1000  
V = 16 V  
S
C w5 mF  
1
12 V  
50  
40  
C = 1 mF  
1
R
L
= 16 W  
800  
600  
400  
C = 1 mF  
2
6 V  
C = 0.1 mF  
1
30  
20  
3V  
200  
0
C = 0  
1
10  
100  
0.1  
1
10  
0
100  
200  
300  
f ( kHz )  
P
L
( mW )  
93 7800 e  
93 7803 e  
Figure 6. Power supply rejection vs. frequency  
Figure 9. Device dissipation  
1200  
1000  
800  
55  
V = 16 V  
S
12 V  
C w5 mF  
1
45  
35  
C = 1 mF  
R
= 32 W  
1
L
600  
C = 0  
2
25  
400  
200  
0
6 V  
C = 0.1 mF  
1
15  
5
3V  
100  
500  
0.1  
1
10  
0
100  
200  
300  
P ( mW )  
L
400  
93 7801 e  
f ( kHz )  
93 7804 e  
Figure 7. Power supply rejection vs. frequency  
Figure 10. Device dissipation  
6 (11)  
Rev. A4, 06-Mar-01  
U4083B  
10  
8
94 7842  
e
V = 3V  
V = 3V  
f = 1 kHz  
V = 6V  
S
S
S
L
R
L
= 16W  
R
L
= 8W  
DG = 34dB  
R
= 32W  
V
6
4
2
0
V
R
= 16V  
= 32W  
S
L
V = 6V  
S
R
L
= 16W  
V
R
= 12V  
= 32W  
S
L
0
100  
200  
300  
400  
P
O
( mW )  
Figure 11. Distortion vs. power  
10  
8
94 7843  
e
V = 3V  
S
V = 3V  
S
f = 3 kHz  
V = 6V  
S
R
L
= 16W  
R
L
= 8W  
DG = 34dB  
R = 32W  
V
L
6
4
2
0
V = 6V  
S
R
= 16W  
L
V
R
= 16V  
S
L
= 32W Limit  
V
R
= 12V  
= 32W  
S
L
0
100  
200  
300  
400  
P
O
( mW )  
Figure 12. Distortion vs. power  
Rev. A4, 06-Mar-01  
7 (11)  
U4083B  
10  
94 7844  
e
8
6
4
2
V = 3V  
V = 3V  
f = 1 or 3 kHz  
V = 6V  
S
R = 32W  
L
S
S
R
L
= 16W  
R
L
= 8W  
DG = 12dB  
V
V
R
= 16V  
= 32W Limit  
V = 6V  
S
R = 16W Limit  
L
S
L
V
R
= 12V  
= 32W  
S
L
0
0
100  
200  
300  
400  
P
O
( mW )  
Figure 13. Distortion vs. power  
600  
5
T
amb  
= 25°C - Derate at higher temperature  
R
L
= R  
500  
400  
300  
200  
4
3
R
L
= 32 W  
C
C
= 0  
D
16 W  
2
1
0
100  
0
8 W  
= V  
D
S
20  
20  
0
4
8
12  
16  
0
4
8
12  
V ( V )  
16  
93 7806 e  
V ( V )  
93 7805 e  
S
S
Figure 14. Maximum allowable load power  
Figure 15. Power-supply current  
8 (11)  
Rev. A4, 06-Mar-01  
U4083B  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
2VV 16V  
S
200  
0
40  
80  
120  
( mA )  
160  
20 ms/Div  
93 7807 e  
93 7809 e  
I
L
Figure 16. Smal signal response  
Figure 18. VS – VOH vs. load current  
2.0  
1.6  
1.2  
V = 2V  
S
0.8  
0.4  
0
V = 3V  
S
V 6V  
S
200  
0
40  
80  
120  
( mA )  
160  
20 ms/Div  
93 7808 e  
93 7810 e  
I
L
Figure 17. Large signal response  
Figure 19. VOL vs. load current  
Rev. A4, 06-Mar-01  
9 (11)  
U4083B  
Package Information  
Package SO8  
Dimensions in mm  
5.2  
4.8  
5.00  
4.85  
3.7  
1.4  
0.25  
0.2  
0.4  
3.8  
0.10  
1.27  
6.15  
5.85  
3.81  
8
5
technical drawings  
according to DIN  
specifications  
13034  
1
4
10 (11)  
Rev. A4, 06-Mar-01  
U4083B  
Ozone Depleting Substances Policy Statement  
It is the policy of Atmel Germany GmbH to  
1. Meet all present and future national and international statutory requirements.  
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems  
with respect to their impact on the health and safety of our employees and the public, as well as their impact on  
the environment.  
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as  
ozone depleting substances (ODSs).  
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid  
their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these  
substances.  
Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed  
in the following documents.  
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively  
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental  
Protection Agency (EPA) in the USA  
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.  
Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances  
and do not contain such substances.  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended  
or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims,  
costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death  
associated with such unintended or unauthorized use.  
Data sheets can also be retrieved from the Internet:  
http://www.atmel–wm.com  
Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423  
Rev. A4, 06-Mar-01  
11 (11)  

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