74ACT11030DRG4 [TI]
8-Input Positive-NAND Gates 14-SOIC -40 to 85;
| 型号： | 74ACT11030DRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-Input Positive-NAND Gates 14-SOIC -40 to 85 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：396K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54ACT11030, 74ACT11030
8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
54ACT11030 . . . J PACKAGE
74ACT11030 . . . D OR N PACKAGE
(TOP VIEW)
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
C
B
A
D
E
F
V
NC
G
1
2
3
4
5
6
7
14
13
12
11
10
9
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
GND
Y
NC
NC
CC
• 500-mA Typical Latch-Up Immunity
at 125°C
H
8
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54ACT11030 . . . FK PACKAGE
(TOP VIEW)
description
Thesedevicescontainasingle8-inputNANDgate
and perform the following Boolean functions in
positive logic:
3
2
1
20 19
18
G
D
NC
C
4
5
6
7
8
17
16
15
14
NC
H
Y = A • B • C • D • E • F • G • H or
Y = A + B + C + D + E + F + G + H
NC
NC
NC
B
9 10 11 12 13
The 54ACT11030 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The 74ACT11030 is characterized for
operation from –40°C to 85°C.
NC – No internal connection
FUNCTION TABLE
INPUTS
A THRU H
OUTPUT
Y
All inputs H
L
One or more inputs L
H
†
logic symbol
logic diagram (positive logic)
3
A
3
A
&
2
2
B
B
1
1
C
C
14
D
14
D
5
5
Y
13
E
13
E
Y
12
F
12
F
9
9
G
G
8
8
H
H
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11030, 74ACT11030
8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions
54ACT11030
74ACT11030
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
–24
24
mA
mA
ns/V
°C
OH
OL
∆t/∆v
0
10
0
10
T
–55
125
–40
85
A
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11030, 74ACT11030
8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT11030
74ACT11030
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
5.4
3.8
4.8
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
I
= – 50 µA
OH
5.4
5.4
3.94
4.94
3.7
V
OH
= –24 mA
= – 50 mA
V
OH
4.7
†
I
I
3.85
OH
†
= –75 mA
3.85
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 µA
OL
OL
0.36
0.36
0.5
0.44
0.44
V
OL
I
= 24 mA
V
0.5
†
†
I
I
= 50 mA
1.65
OL
= 75 mA
1.65
±1
OL
I
I
V = V
or GND
or GND,
±0.1
±1
µA
µA
I
I
CC
CC
V = V
I = 0
O
4
80
40
CC
I
One input at 3.4 V,
Other inputs at V
‡
5.5 V
5 V
0.9
1
1
mA
pF
∆I
CC
or GND
CC
V = V or GND
CC
C
3.5
i
I
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5.4
54ACT11030
74ACT11030
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.5
MAX
8.1
MIN
1.5
MAX
8.8
MIN
1.5
MAX
8.5
t
t
PLH
A thru H
Y
ns
1.5
5.9
7.8
1.5
9.3
1.5
8.7
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance per gate
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
41
UNIT
C
C
pF
pd
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT11030, 74ACT11030
8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
From Output
Under Test
t
t
PHL
PLH
C
= 50 pF
L
500 Ω
(see Note A)
V
OH
CC
50% V
50% V
CC
Output
V
OL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
74ACT11030DR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 14
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
74ACT11030DR
D
2500
Pack Materials-Page 2
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