74ALVC162334DLRG4 [TI]
16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS; 16位通用总线驱动器，具有三态输出
| 型号： | 74ALVC162334DLRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总13页 (文件大小：308K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
FEATURES
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
•
Member of the Texas Instruments Widebus™
Family
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
•
•
•
•
•
Ideal for Use in PC100 Register DIMM
Operates From 1.65 V to 3.6 V
Max tpd of 3.8 ns at 3.3 V
OE
Y1
CLK
A1
2
3
Y2
GND
Y3
A2
GND
A3
4
±12-mA Output Drive at 3.3 V
5
Output Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
6
Y4
A4
7
V
CC
V
CC
8
Y5
Y6
GND
Y7
Y8
Y9
A5
A6
GND
A7
A8
•
•
•
Designed to Comply With JEDEC 168-Pin and
200-Pin SDRAM Buffered DIMM Specification
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Latch-Up Performance Exceeds 250 mA Per
JESD 17
A9
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Y10
GND
Y11
Y12
A10
GND
A11
A12
– 1000-V Charged-Device Model (C101)
V
CC
V
CC
DESCRIPTION/ORDERING INFORMATION
Y13
Y14
GND
Y15
Y16
NC
A13
A14
GND
A15
A16
LE
This 16-bit universal bus driver is designed for 1.65-V
to 3.6-V VCC operation.
Data flow from
A to Y is controlled by the
output-enable (OE) input. The device operates in the
transparent mode when the latch-enable (LE) input is
low. When LE is high, the A data is latched if the
clock (CLK) input is held at a high or low logic level. If
LE is high, the A data is stored in the latch/flip-flop on
the low-to-high transition of CLK. When OE is high,
the outputs are in the high-impedance state.
NC − No internal connection
The outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot and
undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
SN74ALVC162334DL
TOP-SIDE MARKING
Tube
SSOP - DL
ALVC162334
Tape and reel
SN74ALVC162334DLR
-40°C to 85°C
TSSOP - DGG
TVSOP - DGV
Tape and reel
Tape and reel
SN74ALVC162334DGGR
SN74ALVC162334DGVR
ALVC162334
VC2334
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
H
L
LE
X
CLK
A
X
L
X
Z
L
L
X
L
L
X
H
L
H
L
L
H
H
H
↑
↑
L
H
X
H
(1)
L
L or H
Y0
(1) Output level before the indicated steady-state input conditions
were established
LOGIC DIAGRAM (POSITIVE LOGIC)
1
OE
48
25
CLK
LE
47
1D
A1
2
C1
Y1
CLK
To 15 Other Channels
2
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
-0.5
-0.5
-0.5
MAX
4.6
UNIT
V
VCC Supply voltage range
VI
Input voltage range(2)
4.6
V
VO
IIK
IOK
IO
Output voltage range(2)(3)
VCC + 0.5
-50
V
Input clamp current
VI < 0
mA
mA
mA
mA
Output clamp current
VO < 0
-50
Continuous output current
Continuous current through each VCC or GND
±50
±100
70
DGG package
DGV package
DL package
θJA
Package thermal impedance(4)
58
°C/W
63
Tstg
Storage temperature range
-65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS(1)
MIN
MAX
UNIT
VCC
Supply voltage
1.65
3.6
V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65 × VCC
VIH
High-level input voltage
1.7
2
V
V
0.35 × VCC
VIL
Low-level input voltage
0.7
0.8
3.6
VCC
-2
VI
Input voltage
0
0
V
V
VO
Output voltage
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
-6
IOH
High-level output current
Low-level output current
mA
mA
-8
-12
2
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
6
IOL
8
12
10
85
∆t/∆v Input transition rise or fall rate
TA Operating free-air temperature
ns/V
-40
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
1.65 V to 3.6 V
1.65 V
2.3 V
MIN TYP(1)
VCC - 0.2
MAX
UNIT
IOH = -100 µA
IOH = -2 mA
IOH = -4 mA
1.2
1.9
1.7
2.4
2
VOH
2.3 V
V
IOH = -6 mA
3 V
IOH = -8 mA
IOH = -12 mA
IOL = 100 µA
IOL = 2 mA
IOL = 4 mA
2.7 V
3 V
2
1.65 V to 3.6 V
1.65 V
2.3 V
0.2
0.45
0.4
VOL
2.3 V
0.55
0.55
0.6
V
IOL = 6 mA
3 V
IOL = 8 mA
2.7 V
IOL = 12 mA
3 V
0.8
II
VI = VCC or GND
VO = VCC or GND
VI = VCC or GND,
3.6 V
±5
µA
µA
µA
µA
IOZ
ICC
∆ICC
3.6 V
±10
40
IO = 0
3.6 V
One input at VCC - 0.6 V, Other inputs at VCC or GND
3 V to 3.6 V
750
Control inputs
Data inputs
Outputs
5
5.5
7.5
Ci
VI = VCC or GND
3.3 V
3.3 V
pF
pF
Co
VO = VCC or GND
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 1.8 V
VCC = 2.7 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
(1)
fclock
tw
Clock frequency
Pulse duration
150
150
150
MHz
ns
(1)
(1)
(1)
(1)
(1)
(1)
(1)
LE low
3.3
3.3
1.4
1.2
1.4
0.9
1.1
3.3
3.3
1.7
1.6
1.5
0.9
1.1
3.3
3.3
1.5
1.3
1.2
0.9
1.1
CLK high or low
Data before CLK↑
tsu
Setup time
Hold time
CLK high
CLK low
ns
ns
Data before LE↑
Data after CLK↑
Data after LE↑
th
CLK high or low
(1) This information was not available at the time of publication.
4
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 1.8 V
VCC = 2.7 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
TYP
MIN
MAX
MIN
MAX
MIN MAX
(1)
fmax
150
1
150
150
MHz
(1)
(1)
(1)
(1)
(1)
A
4.4
5.8
5.2
6.4
4.7
4.5
6
1.1
1.3
1
3.9
5
tpd
LE
Y
1
ns
CLK
OE
OE
1
5.4
6.4
5.1
4.9
5.4
5
ten
Y
Y
1
1.1
1.7
ns
ns
tdis
1
(1) This information was not available at the time of publication.
SWITCHING CHARACTERISTICS
from 0°C to 65°C, CL = 50 pF
VCC = 3.3 V
± 0.15 V
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
MIN MAX
A
Y
Y
1.2
1.1
3.8
4.8
tpd
ns
CLK
OPERATING CHARACTERISTICS
TA = 25°C
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
TYP
31
7
TYP
36
(1)
Outputs enabled
Outputs disabled
Power dissipation
capacitance
Cpd
CL = 0, f = 10 MHz
pF
(1)
11
(1) This information was not available at the time of publication.
5
SN74ALVC162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004
PARAMETER MEASUREMENT INFORMATION
V
LOAD
S1
Open
R
L
From Output
Under Test
TEST
S1
GND
t
Open
V
LOAD
GND
pd
/t
/t
C
t
t
L
PLZ PZL
R
L
(see Note A)
PHZ PZH
LOAD CIRCUIT
INPUT
V
CC
V
M
V
LOAD
C
L
R
L
V
∆
V
I
t /t
r f
1.8 V
V
V
2.7 V
2.7 V
V
/2
/2
2 × V
2 × V
6 V
6 V
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
30 pF
30 pF
50 pF
50 pF
CC
CC
CC
2.5 V ± 0.2 V
2.7 V
V
CC
CC
CC
1.5 V
1.5 V
3.3 V ± 0.3 V
0.3 V
t
w
V
I
V
I
V
M
V
M
Input
Timing
Input
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
su
t
h
V
I
Output
Control
(low-level
enabling)
Data
Input
V
I
V
V
M
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
t
t
PLZ
PZL
Output
Waveform 1
S1 at V
LOAD
(see Note B)
V
V
/2
LOAD
V
I
V
M
Input
V
M
V
M
V + V
∆
OL
0 V
OL
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
V
OH
− V
∆
V
M
Output
V
M
V
M
0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
PACKAGING INFORMATION
Orderable Device
74ALVC162334DGGRE4
74ALVC162334DGGRG4
74ALVC162334DGVRE4
74ALVC162334DGVRG4
74ALVC162334DLG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
48
48
48
48
48
48
48
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
TVSOP
SSOP
DGG
DGV
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ALVC162334DLRG4
SN74ALVC162334DGGR
SN74ALVC162334DGVR
SN74ALVC162334DL
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
SSOP
DGG
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALVC162334DLR
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
24
SN74ALVC162334DGGR DGG
48
48
48
SITE 41
SITE 41
SITE 41
8.6
6.8
15.8
10.1
16.2
1.8
1.6
3.1
12
12
16
24
24
32
Q1
Q1
Q1
SN74ALVC162334DGVR
SN74ALVC162334DLR
DGV
DL
330
24
330
32
11.35
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74ALVC162334DGGR
SN74ALVC162334DGVR
SN74ALVC162334DLR
DGG
DGV
DL
48
48
48
SITE 41
SITE 41
SITE 41
346.0
346.0
346.0
346.0
346.0
346.0
41.0
41.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
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