74ALVC162835DGGRG4 [TI]
ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56;
| 型号： | 74ALVC162835DGGRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总15页 (文件大小：562K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
FEATURES
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
•
Member of the Texas Instruments Widebus™
Family
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
NC
GND
NC
•
•
•
•
Operates From 1.65 V to 3.6 V
Max tpd of 2 ns at 3.3 V
2
3
Y1
GND
Y2
A1
GND
A2
±12-mA Output Drive at 3.3 V
4
Ideal for Use in PC100 Register DIMM,
Revision 1.1
5
6
Y3
A3
•
Output Port Has Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
7
V
CC
V
CC
8
Y4
Y5
Y6
GND
Y7
Y8
A4
A5
A6
GND
A7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
•
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
A8
Y9
A9
Y10
Y11
Y12
GND
Y13
Y14
Y15
A10
A11
A12
GND
A13
A14
A15
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 18-bit universal bus driver is designed for 1.65-V
to 3.6-V VCC operation.
Data flow from
A to Y is controlled by the
V
CC
V
CC
output-enable (OE) input. The device operates in the
transparent mode when the latch-enable (LE) input is
high. When LE is low, the A data is latched if the
clock (CLK) input is held at a high or low logic level. If
LE is low, the A data is stored in the latch/flip-flop on
the low-to-high transition of CLK. When OE is high,
the outputs are in the high-impedance state.
Y16
Y17
GND
Y18
OE
A16
A17
GND
A18
CLK
GND
LE
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
NC − No internal connection
The output port includes equivalent 26-Ω series
resistors to reduce overshoot and undershoot.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVC162835DL
SSOP - DL
ALVC162835
Tape and reel
Tape and reel
Tape and reel
SN74ALVC162835DLR
SN74ALVC162835DGGR
SN74ALVC162835DGVR
-40°C to 85°C
TSSOP - DGG
TVSOP - DGV
ALVC162835
VC2835
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
H
L
LE
CLK
A
X
L
X
H
H
L
X
Z
L
X
L
X
H
L
H
L
L
↑
↑
L
L
H
X
H
(1)
L
L
L or H
Y0
(1) Output level before the indicated steady-state input conditions were
established
LOGIC DIAGRAM (POSITIVE LOGIC)
27
OE
30
CLK
28
54
LE
A1
1D
C1
3
Y1
CLK
To 17 Other Channels
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
-0.5
-0.5
-0.5
MAX
4.6
UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Output voltage range(2)(3)
V
4.6
VCC + 0.5
-50
V
VO
IIK
V
Input clamp current
VI < 0
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
-50
Continuous output current
Continuous current through each VCC or GND
±50
±100
64
DGG package
DGV package
DL package
θJA
Package thermal impedance(4)
48
°C/W
56
Tstg
Storage temperature range
-65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
RECOMMENDED OPERATING CONDITIONS(1)
MIN
MAX UNIT
VCC
Supply voltage
1.65
3.6
V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65 × VCC
VIH
High-level input voltage
1.7
2
V
0.35 × VCC
VIL
Low-level input voltage
0.7
0.8
3.6
VCC
-2
V
VI
Input voltage
0
0
V
V
VO
Output voltage
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
-6
IOH
High-level output current
Low-level output current
mA
mA
-8
-12
2
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
6
IOL
8
12
10
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
TA
-40
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
1.65 V to 3.6 V
1.65 V
2.3 V
MIN TYP(1)
VCC - 0.2
MAX
UNIT
IOH = -100 µA
IOH = -2 mA
IOH = -4 mA
1.2
1.9
1.7
2.4
2
VOH
2.3 V
V
IOH = -6 mA
3 V
IOH = -8 mA
IOH = -12 mA
IOL = 100 µA
IOL = 2 mA
IOL = 4 mA
2.7 V
3 V
2
1.65 V to 3.6 V
1.65 V
2.3 V
0.2
0.45
0.4
VOL
2.3 V
0.55
0.55
0.6
V
IOL = 6 mA
3 V
IOL = 8 mA
2.7 V
IOL = 12 mA
3 V
0.8
II
VI = VCC or GND
VO = VCC or GND
VI = VCC or GND,
3.6 V
±5
µA
µA
µA
µA
IOZ
ICC
∆ICC
3.6 V
±10
40
IO = 0
3.6 V
One input at VCC - 0.6 V,
Other inputs at VCC or GND
3 V to 3.6 V
750
Control inputs
Data inputs
3.5
5
Ci
VI = VCC or GND
3.3 V
3.3 V
pF
pF
Co Outputs
VO = VCC or GND
7
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 1.8 V
VCC = 2.7 V
UNIT
MIN
MAX MIN MAX MIN MAX
MIN
MAX
150
(1)
fclock
tw
Clock frequency
Pulse duration
150
150
MHz
ns
(1)
(1)
(1)
(1)
(1)
(1)
(1)
LE high
3.3
3.3
2.2
1.9
1.3
0.6
1.4
3.3
3.3
2.1
1.6
1.1
0.6
1.7
3.3
3.3
1.7
1.5
1
CLK high or low
Data before CLK↑
tsu
Setup time
Hold time
CLK high
CLK low
ns
ns
Data before LE↓
Data after CLK↑
Data after LE↓
0.7
1.4
th
CLK high or low
(1) This information was not available at the time of publication.
4
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 1.8 V
VCC = 2.7 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN TYP MIN MAX MIN
MAX MIN MAX
(1)
fmax
150
1
150
150
MHz
(1)
(1)
(1)
(1)
(1)
A
5
5.9
6.3
6.3
4.9
5
5.8
6.1
6.5
4.9
1
1.3
1.4
1.1
1.3
4.2
5.1
5.4
5.5
4.5
tpd
LE
Y
1.3
1.4
1.4
1
ns
CLK
OE
OE
ten
Y
Y
ns
ns
tdis
(1) This information was not available at the time of publication.
SWITCHING CHARACTERISTICS
from 0°C to 85°C, CL = 0 pF
VCC = 3.3 V
± 0.15 V
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
MIN
0.9
MAX
A
2
(1)
tpd
Y
ns
CLK
1.4
2.9
(1) Texas Instruments SPICE simulation data
SWITCHING CHARACTERISTICS
from 0°C to 65°C, CL = 50 pF
VCC = 3.3 V
± 0.15 V
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
MIN
1
MAX
A
4
5
tpd
Y
ns
CLK
1.9
OPERATING CHARACTERISTICS
TA = 25°C
VCC = 1.8 V
VCC = 2.5 V VCC = 3.3 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
TYP
35.5
12.5
TYP
40
(1)
Outputs enabled
Outputs disabled
Power dissipation
capacitance
Cpd
CL = 0,
f = 10 MHz
pF
(1)
14
(1) This information was not available at the time of publication.
5
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
PARAMETER MEASUREMENT INFORMATION
V
LOAD
S1
Open
R
L
From Output
Under Test
TEST
S1
GND
t
Open
V
LOAD
GND
pd
/t
/t
C
t
t
L
PLZ PZL
R
L
(see Note A)
PHZ PZH
LOAD CIRCUIT
INPUT
V
CC
V
M
V
LOAD
C
L
R
L
V
∆
V
I
t /t
r f
1.8 V
V
V
2.7 V
2.7 V
V
/2
/2
2 × V
2 × V
6 V
6 V
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
30 pF
30 pF
50 pF
50 pF
CC
CC
CC
2.5 V ± 0.2 V
2.7 V
V
CC
CC
CC
1.5 V
1.5 V
3.3 V ± 0.3 V
0.3 V
t
w
V
I
V
I
V
M
V
M
Input
Timing
Input
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
su
t
h
V
I
Output
Control
(low-level
enabling)
Data
Input
V
I
V
V
M
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
t
t
PLZ
PZL
Output
Waveform 1
S1 at V
LOAD
(see Note B)
V
V
/2
LOAD
V
I
V
M
Input
V
M
V
M
V + V
∆
OL
0 V
OL
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
V
OH
− V
∆
V
M
Output
V
M
V
M
0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
SN74ALVC162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES126H–FEBRUARY 1998–REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS
0
ALVC162835 Pullup
x
−0.01
)NjPC100 Requirements
−0.02
−0.03
−0.04
−0.05
−0.06
−0.07
−0.08
−0.09
−0.1
0
0.5
1.0
1.5
2.0
2.5
3.0
V
OH
− Output Voltage − V
Figure 2. IV Characteristics - Pullup
0.12
0.10
0.08
0.06
0.04
0.02
ALVC162835 Pulldown
x
)NjPC100 Requirements
0.00
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
OL
− Output Voltage − V
Figure 3. IV Characteristics - Pulldown
7
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
74ALVC162835DGGRE4
74ALVC162835DGGRG4
74ALVC162835DGVRE4
74ALVC162835DGVRG4
74ALVC162835DLG4
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
TSSOP
TSSOP
TVSOP
TVSOP
SSOP
DGG
56
56
56
56
56
56
56
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
ALVC162835
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DGG
DGV
DGV
DL
2000
2000
2000
20
Green (RoHS
& no Sb/Br)
ALVC162835
VC2835
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
VC2835
Green (RoHS
& no Sb/Br)
ALVC162835
ALVC162835
VC2835
SN74ALVC162835DGGR
SN74ALVC162835DGVR
SN74ALVC162835DL
TSSOP
TVSOP
SSOP
DGG
DGV
DL
2000
2000
20
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
ALVC162835
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74ALVC162835DGGR TSSOP
SN74ALVC162835DGVR TVSOP
DGG
DGV
56
56
2000
2000
330.0
330.0
24.4
24.4
8.6
6.8
15.6
11.7
1.8
1.6
12.0
12.0
24.0
24.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74ALVC162835DGGR
SN74ALVC162835DGVR
TSSOP
TVSOP
DGG
DGV
56
56
2000
2000
367.0
367.0
367.0
367.0
45.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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