BQ2002C [TI]
NiCd/NiMH Fast-Charge Management IC; 镍镉/镍氢电池快速充电管理IC
| 型号： | BQ2002C |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | NiCd/NiMH Fast-Charge Management IC |
| 文件： | 总12页 (文件大小：77K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
bq2002C
NiCd/NiMH Fast-Charge Management IC
Features
General Description
Fast charge is terminated by any of
the following:
➤
Fast charge of nickel cadmium
or nickel-metal hydride batter-
The bq2002C Fast-Charge IC is a low-
cost CMOS battery-charge controller
providing reliable charge termination
for both NiCd and NiMH battery appli-
cations. Controlling a current-limited
or constant-current supply allows the
bq2002C to be the basis for a cost-
effective stand-alone or system-inte-
grated charger. The bq2002C inte-
grates fast charge with pulsed-trickle
control in a single IC for charging one
or more NiCd or NiMH battery cells.
n
n
n
n
n
Peak voltage detection (PVD)
Negative delta voltage (-∆V)
Maximum voltage
ies
➤
➤
Dir ect LE D ou t pu t displa ys
charge status
Maximum temperature
Maximum time
Fast-charge termination by -∆V,
m a xim u m volt a ge, m a xim u m
t em per a t u r e, a n d m a xim u m
time
After fast charge, the bq2002C pulse-
t r ickles t h e ba t t er y per t h e pr e-
configured limits. Fast charge may be
inhibited using the INH pin. The
bq2002C may also be placed in low-
s t a n d by-p ower m od e t o r ed u ce
system power consumption.
➤
➤
Internal band-gap voltage ref-
erence
Fast charge is initiated on application
of the charging supply or battery
replacement. For safety, fast charge is
inhibited if the battery temperature
and voltage are outside configured
limits.
Selectable pulse-trickle charge
rates
➤
➤
Low-power mode
8-pin 300-mil DIP or 150-mil
SOIC
Pin Connections
Pin Names
TS
Temperature sense input
Supply voltage input
Charge inhibit input
Charge control output
TM
Timer mode select input
Charging status output
Battery voltage input
System ground
VCC
INH
CC
LED
BAT
VSS
TM
LED
BAT
1
2
3
4
8
7
6
5
CC
INH
V
CC
V
SS
TS
8-Pin DIP or
Narrow SOIC
PN-200201.eps
9/97 B
1
bq2002C
Ch ar ge con tr ol ou tpu t
CC
Pin Descriptions
An open-drain output used to control the
charging current to the battery. CC switch-
ing to high impedance (Z) enables charging
current to flow, and low to inhibit charging
current. CC is modulated to provide pulse
trickle.
Timer mode input
TM
A three-level input that controls the settings
for the fast charge safety timer, voltage ter-
mination mode, pulse-trickle, and voltage
hold-off time.
Ch ar gin g ou tpu t statu s
LED
BAT
Functional Description
Open-drain output that indicates the charging
status.
Figure 2 shows a state diagram and Figure 3 shows a
block diagram of the bq2002C.
Batter y in pu t voltage
Battery Voltage and Temperature
Measurements
The battery voltage sense input. The input to
this pin is created by a high-impedance re-
sistor divider network connected between
the positive and negative terminals of the
battery.
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
t h e ba t t er y sen se in pu t , BAT, sh ou ld r epr esen t a
single-cell potential for the battery under charge.
resistor-divider ratio of
A
System gr ou n d
VSS
TS
RB1
Tem per atu r e sen se in pu t
= N - 1
RB2
Input for an external battery temperature
monitoring thermistor.
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
a n d RB2 is t h e r esist or con n ect ed t o t h e n ega t ive
battery terminal. See Figure 1.
Su pply voltage in pu t
5.0V ±20% power input.
Ch ar ge in h ibit in pu t
VCC
INH
Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1 MΩ.
When high, INH suspends the fast charge in
progress. When returned low, the IC re-
sumes operation at the point where initially
suspended.
A ground-referenced negative temperature coefficient
thermistor placed near the battery may be used as a low-
cost temperature-to-voltage transducer. The temperature
sense voltage input at TS is developed using a resistor-
thermistor network between VCC and VSS. See Figure 1.
V
CC
PACK +
RT
V
RB1
RB2
R3
R4
CC
BAT
TM
T
S
N
T
bq2002C
bq2002C
C
V
SS
V
SS
BAT pin connection
Mid-level
setting for TM
NTC = negative temperature coefficient thermistor.
Thermistor connection
Fg2002/C.eps
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
2
bq2002C
Chip on
4.0V
Battery Voltage
too High?
V
CC
V
>
2V
BAT
V
< 2V
BAT
Battery Voltage
too Low?
V
< 0.84V
BAT
0.84V < V
BAT
V
< V /2
CC
V
> V /2
CC
TS
TS
Battery
Temperature?
Charge
Pending
Fast
LED =
Low
Trickle
LED =
Flash
V
V
V
> 0.84V and
< 2V and
> V /2
CC
BAT
BAT
TS
V
> 2V
BAT
V
V
> 2V or
BAT
< V /2 or
TS
CC
PVD or - V or
V
2V
BAT
Maximum Time Out
Trickle
LED = Z
SD2002C.eps
Figure 2. State Diagram
Clock
Phase
Generator
OSC
TM
Sample
History
Timing
Control
Voltage
Reference
INH
PVD, - V
ALU
A to D
Converter
Charge-Control
State Machine
LBAT
Check
MCV
Check
BAT
HTF TCO
Check Check
Power-On
Reset
Power
Down
CC
LED
V
TS
V
CC
SS
Bd2002CEG.eps
Figure 3. Block Diagram
3
bq2002C
V
= 0
Fast Charging
Pulse-Trickle
1s
Fast Charging
CC
CC Output
See
Table1
Charge initiated by application of power
Charge initiated by battery replacement
LED
TD2002C1.eps
Figure 4. Charge Cycle Phases
pending state. In this state pulse trickle charge is
applied to the battery and the LED flashes until the
voltage and temperature come into the allowed fast
Starting A Charge Cycle
charge range or VBAT rises above VMCV
. Anytime VBAT
Either of two events starts a charge cycle (see Figure 4):
1. Application of power to VCC or
≥ VMCV, the IC enters the Charge Complete/Battery
Absent state. In this state the LED is off and trickle
charge is applied to the battery until the next new
charge cycle begins.
2. Voltage at the BAT pin falling through the maximum
cell voltage VMCV where
Fast charge continues until termination by one or more of
the five possible termination conditions:
VMCV = 2V ±5%.
If the battery is within the configured temperature and
voltage limits, the IC begins fast charge. The valid
battery voltage range is VLBAT < VBAT < VMCV, where
n
n
n
n
n
Peak voltage detection (PVD)
Negative delta voltage (-∆V)
Maximum voltage
VLBAT = 0.175 VCC ±20%
The valid temperature range is VTS > VHTF where
VHTF = 0.6 VCC ±5%.
Maximum temperature
Maximum time
If VBAT ≤ VLBAT or VTS ≤ VHTF, the IC enters the charge-
Table 1. Fast-Charge Safety Time/Hold-Off Table
Typical
Fast-
Charge
Time Limits
(minutes)
Maximum
Synchronized
Sampling
Period
Typical PVD
and -∆V
Hold-Off
Pulse-
Trickle
Pulse Width
(ms)
Corresponding
Fast-Charge
Rate
Pulse-
Trickle
Rate
TM
Mid
Low
High
Termination
PVD
Time (seconds)
(seconds)
C/2
1C
2C
160
80
300
150
75
C/32
C/32
C/32
73
37
18
18.7
18.7
9.4
PVD
-∆V
40
Notes:
Typical conditions = 25°C, VCC = 5.0V
Mid = 0.5 CC ±0.5V
Tolerance on all timing is ±12%.
V
*
4
bq2002C
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/2, 1C, and 2C. Maximum time-out termina-
tion is enforced on the fast-charge phase, then reset, and
enforced again on the top-off phase, if selected. There is
no time limit on the trickle-charge phase.
PVD and -∆V Termination
There are two modes for voltage termination, depend-
ing on the state of TM. For -∆V (TM = high), if VBAT is
lower than any previously measured value by 12mV
±3mV, fast charge is terminated. For PVD (TM = low or
m id), a decr ea se of 2.5m V ±2.5m V t er m in a t es fa st
charge. The PVD and -∆V tests are valid in the range
1V < VBAT < 2V.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge
while the battery is idle in the charger. The battery is
pulse-trickle charged by driving the CC pin active once
per second for the period specified in Table 1. This
results in a trickle rate of C/32.
Synchronized Voltage Sampling
Voltage sampling at the BAT pin for PVD and -∆V termi-
nation may be synchronized to an external stimulus
u sin g t h e IN H in pu t . Low-h igh -low in pu t pu lses
between 100ns and 3.5ms in width must be applied at
the INH pin with a frequency greater than the “maxi-
mum synchronized sampling period” set by the state of
the TM pin as shown in Table 1. Voltage is sampled on
the falling edge of such pulses. If the time between
pulses is greater than the synchronizing period, voltage
sampling “free-runs” at once every 17 seconds. A sample
is taken by averaging together voltage measurements
taken 57µs apart. The IC takes 32 measurements in
PVD mode and 16 measurements in -∆V mode. The
resulting sample periods (9.17 and 18.18ms, respec-
tively) filter out harmonics centered around 55 and
109Hz. This technique minimizes the effect of any AC
line ripple that may feed through the power supply from
either 50 or 60Hz AC sources. If the INH input remains
high for more than 12ms, the voltage sample history
kept by the IC and used for PVD and -∆V termination
decisions is erased and a new history is started. Such a
reset is required when transitioning from free-running
to synchronized voltage sampling. The response of the
IC to pulses less than 100ns in width or between 3.5ms
and 12ms is indeterminate. The tolerance on all timing
is ±12%.
TM Pin
The TM pin is a three-level pin used to select the
charge timer, top-off, voltage termination mode, trickle
r a t e, a n d volt a ge h old-off per iod opt ion s. Ta ble 1
descr ibes t h e st a t es select ed by t h e TM pin . Th e
m id-level select ion in pu t is developed by a r esist or
divider bet ween VCC and ground that fixes the volt-
age on TM at VCC/2 ± 0.5V. See Figure 4.
Charge Status Indication
A fast charge in progress is uniquely indicated when the
LED pin goes low. In the charge pending state, the LED
pin is driven low for 500ms, then to high-Z for 500ms.
The LED pin is driven to the high-Z state for all other
conditions. Figure 2 outlines the state of the LED pin
during charge.
Charge Inhibit
Fast charge and top-off may be inhibited by using the
INH pin. When high, INH suspends all fast charge and
top-off activity and the internal charge timer. INH
fr eezes t h e cu r r en t st a t e of LE D u n t il in h ibit is
removed. Temperature monitoring is not affected by the
INH pin. During charge inhibit, the bq2002C continues
to pulse-trickle charge the battery per the TM selection.
When INH returns low, charge control and the charge
timer resume from the point where INH became active.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off time, the PVD and -∆V terminations
are disabled. This avoids premature termination on the
voltage spikes sometimes produced by older batteries
when fast-charge current is first applied. Maximum
voltage and temperature terminations are not affected
by the hold-off period.
Low-Power Mode
The IC enters a low-power state when VBAT is driven
above the power-down threshold (VPD) where
Maximum Voltage, Temperature, and Time
VPD = VCC - (1V ±0.5V)
Any time the voltage on the BAT pin exceeds the maxi-
mum cell voltage, VMCV, fast charge is terminated.
Both the CC pin and the LED pin are driven to the
high-Z state. The operating current is reduced to less
than 1µA in this mode. When VBAT returns to a value
below VPD, the IC pulse-trickle charges until the next
new charge cycle begins.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO, where
VTCO = 0.5 VCC ± 5%.
5
bq2002C
Absolute Maximum Ratings
Symbol
VCC
Parameter
VCC relative to VSS
Minimum
-0.3
Maximum
+7.0
Unit
V
Notes
VT
DC voltage applied on any pin
excluding VCC relative to VSS
-0.3
+7.0
V
TOPR
Operating ambient temperature
Storage temperature
0
-40
-
+70
+85
°C
°C
°C
°C
Commercial
TSTG
TSOLDER
TBIAS
Soldering temperature
+260
+85
10 sec max.
Temperature under bias
-40
Note:
Permanent device damage may occur if Absolu te Ma xim u m Ra tin gs are exceeded. Functional opera-
tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds (T = 0 to 70°C; V
±20%)
CC
A
Symbol
Parameter
Rating
Tolerance
Unit
Notes
VTCO
Temperature cutoff
0.5 VCC
*
V
±5%
VTS ≤ VTCO inhibits/terminates
fast charge
VHTF
High-temperature fault
Maximum cell voltage
Minimum cell voltage
V
V
0.6 VCC
±5%
±5%
VTS ≤ VHTF inhibits fast charge
start
VMCV
2
VBAT ≥ VMCV inhibits/terminates
fast charge
VLBAT
V
0.175 VCC
-12
±20%
±3
VBAT ≤ VLBAT inhibits fast charge
BAT input change for
mV
-∆V
-∆V detection
PVD
BAT input change for
PVD detection
-2.5
mV
±2.5
6
bq2002C
Recommended DC Operating Conditions (T = 0 to 70°C)
A
Symbol
VCC
Condition
Supply voltage
Minimum
Typical
Maximum
Unit
V
Notes
4.0
5.0
6.0
2
VDET
VBAT
VTS
-∆V, PVD detect voltage
Battery input
1
0
-
-
-
-
-
-
V
VCC
VCC
-
V
Thermistor input
Logic input high
Logic input high
Logic input mid
0.5
V
VTS < 0.5V prohibited
VIH
0.5
V
INH
TM
TM
VCC - 0.5
-
V
VCC
VCC
VIM
V
- 0.5
+ 0.5
2
2
VIL
Logic input low
Logic input low
Logic output low
Power down
-
-
-
-
-
0.1
V
V
V
V
INH
-
0.5
TM
VOL
VPD
-
0.8
LED, CC, IOL = 10mA
VCC - 1.5
VCC - 0.5
VBAT ≥ VPD max. powers
down bq2002C;
VBAT < VPD min. =
normal operation.
ICC
Supply current
-
-
500
µA
µA
Outputs unloaded,
VCC = 5.1V
ISB
IOL
IL
Standby current
LED, CC sink
Input leakage
-
10
-
-
-
-
-
1
-
VCC = 5.1V, VBAT = VPD
mA @VOL = VSS + 0.8V
±1
-
µA
µA
INH, CC, V = VSS to VCC
LED, CC
IOZ
Output leakage in
high-Z state
-5
Note:
All voltages relative to VSS.
7
bq2002C
Impedance
Symbol
Parameter
Minimum
Typical
Maximum
Unit
MΩ
MΩ
RBAT
RTS
Battery input impedance
TS input impedance
50
50
-
-
-
-
Timing (T = 0 to +70°C; V
±10%)
CC
A
Symbol
dFCV
Parameter
Minimum Typical Maximum
-12 12
Unit
Notes
Time base variation
-
%
Note:
Typical is at TA = 25°C, VCC = 5.0V.
8
bq2002C
(
)
8-Pin DIP PN
(
)
8-Pin PN 0.300" DIP
Inches
Millimeters
D
Min.
0.160
0.015
0.015
0.055
0.008
0.350
0.300
0.230
0.300
0.090
0.115
0.020
Max.
0.180
0.040
0.022
0.065
0.013
0.380
0.325
0.280
0.370
0.110
0.150
0.040
Min.
4.06
0.38
0.38
1.40
0.20
8.89
7.62
5.84
7.62
2.29
2.92
0.51
Max.
4.57
1.02
0.56
1.65
0.33
9.65
8.26
7.11
9.40
2.79
3.81
1.02
Dimension
A
A1
B
E1
E
B1
C
A
B1
A1
D
E
L
C
E1
e
B
S
G
L
e
G
S
9
bq2002C
8-Pin SOIC Narrow (SN)
(
)
8-Pin SN 0.150" SOIC
Inches
Millimeters
Min.
Min.
0.060
0.004
0.013
0.007
0.185
0.150
0.045
0.225
0.015
Max.
0.070
0.010
0.020
0.010
0.200
0.160
0.055
0.245
0.035
Max.
1.78
0.25
0.51
0.25
5.08
4.06
1.40
6.22
0.89
Dimension
A
1.52
0.10
0.33
0.18
4.70
3.81
1.14
5.72
0.38
A1
B
C
D
E
e
H
L
10
bq2002C
Data Sheet Revision History
Change No.
Page No.
Description
Revised format and outline of this data sheet
1
All
Note:
Change 1 = Sept. 1997 B changes from Dec. 1995.
Ordering Information
bq2002C
Pa ck a ge Op tion :
PN = 8-pin plastic DIP
SN = 8-pin narrow SOIC
Device:
bq2002C Fast-Charge IC
11
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Copyright 1999, Texas Instruments Incorporated
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