BQ2002CSNG4 [TI]

NiCd/NiMH Charge Controller with Negative dV and Peak Voltage Detection Termination 8-SOIC 0 to 70;


型号：	BQ2002CSNG4
厂家：	TEXAS INSTRUMENTS
描述：	NiCd/NiMH Charge Controller with Negative dV and Peak Voltage Detection Termination 8-SOIC 0 to 70 光电二极管
文件：	总17页 (文件大小：388K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

bq2002C

NiCd/NiMH Fast-Charge Management IC

Features

General Description

Fast charge is terminated by any of

the following:

➤

Fast charge of nickel cadmium

or nickel-metal hydride batter-

The bq2002C Fast-Charge IC is a low-

cost CMOS battery-charge controller

providing reliable charge termination

for both NiCd and NiMH battery appli-

cations. Controlling a current-limited

or constant-current supply allows the

bq2002C to be the basis for a cost-

effective stand-alone or system-inte-

grated charger. The bq2002C inte-

grates fast charge with pulsed-trickle

control in a single IC for charging one

or more NiCd or NiMH battery cells.

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

ies

➤

Dir ect LE D ou t pu t displa ys

charge status

Maximum temperature

Maximum time

Fast-charge termination by -∆V,

m a xim u m volt a ge, m a xim u m

t em per a t u r e, a n d m a xim u m

time

After fast charge, the bq2002C pulse-

t r ickles t h e ba t t er y per t h e pr e-

configured limits. Fast charge may be

inhibited using the INH pin. The

bq2002C may also be placed in low-

s t a n d by-p ower m od e t o r ed u ce

system power consumption.

➤

Internal band-gap voltage ref-

erence

Fast charge is initiated on application

of the charging supply or battery

replacement. For safety, fast charge is

inhibited if the battery temperature

and voltage are outside configured

limits.

Selectable pulse-trickle charge

rates

➤

Low-power mode

8-pin 300-mil DIP or 150-mil

SOIC

Pin Connections

Pin Names

Temperature sense input

Supply voltage input

Charge inhibit input

Charge control output

Timer mode select input

Charging status output

Battery voltage input

System ground

V_CC

INH

LED

BAT

V_SS

LED

BAT

INH

8-Pin DIP or

Narrow SOIC

PN-200201.eps

SLUS136 - AUGUST 2011

bq2002C

Ch ar ge con tr ol ou tpu t

Pin Descriptions

An open-drain output used to control the

charging current to the battery. CC switch-

ing to high impedance (Z) enables charging

current to flow, and low to inhibit charging

current. CC is modulated to provide pulse

trickle.

Timer mode input

A three-level input that controls the settings

for the fast charge safety timer, voltage ter-

mination mode, pulse-trickle, and voltage

hold-off time.

Ch ar gin g ou tpu t statu s

LED

BAT

Functional Description

Open-drain output that indicates the charging

status.

Figure 2 shows a state diagram and Figure 3 shows a

block diagram of the bq2002C.

Batter y in pu t voltage

Battery Voltage and Temperature

Measurements

The battery voltage sense input. The input to

this pin is created by a high-impedance re-

sistor divider network connected between

the positive and negative terminals of the

battery.

Battery voltage and temperature are monitored for

maximum allowable values. The voltage presented on

t h e ba t t er y sen se in pu t , BAT, sh ou ld r epr esen t a

single-cell potential for the battery under charge.

resistor-divider ratio of

System gr ou n d

V_SS

RB1

Tem per atu r e sen se in pu t

= N - 1

RB2

Input for an external battery temperature

monitoring thermistor.

is recommended to maintain the battery voltage within

the valid range, where N is the number of cells, RB1 is

the resistor connected to the positive battery terminal,

a n d RB2 is t h e r esist or con n ect ed t o t h e n ega t ive

battery terminal. See Figure 1.

Su pply voltage in pu t

5.0V ±20% power input.

Ch ar ge in h ibit in pu t

V_CC

INH

Note: This resistor-divider network input impedance to

end-to-end should be at least 200kΩ and less than 1 MΩ.

When high, INH suspends the fast charge in

progress. When returned low, the IC re-

sumes operation at the point where initially

suspended.

A ground-referenced negative temperature coefficient

thermistor placed near the battery may be used as a low-

cost temperature-to-voltage transducer. The temperature

sense voltage input at TS is developed using a resistor-

thermistor network between V_CCand V_SS. See Figure 1.

PACK +

RB1

RB2

BAT

bq2002C

BAT pin connection

Mid-level

setting for TM

NTC = negative temperature coefficient thermistor.

Thermistor connection

Fg2002/C.eps

Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration

bq2002C

Chip on

4.0V

Battery Voltage

too High?

BAT

< 2V

BAT

Battery Voltage

too Low?

< 0.84V

BAT

0.84V < V

BAT

< V /2

> V /2

Battery

Temperature?

Charge

Pending

Fast

LED =

Low

Trickle

LED =

Flash

> 0.84V and

< 2V and

> V /2

BAT

> 2V

BAT

> 2V or

BAT

< V /2 or

PVD or - V or

BAT

Maximum Time Out

Trickle

LED = Z

SD2002C.eps

Figure 2. State Diagram

Clock

Phase

Generator

OSC

Sample

History

Timing

Control

Voltage

Reference

INH

PVD, - V

ALU

A to D

Converter

Charge-Control

State Machine

LBAT

Check

MCV

Check

BAT

HTF TCO

Check Check

Power-On

Reset

Power

Down

LED

Bd2002CEG.eps

Figure 3. Block Diagram

bq2002C

= 0

Fast Charging

Pulse-Trickle

Fast Charging

CC Output

See

Table1

Charge initiated by application of power

Charge initiated by battery replacement

LED

TD2002C1.eps

Figure 4. Charge Cycle Phases

pending state. In this state pulse trickle charge is

applied to the battery and the LED flashes until the

voltage and temperature come into the allowed fast

Starting A Charge Cycle

charge range or V_BATrises above V_MCV

. Anytime V_BAT

Either of two events starts a charge cycle (see Figure 4):

1. Application of power to V_CCor

≥ V_MCV, the IC enters the Charge Complete/Battery

Absent state. In this state the LED is off and trickle

charge is applied to the battery until the next new

charge cycle begins.

2. Voltage at the BAT pin falling through the maximum

cell voltage V_MCVwhere

Fast charge continues until termination by one or more of

the five possible termination conditions:

V_MCV= 2V ±5%.

If the battery is within the configured temperature and

voltage limits, the IC begins fast charge. The valid

battery voltage range is V_LBAT< V_BAT< V_MCV,where

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

V_LBAT= 0.175 V_CC±20%

The valid temperature range is V_TS> V_HTFwhere

V_HTF= 0.6 V_CC±5%.

Maximum temperature

Maximum time

If V_BAT≤ V_LBATor V_TS≤ V_HTF, the IC enters the charge-

Table 1. Fast-Charge Safety Time/Hold-Off Table

Typical

Fast-

Charge

Time Limits

(minutes)

Maximum

Synchronized

Sampling

Period

Typical PVD

and -∆V

Hold-Off

Pulse-

Trickle

Pulse Width

(ms)

Corresponding

Fast-Charge

Rate

Pulse-

Trickle

Rate

Mid

Low

High

Termination

PVD

Time (seconds)

(seconds)

C/2

160

300

150

C/32

18.7

9.4

PVD

-∆V

Notes:

Typical conditions = 25°C, V_CC= 5.0V

Mid = 0.5 _CC±0.5V

Tolerance on all timing is ±12%.

bq2002C

_______________________________________________________________________

PVD and -∆V Termination

There are two modes for voltage termination, depending on

the state of TM. For -∆V (TM = high), if VBAT is lower than any

previously measured value by 12mV ±3mV, fast charge is

terminated. For PVD (TM = low or mid), a decrease of 2.5mV

±2.5mV terminates fast charge. The PVD and -∆V tests are

valid in the range 1V<VBAT <2V.

Maximum charge time is configured using the TM pin. Time

settings are available for corresponding charge rates of C/2,

1C, and 2C. Maximum time-out termination is enforced on the

fast-charge phase. There is no time limit on the trickle-charge

phase.

Pulse-Trickle Charge

Synchronized Voltage Sampling

Pulse-trickle is used to compensate for self-discharge while

the battery is idle in the charger. The battery is pulse-trickle

charged by driving the CC pin active once per second for the

period specified in Table 1. This results in a trickle rate of

C/32.

Voltage sampling at the BAT pin for PVD and -∆V termination

may be synchronized to an external stimulus using the INH

input. Low-high-low input pulses between 100ns and 3.5ms in

width must be applied at the INH pin with a frequency

greater than the “maximum synchronized sampling period”

set by the state of the TM pin as shown in Table 1. Voltage is

sampled on the falling edge of such pulses. If the time between

pulses is greater than the synchronizing period, voltage

sampling “free-runs” at once every 17 seconds. A sample is

taken by averaging together voltage measurements taken

57µs apart. The IC takes 32 measurements in PVD mode and

16 measurements in -∆V mode. The resulting sample periods

(9.17 and 18.18ms, respectively) filter out harmonics centered

around 55 and 109Hz. This technique minimizes the effect of

any AC line ripple that may feed through the power supply

from either 50 or 60Hz AC sources. If the INH input remains

high for more than 12ms, the voltage sample history kept by

the IC and used for PVD and -∆V termination decisions is

erased and a new history is started. Such a reset is required

when transitioning from free-running to synchronized voltage

sampling. The response of the IC to pulses less than 100ns in

width or between 3.5ms and 12ms is indeterminate. The

tolerance on all timing is ±12%.

TM Pin

The TM pin is a three-level pin used to select the charge

timer, voltage termination mode, trickle rate, and voltage

hold-off period options. Table 1 describes the states selected

by the TM pin. The mid-level selection input is developed by a

resistor divider between VCC and ground that fixes the voltage

on TM at VCC/2 ± 0.5V. See Figure 4.

Charge Status Indication

A fast charge in progress is uniquely indicated when the LED

pin goes low. In the charge pending state, the LED pin is

driven low for 500ms, then to high-Z for 500ms. The LED pin

is driven to the high-Z state for all other conditions. Figure 2

outlines the state of the LED pin during charge.

Charge Inhibit

Fast charge may be inhibited by using the INH pin. When

high, INH suspends all fast charge activity and the internal

charge timer. INH freezes the current state of LED until

inhibit is removed. Temperature monitoring is not affected by

the INH pin. During charge inhibit, the bq2002C continues to

pulse-trickle charge the battery per the TM selection. When

INH returns low, charge control and the charge timer resume

from the point where INH became active.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging. During

the hold-off time, the PVD and -∆V terminations are disabled.

This avoids premature termination on the voltage spikes

sometimes produced by older batteries when fast-charge

current is first applied. Maximum voltage and temperature

terminations are not affected by the hold-off period.

Low-Power Mode

Maximum Voltage, Temperature, and Time

The IC enters a low-power state when VBAT is driven above

the power-down threshold (VPD) where:

Any time the voltage on the BAT pin exceeds the maximum

cell voltage, VMCV, fast charge is terminated.

VPD = VCC - (1V ±0.5V)

Maximum temperature termination occurs anytime the

voltage on the TS pin falls below the temperature cut-off

threshold VTCO, where

Both the CC pin and the LED are driven to the high-Z state.

The operating current is reduced to less than 1µA in this

mode. When VBAT returns to a value below VPD, the IC pulse-

trickle charges until the next new charge cycle begins.

VTCO = 0.5 x VCC ± 5%.

bq2002C

Absolute Maximum Ratings

Symbol

V_CC

Parameter

V_CCrelative to V_SS

Minimum

-0.3

Maximum

+7.0

Unit

Notes

V_T

DC voltage applied on any pin

excluding V_CCrelative to V_SS

-0.3

+7.0

T_OPR

Operating ambient temperature

Storage temperature

-40

+70

+85

°C

Commercial

T_STG

T_SOLDER

T_BIAS

Soldering temperature

+260

+85

10 sec max.

Temperature under bias

-40

Note:

Permanent device damage may occur if Absolu te Ma xim u m Ra tin gs are exceeded. Functional opera-

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-

sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds (T = 0 to 70°C; V

±20%)

Symbol

Parameter

Rating

Tolerance

Unit

Notes

V_TCO

Temperature cutoff

0.5 V_CC

±5%

V_TS≤ V_TCOinhibits/terminates

fast charge

V_HTF

High-temperature fault

Maximum cell voltage

Minimum cell voltage

0.6 V_CC

±5%

V_TS≤ V_HTFinhibits fast charge

start

V_MCV

V_BAT≥ V_MCVinhibits/terminates

fast charge

V_LBAT

0.175 V_CC

-12

±20%

±3

V_BAT≤ V_LBATinhibits fast charge

BAT input change for

-∆V

-∆V detection

PVD

BAT input change for

PVD detection

-2.5

±2.5

bq2002C

Recommended DC Operating Conditions (T = 0 to 70°C)

Symbol

V_CC

Condition

Supply voltage

Minimum

Typical

Maximum

Unit

Notes

4.0

5.0

6.0

V_DET

V_BAT

V_TS

-∆V, PVD detect voltage

Battery input

V_CC

Thermistor input

Logic input high

Logic input mid

0.5

V_TS< 0.5V prohibited

V_IH

0.5

INH

V_CC- 0.5

V_CC

V_IM

- 0.5

+ 0.5

V_IL

Logic input low

Logic output low

Power down

0.1

INH

0.5

V_OL

V_PD

0.8

LED, CC, I_OL= 10mA

V_CC- 1.5

V_CC- 0.5

V_BAT≥ V_PDmax. powers

down bq2002C;

V_BAT< V_PDmin. =

normal operation.

I_CC

Supply current

500

µA

Outputs unloaded,

V_CC= 5.1V

I_SB

I_OL

I_L

Standby current

LED, CC sink

Input leakage

V_CC= 5.1V, V_BAT= V_PD

mA @V_OL= V_SS+ 0.8V

±1

µA

INH, CC, V = V_SSto V_CC

LED, CC

I_OZ

Output leakage in

high-Z state

-5

Note:

All voltages relative to V_SS.

bq2002C

Impedance

Symbol

Parameter

Minimum

Typical

Maximum

Unit

MΩ

R_BAT

R_TS

Battery input impedance

TS input impedance

Timing (T = 0 to +70°C; V

±10%)

Symbol

d_FCV

Parameter

Minimum Typical Maximum

-12 12

Unit

Notes

Time base variation

Note:

Typical is at T_A= 25°C, V_CC= 5.0V.

bq2002C

(

)

8-Pin DIP PN

(

)

8-Pin PN 0.300" DIP

Inches

Millimeters

Min.

0.160

0.015

0.055

0.008

0.350

0.300

0.230

0.300

0.090

0.115

0.020

Max.

0.180

0.040

0.022

0.065

0.013

0.380

0.325

0.280

0.370

0.110

0.150

0.040

Min.

4.06

0.38

1.40

0.20

8.89

7.62

5.84

7.62

2.29

2.92

0.51

Max.

4.57

1.02

0.56

1.65

0.33

9.65

8.26

7.11

9.40

2.79

3.81

1.02

Dimension

bq2002C

8-Pin SOIC Narrow (SN)

(

)

8-Pin SN 0.150" SOIC

Inches

Millimeters

Min.

0.060

0.004

0.013

0.007

0.185

0.150

0.045

0.225

0.015

Max.

0.070

0.010

0.020

0.010

0.200

0.160

0.055

0.245

0.035

Max.

1.78

0.25

0.51

0.25

5.08

4.06

1.40

6.22

0.89

Dimension

1.52

0.10

0.33

0.18

4.70

3.81

1.14

5.72

0.38

bq2002C

____________________________________________________________________________

Data Sheet Revision History

Change No.

Page No.

Description

Revised format and outline of this data sheet

Removed "top-off"

All

Note: Change 1 = Sept. 1997 B changes from Dec. 1995.

Note: Change 2 = July 2011

Ordering Information

PACKAGE OPTION ADDENDUM

www.ti.com

29-Jul-2011

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

BQ2002CPN

BQ2002CPNE4

BQ2002CSN

ACTIVE

PDIP

SOIC

Pb-Free (RoHS)

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

Green (RoHS

& no Sb/Br)

BQ2002CSNG4

BQ2002CSNTR

BQ2002CSNTRG4

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

2500

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

29-Jul-2011

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

28-Jul-2011

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

BQ2002CSNTR

SOIC

2500

330.0

12.4

6.4

5.2

2.1

8.0

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

28-Jul-2011

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SOIC

SPQ

Length (mm) Width (mm) Height (mm)

340.5 338.1 20.6

BQ2002CSNTR

2500

Pack Materials-Page 2

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BQ2002CSNG4 [TI]

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