BQ2002EPN_技术文档

bq2002E/G

NiCd/NiMH Fast-Charge Management ICs

Features

General Description

Fast charge is terminated by any of

the following:

➤

Fast charge of nickel cadmium

or nickel-metal hydride batter-

Th e bq2002E a n d bq2002G Fa st -

Charge ICs are low-cost CMOS bat-

tery-charge controllers providing reli-

able charge termination for both NiCd

and NiMH battery applications. Con-

trolling a current-limited or con-

st a n t -cu r r en t su pply a llows t h e

bq2002E/G to be the basis for a cost-

effective stand-alone or system-inte-

grated charger. The bq2002E/G inte-

grates fast charge with optional top-off

and pulsed- trickle control in a single

IC for charging one or more NiCd or

NiMH battery cells.

n

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

ies

➤

Dir ect LE D ou t pu t displa ys

charge status

Maximum temperature

Maximum time

Fast-charge termination by -∆V,

ma ximum volta ge, ma ximum

t em per a t u r e, a n d m a xim u m

time

After fast charge, the bq2002E/G op-

tionally tops-off and pulse-trickles the

battery per the pre-configured limits.

Fast charge may be inhibited using

the INH pin. The bq2002E/G may

also be placed in low-standby-power

mode to reduce system power con-

sumption.

➤

Internal band-gap voltage ref-

erence

➤

Optional top-off charge

Fast charge is initiated on application

of the charging supply or battery re-

placement. For safety, fast charge is

inhibited if the battery temperature

and voltage are outside configured

limits.

Selectable pulse trickle charge

rates

T h e b q 2 0 0 2 E d iffe r s fr om t h e

bq2002G only in that a slightly dif-

ferent set of fast-charge and top-off

time limits is available. All differ-

ences between the two ICs are illus-

trated in Table 1.

➤

Low-power mode

8-pin 300-mil DIP or 150-mil

SOIC

Pin Connections

Pin Names

TS

Temperature sense input

Supply voltage input

Charge inhibit input

Charge control output

TM

Timer mode select input

Charging status output

Battery voltage input

System ground

TM

LED

BAT

1

2

3

4

8

7

6

5

CC

V_CC

INH

CC

LED

BAT

V_SS

INH

V

CC

V

SS

TS

8-Pin DIP or

Narrow SOIC

PN-200201.eps

bq2002E/G Selection Guide

Part No. LBAT

TCO

HTF

LTF

PVD Fast Charge

t_MTO

Top-Off

None

C/16

Maintenance

-∆V

➤

bq2002E

None

➤

C/2

1C

2C

C/2

1C

2C

200

80

C/32

0.175

V_CC

0.5

V_CC

0.6

V_CC

40

None

C/16

bq2002G

None

➤

160

80

0.175

V_CC

0.5

V_CC

0.6

V_CC

➤

40

None

2/99

1

bq2002E/G

sumes operation at the point where initially

suspended.

Pin Descriptions

Timer mode input

TM

Ch ar ge con tr ol ou tpu t

CC

A three-level input that controls the settings

for the fast charge safety timer, voltage ter-

mination mode, top-off, pulse-trickle, and

voltage hold-off time.

An open-drain output used to control the

charging current to the battery. CC switch-

ing to high impedance (Z) enables charging

current to flow, and low to inhibit charging

current. CC is modulated to provide top-off,

if enabled, and pulse trickle.

Ch ar gin g ou tpu t statu s

LED

BAT

Open-drain output that indicates the charging

status.

Functional Description

Batter y in pu t voltage

Figure 2 shows a state diagram and Figure 3 shows a

block diagram of the bq2002E/G.

The battery voltage sense input. The input to

this pin is created by a high-impedance re-

sistor divider network connected between

the positive and negative terminals of the

battery.

Battery Voltage and Temperature

Measurements

Battery voltage and temperature are monitored for

maximum allowable values. The voltage presented on

t h e ba t t er y sen se in pu t , BAT, sh ou ld r epr esen t a

single-cell potential for the battery under charge.

resistor-divider ratio of

System gr ou n d

V_SS

TS

Tem per atu r e sen se in pu t

A

Input for an external battery temperature

monitoring thermistor.

RB1

= N - 1

RB2

Su pply voltage in pu t

5.0V ±20% power input.

Ch ar ge in h ibit in pu t

V_CC

INH

is recommended to maintain the battery voltage within

the valid range, where N is the number of cells, RB1 is

the resistor connected to the positive battery terminal,

and RB2 is the resistor connected to the negative bat-

tery terminal. See Figure 1.

When high, INH suspends the fast charge in

progress. When returned low, the IC re-

Note: This resistor-divider network input impedance to

end-to-end should be at least 200kΩ and less than 1 MΩ.

V

CC

PACK +

RT

V

RB1

RB2

R3

R4

CC

BAT

TM

T

S

N

T

bq2002E/G

C

V

SS

V

SS

BAT pin connection

Mid-level

setting for TM

NTC = negative temperature coefficient thermistor.

Thermistor connection

Fg2002E/G01.eps

Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration

2

bq2002E/G

Chip on

4.0V

Battery Voltage

too High?

V

CC

V

>

2V

BAT

V

< 2V

BAT

Battery Voltage

too Low?

V

< 0.175 V

CC

BAT

0.175

> 0.6

V

< V

BAT

CC

V

< 0.6

V

CC

TS

CC

TS

Battery

Temperature?

Charge

Pending

V or

(PVD or -

Maximum Time Out)

and TM = Low

Fast

LED =

Low

Trickle

LED =

Flash

V

> 0.175

< 2V, and

> V /2

CC

V

,

CC

BAT

TS

V

> 2V

BAT

V

> 2V or

Top-off

LED = Z

BAT

< V /2 or

V

TS

CC

((PVD or - V or

Maximum Time Out)

V

2V

BAT

Low)

and TM

Trickle

V

2V or

/2 or

BAT

TS

LED = Z

V

CC

Maximum Time Out

SD2002C.eps

Figure 2. State Diagram

Clock

Phase

Generator

OSC

TM

INH

Sample

History

Timing

Control

Voltage

Reference

PVD, - V

ALU

A to D

Converter

Charge-Control

State Machine

LBAT

Check

MCV

Check

BAT

HTF TCO

Check Check

Power-On

Reset

Power

Down

CC

LED

V

TS

V

CC

SS

Bd2002CEG.eps

Figure 3. Block Diagram

3

bq2002E/G

V

CC

= 0

Fast Charging

Top-Off

(optional)

Pulse-Trickle

Fast Charging

See Table 1

73ms

CC Output

1.17s

Charge initiated by application of power

Charge initiated by battery replacement

1.17s

LED

TD2002EG.eps

Figure 4. Charge Cycle Phases

1. Application of power to V_CCor

A ground-referenced negative temperature coefficient ther-

mistor placed near the battery may be used as a low-cost

temperature-to-voltage transducer. The temperature

sense voltage input at TS is developed using a resistor-

thermistor network between V_CCand V_SS. See Figure 1.

2. Voltage at the BAT pin falling through the maximum

cell voltage V_MCVwhere

V_MCV= 2V ±5%.

If the battery is within the configured temperature and

voltage limits, the IC begins fast charge. The valid bat-

tery voltage range is V_LBAT< V_BAT< V_MCV, where

Starting A Charge Cycle

Either of two events starts a charge cycle (see Figure 4):

Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table

Typical Fast-

Charge and

Top-Off

Maximum

Synchro-

Corre-

sponding

Fast-Charge

Rate

Time Limits

(minutes)

Typical PVD

and -∆V

Hold-Off Time Top-Off Trickle

(seconds)

Pulse-

Trickle Sampling

Width

(ms)

nized

Pulse-

Period

(seconds)

bq2002E bq2002G

TM

Mid

Low

High

Termination

PVD

Rate

Disabled

C/16

Rate

C/32

C/2

1C

2C

200

80

160

80

300

73

37

18

18.7

9.4

PVD

150

-∆V

40

75

Disabled

Notes:

Typical conditions = 25°C, V_CC= 5.0V

Mid = 0.5 V_CC±0.5V

*

Tolerance on all timing is ±12%.

4

bq2002E/G

The response of the IC to pulses less than 100ns in

width or between 3.5ms and 12ms is indeterminate. Tol-

erance on all timing is ±12%.

V_LBAT= 0.175 V_CC±20%

The valid temperature range is V_TS> V_HTFwhere

V_HTF= 0.6 V_CC±5%.

Voltage Termination Hold-off

If the battery voltage or temperature is outside of these

limits, the IC pulse-trickle charges until the next new

charge cycle begins.

A hold-off period occurs at the start of fast charging.

During the hold-off time, the PVD and -∆V terminations

are disabled. This avoids premature termination on the

voltage spikes sometimes produced by older batteries

when fast-charge current is first applied. Maximum

voltage and temperature terminations are not affected

by the hold-off period.

If V_MCV< V_BAT< V_PD(see “Low-Power Mode”) when a

new battery is inserted, a delay of 0.35 to 0.9s is imposed

before the new charge cycle begins.

Fast charge continues until termination by one or more of

the five possible termination conditions:

Maximum Voltage, Temperature, and Time

n

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

Any time the voltage on the BAT pin exceeds the maxi-

mum cell voltage,V_MCV, fast charge or optional top-off

charge is terminated.

Maximum temperature termination occurs anytime the

voltage on the TS pin falls below the temperature cut-off

threshold V_TCOwhere

Maximum temperature

Maximum time

V_TCO= 0.5 V_CC± 5%.

PVD and -∆V Termination

Maximum charge time is configured using the TM pin.

Time settings are available for corresponding charge

rates of C/2, 1C, and 2C. Maximum time-out termina-

tion is enforced on the fast-charge phase, then reset, and

enforced again on the top-off phase, if selected. There is

no time limit on the trickle-charge phase.

There are two modes for voltage termination, depending

on the state of TM. For -∆V (TM = high), if V_BATis lower

than any previously measured value by 12mV ±3mV, fast

charge is terminated. For PVD (TM = low or mid), a de-

crease of 2.5mV ±2.5mV terminates fast charge. The PVD

and -∆V tests are valid in the range 1V < V_BAT< 2V.

Top-off Charge

Synchronized Voltage Sampling

An optional top-off charge phase may be selected to

follow fast charge termination for 1C and C/2 rates.

This phase may be necessary on NiMH or other bat-

tery chemistries that have a tendency to terminate

charge before reaching full capacity. With top-off en-

a bled, ch a r gin g con t in u es a t a r edu ced r a t e a ft er

fast-charge termination for a period of time selected

by the TM pin. (See Table 1.) During top-off, the CC

pin is modulated at a duty cycle of 73ms active for

every 1097ms inactive. This modulation results in an

average rate 1/16th that of the fast charge rate. Maxi-

mum voltage, time, and temperature are the only ter-

mination methods enabled during top-off.

Voltage sampling at the BAT pin for PVD and -∆V termi-

nation may be synchronized to an external stimulus us-

ing the INH input. Low-high-low input pulses between

100ns and 3.5ms in width must be applied at the INH

pin with a frequency greater than the “maximum syn-

chronized sampling period” set by the state of the TM

pin as shown in Table 1. Voltage is sampled on the fal-

ling edge of such pulses.

If the time between pulses is greater than the synchro-

nizing period, voltage sampling “free-runs” at once every

17 seconds. A sample is taken by averaging together

voltage measurements taken 57µs apart. The IC takes

32 measurements in PVD mode and 16 measurements

in -∆V mode. The resulting sample periods (9.17 and

18.18ms, respectively) filter out harmonics centered

around 55 and 109Hz. This technique minimizes the ef-

fect of any AC line ripple that may feed through the

power supply from either 50 or 60Hz AC sources.

Pulse-Trickle Charge

Pulse-trickle is used to compensate for self-discharge

while the battery is idle in the charger. The battery is

pulse-trickle charged by driving the CC pin active once

every 1.17s for the period specified in Table 1. This re-

sults in a trickle rate of C/32.

If the INH input remains high for more than 12ms, the

voltage sample history kept by the IC and used for PVD

and -∆V termination decisions is erased and a new his-

tory is started. Such a reset is required when transition-

ing from free-running to synchronized voltage sampling.

TM Pin

The TM pin is a three-level pin used to select the

charge timer, top-off, voltage termination mode, trickle

5

bq2002E/G

rate, and voltage hold-off period options. Table 1 de-

scr ibes t h e st a t es select ed by t h e TM pin . Th e m id-

level select ion in pu t is developed by a r esist or di-

vider bet ween V_CCand ground that fixes the voltage

on TM at V_CC/2 ± 0.5V. See Figure 4.

Low-Power Mode

The IC enters a low-power state when V_BATis driven

above the power-down threshold (V_PD) where

V_PD= V_CC- (1V ±0.5V)

Charge Status Indication

Both the CC pin and the LED pin are driven to the

high-Z state. The operating current is reduced to less

than 1µA in this mode. When V_BATreturns to a value

below V_PD, the IC pulse-trickle charges until the next

new charge cycle begins.

A fast charge in progress is uniquely indicated when the

LED pin goes low. The LED pin is driven to the high-Z

state for all conditions other than fast charge. Figure 2

outlines the state of the LED pin during charge.

Charge Inhibit

Fast charge and top-off may be inhibited by using the

INH pin. When high, INH suspends all fast charge and

top-off activity and the internal charge timer. INH

freezes the current state of LED until inhibit is removed.

Temperature monitoring is not affected by the INH pin.

During cha rge inhibit, the bq2002E/G continues to

pulse-trickle charge the battery per the TM selection.

When INH returns low, charge control and the charge

timer resume from the point where INH became active.

6

bq2002E/G

Absolute Maximum Ratings

Symbol

V_CC

Parameter

V_CCrelative to V_SS

Minimum

-0.3

Maximum

+7.0

Unit

V

Notes

V_T

DC voltage applied on any pin

excluding V_CCrelative to V_SS

-0.3

+7.0

V

T_OPR

Operating ambient temperature

Storage temperature

0

-40

-

+70

+85

°C

Commercial

T_STG

T_SOLDER

T_BIAS

Soldering temperature

+260

+85

10 sec max.

Temperature under bias

-40

Note:

Permanent device damage may occur if Absolu te Ma xim u m Ra tin gs are exceeded. Functional opera-

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-

sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds (T = 0 to 70°C; V

±20%)

CC

A

Symbol

Parameter

Rating

Tolerance

Unit

Notes

V_TCO

Temperature cutoff

0.5 V_CC

*

±5%

V

V_TS≤ V_TCOinhibits/terminates

fast charge and top-off

V_HTF

V_MCV

V_LBAT

-∆V

High temperature fault

Maximum cell voltage

Minimum cell voltage

V

V_TS< V_HTFinhibits fast charge

start

0.6 VCC

±5%

±20%

±3

2

0.175 V_CC

-12

V_BAT≥ V_MCVinhibits/terminates

fast charge and top-off

V

V_BAT< V_LBATinhibits fast charge

start

BAT input change for

-∆V detection

mV

PVD

BAT input change for

PVD detection

-2.5

±2.5

7

bq2002E/G

Recommended DC Operating Conditions (T = 0 to 70°C)

A

Symbol

V_CC

Condition

Supply voltage

Minimum

Typical

Maximum

Unit

V

Notes

4.0

5.0

6.0

2

V_DET

V_BAT

V_TS

-∆V, PVD detect voltage

Battery input

1

0

-

V

V_CC

-

V

Thermistor input

Logic input high

Logic input mid

0.5

V

V_TS< 0.5V prohibited

V_IH

0.5

V

INH

TM

V_CC- 0.5

-

V

V_CC

V_IM

V

- 0.5

+ 0.5

2

V_IL

Logic input low

Logic output low

Power down

-

0.1

V

INH

-

0.5

TM

V_OL

V_PD

-

0.8

LED, CC, I_OL= 10mA

V_CC- 1.5

V_CC- 0.5

V_BAT≥ V_PDmax. powers

down bq2002E/G;

V_BAT< V_PDmin. =

normal operation.

I_CC

Supply current

-

500

µA

Outputs unloaded,

V_CC= 5.1V

I_SB

I_OL

I_L

Standby current

LED, CC sink

Input leakage

-

10

-

1

-

V_CC= 5.1V, V_BAT= V_PD

mA @V_OL= V_SS+ 0.8V

±1

-

µA

INH, CC, V = V_SSto V_CC

LED, CC

I_OZ

Output leakage in

high-Z state

-5

Note:

All voltages relative to V_SS.

8

bq2002E/G

Impedance

Symbol

Parameter

Minimum

Typical

Maximum

Unit

MΩ

R_BAT

R_TS

Battery input impedance

TS input impedance

50

-

Timing (T = 0 to +70°C; V

±10%)

CC

A

Symbol

d_FCV

Parameter

Time base variation

Start-up delay

Minimum Typical Maximum

Unit

Notes

-12

-

12

%

s

t_DLY

0.35

0.9

Starting from V_MCV< V_BAT< V_PD

Note:

Typical is at T_A= 25°C, V_CC= 5.0V.

9

bq2002E/G

(

)

8-Pin DIP PN

(

)

8-Pin PN 0.300" DIP

Inches

Millimeters

Min.

Dimension

Min.

0.160

0.015

0.055

0.008

0.350

0.300

0.230

0.300

0.090

0.115

0.020

Max.

0.180

0.040

0.022

0.065

0.013

0.380

0.325

0.280

0.370

0.110

0.150

0.040

Max.

4.57

1.02

0.56

1.65

0.33

9.65

8.26

7.11

9.40

2.79

3.81

1.02

D

A

A1

B

4.06

0.38

1.40

0.20

8.89

7.62

5.84

7.62

2.29

2.92

0.51

B1

C

E1

E

A

B1

D

A1

E

L

E1

e

C

G

B

S

L

e

G

S

8-Pin SOIC Narrow (SN)

(

)

8-Pin SN 0.150" SOIC

Inches

Millimeters

Dimension

Min.

0.060

0.004

0.013

0.007

0.185

0.150

0.045

0.225

0.015

Max.

0.070

0.010

0.020

0.010

0.200

0.160

0.055

0.245

0.035

Min.

Max.

1.78

0.25

0.51

0.25

5.08

4.06

1.40

6.22

0.89

A

A1

B

1.52

0.10

0.33

0.18

4.70

3.81

1.14

5.72

0.38

C

D

E

e

H

L

10

bq2002E/G

Data Sheet Revision History

Change No.

Page No.

Description

Nature of Change

1

Added selection guide

Notes:

Change 1 = Feb. 1999 B changes from Sept. 1997

Ordering Information

bq2002E/G

Pa ck a ge Op tion :

PN = 8-pin plastic DIP

SN = 8-pin narrow SOIC

Device:

bq2002E Fast Charge IC

bq2002G Fast Charge IC

11

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