CSD17322Q5A [TI]
30V, N-Channel NexFET⢠Power MOSFETs; 30V的N通道NexFETâ ?? ¢功率MOSFET
| 型号： | CSD17322Q5A |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 30V, N-Channel NexFET⢠Power MOSFETs |
| 文件： | 总11页 (文件大小：617K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSD17322Q5A
www.ti.com
SLPS330 –JUNE 2011
30V, N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD17322Q5A
1
FEATURES
PRODUCT SUMMARY
Drain to Source Voltage
2
•
•
•
•
•
•
•
•
Optimized for 5V Gate Drive
Ultralow Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb Free Terminal Plating
RoHS Compliant
Halogen Free
VDS
Qg
30
3.6
1.1
V
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
nC
nC
mΩ
mΩ
V
Qgd
VGS = 4.5V
VGS = 8V
10
RDS(on) Drain to Source On Resistance
VGS(th) Threshold Voltage
7.3
1.6
ORDERING INFORMATION
SON 5-mm × 6-mm Plastic Package
Device
CSD17322Q5A
Package
Media
Qty
Ship
APPLICATIONS
SON 5-mm × 6-mm
Plastic Package
13-Inch
Reel
Tape and
Reel
2500
•
•
Notebook Point of Load
Point-of-Load Synchronous Buck in
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise stated
Networking, Telecom and Computing Systems
VALUE
UNIT
V
VDS
VGS
Drain to Source Voltage
30
DESCRIPTION
Gate to Source Voltage
+10 / –10
V
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications,
and optimized for 5V gate drive applications.
Continuous Drain Current, TC = 25°C
Continuous Drain Current(1)
Pulsed Drain Current, TA = 25°C(2)
Power Dissipation(1)
87
16
104
3
A
ID
A
IDM
PD
TJ,
A
W
Figure 1. Top View
Operating Junction and Storage
TSTG Temperature Range
–55 to 150
°C
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
Avalanche Energy, single pulse
ID = 33A, L = 0.1mH, RG = 25Ω
EAS
54
mJ
(1) Typical RθJA
=
41°C/W on
a
1-inch2 (6.45-cm2),
2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick
FR4 PCB.
D
(2) Pulse duration ≤300μs, duty cycle ≤2%
D
P0093-01
RDS(on) vs VGS
GATE CHARGE
30
25
20
15
10
5
10
ID = 14A
ID = 14A
VDD = 15V
9
8
7
6
5
4
3
2
1
0
TC = 25°C
TC = 125ºC
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
Qg - Gate Charge - nC
VGS - Gate-to- Source Voltage - V
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
CSD17322Q5A
SLPS330 –JUNE 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Static Characteristics
TEST CONDITIONS
MIN
TYP
MAX UNIT
BVDSS
IDSS
Drain to Source Voltage
VGS = 0V, ID = 250μA
30
V
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
VGS = 0V, VDS = 24V
VDS = 0V, VGS = +10 / –10V
VDS = VGS, ID = 250μA
VGS = 4.5V, ID = 14A
VGS = 8V, ID = 14A
1
100
2.0
μA
nA
V
IGSS
VGS(th)
1.1
1.6
10
12.4
8.8
mΩ
mΩ
S
RDS(on)
Drain to Source On Resistance
7.3
37
gfs
Transconductance
VDS = 15V, ID = 14A
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
580
390
35
695
470
44
pF
pF
pF
Ω
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
VGS = 0V, VDS = 15V, f = 1MHz
4.7
3.6
1.1
1.6
0.9
8.6
6.7
12
Qg
4.3
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 15V, ID = 14A
VDS = 13V, VGS = 0V
Turn On Delay Time
Rise Time
VDS = 15V, VGS = 4.5V,
IDS = 14A, RG = 2Ω
td(off)
tf
Turn Off Delay Time
Fall Time
10.5
3.7
Diode Characteristics
VSD
Qrr
trr
Diode Forward Voltage
ISD = 14A, VGS = 0V
0.85
19.6
17.8
1
V
Reverse Recovery Charge
Reverse Recovery Time
nC
ns
VDD= 13V, IF = 14A,
di/dt = 300A/μs
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Thermal Resistance Junction to Case(1)
Thermal Resistance Junction to Ambient(1)(2)
MIN
TYP
MAX
UNIT
°C/W
°C/W
RθJC
RθJA
1.8
51
(1)
R
θJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
2
Copyright © 2011, Texas Instruments Incorporated
CSD17322Q5A
www.ti.com
SLPS330 –JUNE 2011
GATE
Source
GATE
Source
Max RθJA = 51°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Max RθJA = 125°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
DRAIN
DRAIN
M0137-02
M0137-01
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
10
1
0.5
0.3
Duty Cycle = t1/t2
0.1
0.1
0.05
P
0.02
0.01
t1
0.01
t2
Single Pulse
Typical RqJA = 100°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
0.001
0.001
0.01
0.1
1
10
100
1k
tp - Pulse Duration - s
G012
Figure 2. Transient Thermal Impedance
Copyright © 2011, Texas Instruments Incorporated
3
CSD17322Q5A
SLPS330 –JUNE 2011
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
50
45
40
35
30
25
20
15
10
5
50
40
30
20
10
0
VDS = 5V
TC = 125°C
TC = 25°C
TC = -55°C
VGS = 4.0V
VGS = 4.5V
VGS = 8.0V
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1
1.5
2
2.5
3
VGS - Gate-to-Source Voltage - V
VDS - Drain-to-Source Voltage - V
G002
Figure 3. Saturation Characteristics
TEXT ADDED FOR SPACING
Figure 4. Transfer Characteristics
TEXT ADDED FOR SPACING
1.8
1.6
1.4
1.2
1
10
9
8
7
6
5
4
3
2
1
0
ID = 14A
VDD = 15V
f = 1MHz
VGS = 0V
Coss = Cds + Cgd
Ciss = Cgd + Cgs
0.8
0.6
0.4
0.2
0
Crss = Cgd
0
1
2
3
4
5
6
7
8
0
5
10
15
20
25
30
VDS - Drain-to-Source Voltage - V
Qg - Gate Charge - nC
G004
Figure 5. Gate Charge
Figure 6. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.6
1.4
1.2
1
30
25
20
15
10
5
ID = 14A
ID = 250µA
0.8
0.6
0.4
0.2
0
TC = 25°C
TC = 125ºC
0
0
1
2
3
4
5
6
7
8
9
10
-75
-25
25
75
125
175
TC - Case Temperature - °C
VGS - Gate-to- Source Voltage - V
G005
Figure 7. Threshold Voltage vs. Temperature
Figure 8. On-State Resistance vs. Gate-to-Source Voltage
4
Copyright © 2011, Texas Instruments Incorporated
CSD17322Q5A
www.ti.com
SLPS330 –JUNE 2011
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
100
10
1.6
1.4
1.2
1
ID = 14A
VGS = 4.5V
1
TC = 125°C
0.1
0.8
0.6
0.4
0.2
TC = 25°C
0.01
0.001
0.0001
-75
-25
25
75
125
175
0
0.2
0.4
0.6
0.8
1
1.2
TC - Case Temperature - °C
VSD - Source-to-Drain Voltage - V
G007
G008
Figure 9. Normalized On-State Resistance vs. Temperature
Figure 10. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1k
1k
100
10
100
10
1ms
10ms
TC = 25°C
1
0.1
10101m10s
Area Limited
by RDS(on)
1s
Single Pulse
Typical RθJA = 100°C/W (min Cu)
TC = 125°C
DC
0.01
1
0.01
0.1
1
10
100
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage - V
t(AV) - Time in Avalanche - ms
G009
G010
Figure 11. Maximum Safe Operating Area
Figure 12. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
120
100
80
60
40
20
0
-50
-25
0
25
50
75
100 125 150 175
TC - Case Temperature - °C
Figure 13. Maximum Drain Current vs. TemperatuGre011
Copyright © 2011, Texas Instruments Incorporated
5
CSD17322Q5A
SLPS330 –JUNE 2011
www.ti.com
MECHANICAL DATA
Q5A Package Dimensions
E2
L
H
K
q
L1
Top View
Side View
Bottom View
q
E1
E
Front View
M0135-01
MILLIMETERS
NOM
1.00
DIM
MIN
0.90
0.33
0.20
4.80
3.61
5.90
5.70
3.38
1.17
0.41
1.10
0.51
0.06
0°
MAX
1.10
0.51
0.34
5.00
4.02
6.10
5.80
3.78
1.37
0.71
A
b
0.41
c
0.25
D1
D2
E
4.90
3.81
6.00
E1
E2
e
5.75
3.58
1.27
H
0.56
K
L
0.61
0.13
0.71
0.20
12°
L1
θ
6
Copyright © 2011, Texas Instruments Incorporated
CSD17322Q5A
www.ti.com
SLPS330 –JUNE 2011
MILLIMETERS
INCHES
DIM
Figure 14. Recommended PCB Pattern
MIN
MAX
6.305
4.56
4.56
0.7
MIN
MAX
0.248
0.18
F1
F1
F2
6.205
4.46
4.46
0.65
0.62
0.63
0.7
0.244
0.176
0.176
0.026
0.024
0.025
0.028
0.026
0.024
0.193
0.176
F7
F6
F3
0.18
F4
0.028
0.026
0.027
0.031
0.028
0.026
0.197
0.18
F5
0.67
0.68
0.8
F6
F7
F8
0.65
0.62
4.9
0.7
F9
0.67
5
F10
F11
4.46
4.56
F10
M0139-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
Q5A Tape and Reel Information
K0
4.00 0.10 ꢀ(SS ꢁNoS 1ꢂ
0.30 0.05
2.00 0.05
+0.10
–0.00
Ø 1.50
B0
A0
8.00 0.10
R 0.30 MAX
Ø 1.50 MIꢁ
R 0.30 TYP
A0 = 6.50 0.10
B0 = 5.30 0.10
K0 = 1.40 0.10
M0138-01
Notes:
1. 10-sprocket hole-pitch cumulative tolerance ±0.2
2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm
3. Material: black static-dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified)
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket
Copyright © 2011, Texas Instruments Incorporated
7
PACKAGE OPTION ADDENDUM
www.ti.com
22-Aug-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
CSD17322Q5A
ACTIVE
SON
DQJ
8
2500
Pb-Free (RoHS
Exempt)
CU SN
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Mar-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD17322Q5A
SON
DQJ
8
2500
330.0
12.4
6.3
5.3
1.2
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Mar-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SON DQJ
SPQ
Length (mm) Width (mm) Height (mm)
340.0 340.0 38.0
CSD17322Q5A
8
2500
Pack Materials-Page 2
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