CSD95378BQ5MT [TI]
带 TAO 偏移的 60A 同步降压 NexFET™ 智能功率级 | DQP | 12 | -55 to 150;
| 型号： | CSD95378BQ5MT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 带 TAO 偏移的 60A 同步降压 NexFET™ 智能功率级 | DQP | 12 | -55 to 150 开关 光电二极管 |
| 文件： | 总13页 (文件大小：720K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CSD95378BQ5M
ZHCSCE4B –APRIL 2014–REVISED JULY 2017
CSD95378BQ5M 同步降压 NexFET™智能功率级
1 特性
2 应用
1
•
•
•
•
•
•
•
•
60A 持续运行电流能力
•
多相位同步降压转换器
电流 30A 时，系统效率为 93.4%
电流 30A 时，低功耗损耗为 2.8W
高频工作（高达 1.25MHz）
支持强制连续传导模式 (FCCM) 的二极管仿真模式
温度补偿双向电流感测
–
–
高频 应用
高电流、低占空比 应用
•
•
•
负载点 (POL) 直流/直流转换器
内存和图形卡
台式机和服务器 VR11.x / VR12.x V 内核和存储器
同步转换器
模拟温度输出（0°C 时 400mV）
故障监控
3 说明
–
高端短路、过流和过热保护
CSD95378BQ5M NexFET™智能功率级的设计针对高
功率、高密度同步降压转换器中的使用进行了高度优
化。这款产品集成了驱动器 IC 和功率 MOSFET 来完
善功率级开关功能。该组合可在
•
•
•
•
•
•
•
•
•
3.3V 和 5V 脉宽调制 (PWM) 信号兼容
三态 PWM 输入
集成型自举二极管
用于击穿保护的经优化死区时间
高密度 5mm × 6mm SON 封装
超低电感封装
5mm x 6mm 小型封装中提供高电流、高效率的高速切
换功能。它还集成了准确电流感测和温度感测功能，以
简化系统设计并提高准确度。此外，PCB 封装已经过
优化，可帮助减少设计时间并简化总体系统设计的完
成。
系统已优化的 PCB 封装
符合 RoHS 环保标准 – 无铅引脚镀层
无卤素
器件信息(1)
器件
包装介质
数量
封装
运输
CSD95378BQ5M 13 英寸卷带
CSD95378BQ5MT 7 英寸卷带
2500
SON
5.00mm × 6.00mm
封装
卷带封
装
250
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
应用图表
典型功率级效率与功率损耗
100
90
80
70
60
50
40
30
14
12
10
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VIN = 12V
VOUT = 1.2V
LOUT = .225µH
fSW = 500kHz
TA = 25ºC
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1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS504
CSD95378BQ5M
ZHCSCE4B –APRIL 2014–REVISED JULY 2017
www.ti.com.cn
目录
7.1 Typical Application .................................................... 5
器件和文档支持........................................................ 6
8.1 接收文档更新通知 ..................................................... 6
8.2 社区资源.................................................................... 6
8.3 商标........................................................................... 6
8.4 静电放电警告............................................................. 6
8.5 Glossary.................................................................... 6
机械、封装和可订购信息 ......................................... 7
9.1 机械制图.................................................................... 7
9.2 建议印刷电路板 (PCB) 焊盘图案............................... 8
9.3 建议模板开口............................................................. 8
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
Application Schematic .......................................... 5
8
9
7
4 修订历史记录
Changes from Revision A (July 2014) to Revision B
Page
•
•
Updated the CSD95378B parts in the Application Schematic................................................................................................ 5
已添加 器件和文档支持 中的 接收文档更新通知 和 社区资源部分 ......................................................................................... 6
Changes from Original (April 2014) to Revision A
Page
•
Updated the controller IC in the Application Schematic to the TPS40428............................................................................. 5
2
Copyright © 2014–2017, Texas Instruments Incorporated
CSD95378BQ5M
www.ti.com.cn
ZHCSCE4B –APRIL 2014–REVISED JULY 2017
5 Pin Configuration and Functions
13-Pin SON
Top View
IOUT
REFIN
ENABLE
PGND
1
2
3
4
5
12 PWM
11 TAO/FAULT
10 FCCM
9
8
BOOT
13
VDD
BOOT_R
PGND
VSW
6
7
VIN
Pin Functions
PIN
DESCRIPTION
NAME
NO.
9
Bootstrap capacitor connection. Connect a minimum of 0.1-µF, 16-V, X7R ceramic capacitor from BOOT to
BOOT_R pins. The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is
integrated.
BOOT
BOOT_R
ENABLE
8
Return path for HS gate driver, connected to VSW internally.
Enables device operation. If ENABLE = logic HIGH, turns on device. If ENABLE = logic LOW, the device is
turned off and both MOSFET gates are actively pulled low. An internal 100-kΩ pulldown resistor will pull the
ENABLE pin LOW if left floating.
3
This pin enables the Diode Emulation function. When this pin is held LOW, Diode Emulation Mode is enabled for
sync FET. When FCCM is HIGH, the device is operated in Forced Continuous Conduction Mode. An internal 5-
µA current source will pull the FCCM pin to 3.3 V if left floating.
FCCM
10
IOUT
PGND
PGND
1
4
Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current.
Power ground, connected directly to pin 13.
13
Power ground.
Pulse width modulated tri-state input from external controller. Logic LOW sets control FET gate low and sync
FET gate high. Logic HIGH sets control FET gate high and sync FET gate low. Open or Hi-Z sets both MOSFET
gates low if greater than the tri-state shutdown hold-off time (t3HT).
PWM
12
2
REFIN
External reference voltage input for current sensing amplifier.
Temperature analog output. Reports a voltage proportional to the die temperature. An ORing diode is integrated
in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of all the ICs.
Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown occurs. TAO
should be bypassed to PGND with a 1-nF, 16-V, X7R ceramic capacitor.
TAO/
FAULT
11
VDD
VIN
5
7
6
Supply voltage to gate driver and internal circuitry.
Input voltage pin. Connect input capacitors close to this pin.
VSW
Phase node connecting the HS MOSFET source and LS MOSFET drain - pin connection to the output inductor.
Copyright © 2014–2017, Texas Instruments Incorporated
3
CSD95378BQ5M
ZHCSCE4B –APRIL 2014–REVISED JULY 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
TA = 25°C (unless otherwise noted)(1)
MIN
–0.3
–0.3
–7
MAX
UNIT
V
VIN to PGND
25
VIN to VSW
25
V
VIN to VSW (10 ns)
27
V
VSW to PGND
–0.3
–7
20
V
VSW to PGND (10 ns)
VDD to PGND
23
V
–0.3
–0.3
–0.3
7
VDD + 0.3 V
VDD + 0.3 V
12
V
ENABLE, PWM, FCCM. TAO, IOUT, REFIN to PGND
BOOT to BOOT_R(2)
Power dissipation, PD
Operating junction temperature, TJ
Storage temperature, Tstg
V
V
W
°C
°C
–55
–55
150
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Should not exceed 7 V.
6.2 ESD Ratings
MIN
–2000
–500
MAX
2000
500
UNIT
Human-body model (HBM)
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM)
6.3 Recommended Operating Conditions
TA = 25°C (unless otherwise noted)
MIN
MAX
UNIT
VDD
VIN
Gate drive voltage
Input supply voltage(1)
4.5
5.5
16
V
V
V
VOUT
Output voltage
5.5
IOUT
Continuous output current
60
VIN = 12 V, VDD = 5 V, VOUT = 1.2 V,
ƒSW = 500 kHz, LOUT = 0.225 µH(2)
IOUT-PK Peak output current(3)
90
A
ƒSW
Switching frequency
On-time duty cycle
CBST = 0.1 µF (min)
ƒSW = 1 MHz
1250
85%
kHz
Minimum PWM on time
Operating temperature
40
ns
°C
–40
125
(1) Operating at high VIN can create excessive AC voltage overshoots on the switch node (VSW) during MOSFET switching transients. For
reliable operation, the switch node (VSW) to ground voltage must remain at or below the Absolute Maximum Ratings.
(2) Measurement made with six 10-µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across VIN to PGND pins.
(3) System conditions as defined in Note 1. Peak output current is applied for tp = 50 µs.
6.4 Thermal Information
TA = 25°C (unless otherwise noted)
THERMAL METRIC
RθJC Junction-to-case (top-of-package) thermal resistance(1)
RθJB Junction-to-board thermal resistance(2)
MIN
TYP
MAX
15
UNIT
°C/W
1.5
(1)
(2)
R
θJC is determined with the device mounted on a 1-in2 (6.45 -cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in, 0.06-in (1.52-mm)
thick FR4 board.
θJB value based on hottest board temperature within 1 mm of the package.
R
4
Copyright © 2014–2017, Texas Instruments Incorporated
CSD95378BQ5M
www.ti.com.cn
ZHCSCE4B –APRIL 2014–REVISED JULY 2017
7 Application Schematic
7.1 Typical Application
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CSD95430RRB
90-A peak continuous-current synchronous-buck NexFET™ smart power stage | RRB | 41 | -40 to 125
TI
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