CSD95490Q5MC [TI]
采用 DualCool 封装的 75A NexFET™ 同步降压智能功率级;
| 型号： | CSD95490Q5MC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 DualCool 封装的 75A NexFET™ 同步降压智能功率级 |
| 文件： | 总14页 (文件大小：1114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CSD95490Q5MC
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
CSD95490Q5MC 同步降压 NexFET™智能功率级
1 特性
2 应用
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
持续工作电流可达 75A
•
多相位同步降压转换器
电流为 30A 时，系统效率大于 95%
工作频率高（高达 1.25MHz）
二极管仿真功能
–
–
高频 应用
高电流、低占空比 应用
•
•
•
负载点 (POL) 直流/直流转换器
温度补偿双向电流检测
模拟温度输出
内存和图形卡
台式机和服务器 VR12.x / VR13 V-Core 同步降压
转换器
故障监控
•
用于网络通信的大电流 POL
3.3V 和 5V 脉宽调制 (PWM) 信号兼容
三态 PWM 输入
3 说明
集成自举开关
CSD95490Q5MC NexFET™功率器件是经过高度优化
的设计，用于高功率、高密度场合的同步降压转换器。
此产品集成了驱动器 IC 和功率 MOSFET 以实现功率
级开关功能。该组合可在 5mm x 6mm 小型封装中实
现高电流、高效率以及高速切换功能。它还集成了准确
电流感测和温度感测功能，以简化系统设计并提高准确
度。此外，PCB 封装已经过优化，可帮助减少设计时
间并简化总体系统设计。
用于击穿保护的经优化死区时间
高密度 5mm × 6mm QFN 封装
超低电感封装
系统已优化的 PCB 封装
热增强型顶部散热
符合 RoHS 环保标准 – 无铅引脚镀层
无卤素
器件信息(1)
应用图表
器件
CSD95490Q5MC 13 英寸卷带 2500
CSD95490Q5MCT 7 英寸卷带 250
包装介质
数量
封装
发货
QFN
5.00mm × 6.00mm
封装
卷带
封装
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(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
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典型功率级效率与功率损耗
100
90
80
70
60
50
40
30
21
18
15
12
9
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VDD = 5 V
VIN = 12 V
VOUT = 1.8 V
LOUT = 150 nH
fSW = 600 kHz
TA = 25èC
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Output Current (A)
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Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS669
CSD95490Q5MC
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
Application Schematic .......................................... 5
8
9
器件和文档支持........................................................ 6
8.1 Receiving Notification of Documentation Updates.... 6
8.2 Community Resources.............................................. 6
8.3 商标........................................................................... 6
8.4 静电放电警告............................................................. 6
8.5 Glossary.................................................................... 6
机械、封装和可订购信息 ......................................... 7
9.1 机械制图.................................................................... 7
9.2 推荐 PCB 焊盘图案 ................................................... 8
9.3 建议模板开口............................................................. 9
7
4 Revision History
Changes from Original (March 2017) to Revision A
Page
•
更新了机械制图 部分 .............................................................................................................................................................. 7
2
Copyright © 2017–2018, Texas Instruments Incorporated
CSD95490Q5MC
www.ti.com.cn
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
5 Pin Configuration and Functions
Top View
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Pin Functions
PIN
DESCRIPTION
NAME
REFIN
IOUT
LSET
VDD
NO.
1
External reference voltage input for current sensing amplifier.
2
Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current.
A resistor from this pin to PGND pin sets the inductor value for the internal current sensing circuitry.
Supply voltage for gate drivers and internal circuitry.
3
4
VOS
5
Output voltage sensing pin for the internal current sensing circuitry.
SW
6
Phase node connecting the HS MOSFET source and LS MOSFET drain – pin connection to the output inductor.
Input voltage pin. Connect input capacitors close to this pin.
VIN
7
BOOTR
8
Return path for HS gate driver. It is connected to VSW internally.
Bootstrap capacitor connection. Connect a minimum 0.1-µF, 16-V, X5R ceramic cap from BOOT to BOOTR pins.
The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is integrated.
BOOT
9
Tri-state input from external controller. Logic low sets control FET gate low and sync FET gate high. Logic high
sets control FET gate high and sync FET gate low. Both MOSFET gates are set low if PWM stays in Hi-Z for
greater than the tri-state shutdown hold-off time (t3HT).
PWM
10
This dual function pin either enables the diode emulation function or can be used as a simple enable for the
device. When this pin is driven into the tri-state window and held there for more than the tri-state holdoff time,
Diode Emulation Mode (DEM) is enabled for sync FET. When the pin is high, device operates in Forced
Continuous Conduction Mode (FCCM). When the pin is low, both FETs are held off. An internal resistor pulls this
pin low if left floating.
EN/FCCM
11
Temperature Amplifier Output. Reports a voltage proportional to the IC temperature. An ORing diode is
integrated in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of
all the ICs. Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown,
LSOC, or HSS detection circuit is tripped.
TAO/FAULT
PGND
12
13
Power ground.
Copyright © 2017–2018, Texas Instruments Incorporated
3
CSD95490Q5MC
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
TA = 25°C (unless otherwise stated)(1)
MIN
–0.3
–0.3
MAX
UNIT
V
VIN to PGND
20
VIN to VSW
20
V
VIN to VSW (10 ns)
VSW to PGND
23
V
–0.3
–7
20
V
VSW to PGND (10 ns)
VDD to PGND
23
V
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–55
–55
7
VDD + 0.3
7
V
(2)
EN/FCCM, TAO/FLT, LSET to PGND
IOUT, VOS, PWM to PGND
REFIN
V
V
3.6
V
BOOT to BOOTR(2)
VDD + 0.3
30
V
BOOT to PGND
V
TJ
Operating junction temperature
Storage temperature
150
°C
°C
Tstg
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Should not exceed 7 V.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human-body model (HBM)
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM)
6.3 Recommended Operating Conditions
TA = 25°C (unless otherwise stated)
PARAMETER
CONDITIONS
MIN
4.5
MAX
5.5
UNIT
VDD
Driver supply voltage
Input supply voltage(1)
Output voltage
V
V
VIN
4.5
16
VOUT
PWM
IOUT
5.5
V
PWM to PGND
VDD + 0.3
V
Continuous output current
75
105
A
VIN = 12 V, VDD = 5 V, VOUT = 1.2 V,
ƒSW = 500 kHz(2)
IOUT-PK Peak output current(3)
A
ƒSW
Switching frequency
CBST = 0.1 µF (min), VOUT = 2.5 V (max)
ƒSW = 1 MHz
1250
85%
kHz
On-time duty cycle
Minimum PWM on-time
Operating junction temperature
20
ns
°C
–40
125
(1) Operating at high VIN can create excessive AC voltage overshoots on the switch node (VSW) during MOSFET switching transients. For
reliable operation, the switch node (VSW) to ground voltage must remain at or below the Absolute Maximum Ratings.
(2) Measurement made with six 10-µF (TDK C3216X7R1C106KT or equivalent) ceramic capacitors across VIN to PGND pins.
(3) System conditions as defined in Note 2. Peak output current is applied for tp = 50 µs.
4
Copyright © 2017–2018, Texas Instruments Incorporated
CSD95490Q5MC
www.ti.com.cn
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
7 Application Schematic
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Copyright © 2016, Texas Instruments Incorporated
Figure 1. Application Schematic
Note: The schematic in Figure 1 is a conceptual drawing only. Actual designs may require additional components
not shown.
版权 © 2017–2018, Texas Instruments Incorporated
5
CSD95490Q5MC
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
www.ti.com.cn
8 器件和文档支持
8.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. 有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
8.2 Community Resources
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
8.3 商标
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
8.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
8.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
6
版权 © 2017–2018, Texas Instruments Incorporated
CSD95490Q5MC
www.ti.com.cn
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
9 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知和修
订此文档。如欲获取此数据表的浏览器版本，请参阅左侧的导航。
9.1 机械制图
5.1
4.9
A
B
PIN 1 INDEX AREA
6.1
5.9
NOTE 4
TYP
C
1.0±0.05
SEATING PLANE
0.08 C
(0.51) TYP
(0.51)
3.3±0.1
(0.2) TYP
2X (2)
4X (0.25)
0.05
0
0.6
0.4
2X (0.31)
2X
6
7
EXPOSED
THERMAL
PAD
2X
5
13
5.4±0.1
NOTE 4
1
12
20[.0]X 0.5
0.3
0.2
22[.0]X
0.6
0.4
10X
PIN 1 ID
(OPTIONAL)
0.1
0.05
C A B
C
1. 所有线性尺寸的单位均为毫米。括号中的任何尺寸仅供参考。尺寸和公差值符合 ASME Y14.5M 标准。
2. 本图如有变更，恕不另行通知。
3. 封装散热盘必须在印刷电路板上焊接，包装散热和机械性能。
4. 外露的连接杆 特性 可能会有所不同。
版权 © 2017–2018, Texas Instruments Incorporated
7
CSD95490Q5MC
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
www.ti.com.cn
9.2 推荐 PCB 焊盘图案
(3.3)
10X (0.7)
1
SYMM
(R0.05) TYP
12
22X (0.25)
20X (0.5)
2X
(1.13)
6X
(1.32)
8
5
13
SYMM
(5.4)
METAL UNDER
SOLDER MASK
2X
2X
(2.85)
SOLDER MASK
OPENING
2X
(
0.2) VIA
TYP
6
7
(0.05) TYP
6X (1.4)
2X (0.7)
2X (0.31)
(4.7)
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED FOR PADS 1 - 5 & 8 - 12)
SOLDER MASK
DEFINED
(PADS 6 - 7, OPTIONAL FOR OTHER PADS)
1. 所有线性尺寸的单位均为毫米。括号中的任何尺寸仅供参考。尺寸和公差值符合 ASME Y14.5M 标准。
2. 本图如有变更，恕不另行通知。
3. 此封装设计用于焊接到电路板的散热焊盘上。有关更多信息，请参阅《QFN/SON PCB 连接》(SLUA271)。
4. 根据具体应用决定是否选用通孔，请参见器件数据表。如需实施任意通孔，请参见此视图上的通孔位置。建议
对焊锡膏下方的通孔进行填充、堵塞或包覆。
8
版权 © 2017–2018, Texas Instruments Incorporated
CSD95490Q5MC
www.ti.com.cn
ZHCSHB0A –MARCH 2017–REVISED JANUARY 2018
9.3 建议模板开口
SYMM
METAL
TYP
13
10X (0.7)
8X (1.41)
1
12
8X
(1.12)
22X (0.25)
20X (0.5)
8
5
SYMM
(0.66)
TYP
(R0.05) TYP
METAL UNDER
SOLDER MASK
2X
(1.32)
TYP
7
6
2X (0.7)
(0.8) TYP
(4.7)
2X (0.31)
1. 所有线性尺寸的单位均为毫米。括号中的任何尺寸仅供参考。尺寸和公差值符合 ASME Y14.5M 标准。
2. 本图如有变更，恕不另行通知。
3. 具有漏斗形壁和圆角的激光切割孔可提供更佳的锡膏脱离。IPC-7525 可能提供替代设计建议。
版权 © 2017–2018, Texas Instruments Incorporated
9
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
2500
250
(1)
(2)
(3)
(4/5)
(6)
CSD95490Q5MC
CSD95490Q5MCT
ACTIVE
VSON-CLIP
VSON-CLIP
DMC
12
12
RoHS-Exempt
& Green
SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-55 to 150
-55 to 150
95490MC
95490MC
ACTIVE
DMC
RoHS-Exempt
& Green
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2021
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD95490Q5MC
CSD95490Q5MCT
VSON-
CLIP
DMC
DMC
12
12
2500
250
330.0
12.4
5.3
6.3
1.2
8.0
12.0
Q1
VSON-
CLIP
180.0
12.4
5.3
6.3
1.2
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CSD95490Q5MC
CSD95490Q5MCT
VSON-CLIP
VSON-CLIP
DMC
DMC
12
12
2500
250
367.0
213.0
367.0
191.0
38.0
35.0
Pack Materials-Page 2
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