EMB1412MYE/NOPB [TI]
MOSFET Gate Driver;
| 型号： | EMB1412MYE/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | MOSFET Gate Driver 栅 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总15页 (文件大小：767K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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EMB1412
SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
EMB1412 MOSFET Gate Driver
1 Features
3 Description
The EMB1412 MOSFET gate driver provides high
peak gate drive current in 8-lead exposed-pad
VSSOP package, with improved power dissipation
required for high frequency operation. The compound
output driver stage includes MOS and bipolar
transistors operating in parallel that together sink
more than 7-A peak from capacitive loads. Combining
the unique characteristics of MOS and bipolar
devices reduces drive current variation with voltage
and temperature. Under-voltage lockout protection is
provided to prevent damage to the MOSFET due to
insufficient gate turn-on voltage. The EMB1412
provides both inverting and non-inverting inputs to
satisfy requirements for inverting and non-inverting
gate drive with a single device type.
1
•
Compound CMOS and Bipolar Outputs Reduce
Output Current Variation
•
•
•
7 A Sink/3 A Source Current
Fast Propagation Times (25 ns Typical)
Fast Rise and Fall Times (14 ns/12 ns Rise/Fall
with 2 nF Load)
•
Inverting and Non-Inverting Inputs Provide Either
Configuration with a Single Device
•
•
Supply Rail Under-Voltage Lockout Protection
Dedicated Input Ground (IN_REF) for Split Supply
or Single Supply Operation
•
•
Thermally Enhanced 8-Pin VSSOP Package
Output Swings from VCC to VEE Which can be
Negative Relative to Input Ground
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
2 Applications
EMB1412
HVSSOP (8)
3.00 mm x 3.00 mm
•
•
•
•
•
Li-Ion Battery Management Systems
Hybrid and Electric Vehicles
Grid Storage
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
48 V Systems Supply
UPS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
EMB1412
SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 Handling Ratings ...................................................... 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information ................................................. 4
6.5 Electrical Characteristics........................................... 4
7
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
Layout ..................................................................... 8
8.1 Layout Guidelines ..................................................... 8
8.2 Thermal Performance .............................................. 8
Device and Documentation Support.................... 9
9.1 Trademarks............................................................... 9
9.2 Electrostatic Discharge Caution................................ 9
9.3 Glossary.................................................................... 9
8
9
10 Mechanical, Packaging, and Orderable
Information ............................................................. 9
4 Revision History
Changes from Revision A (May 2013) to Revision B
Page
•
•
Added Handling Ratings Table .............................................................................................................................................. 4
Changed layout of National Data Sheet to TI format. ............................................................................................................ 8
2
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
5 Pin Configuration and Functions
VSSOP (DGN)
8 Pins
Top View
IN_REF
INB
1
2
3
4
8
7
6
5
N/C
OUT
VCC
N/C
VEE
IN
Pin Functions
PIN
NAME
DESCRIPTION
APPLICATION INFORMATION
1
IN_REF
Ground reference for control inputs
Connect to power ground (VEE) for standard positive only output
voltage swing. Connect to system logic ground when VEE is
connected to a negative gate drive supply.
2
3
INB
Inverting input pin
TTL compatible thresholds. Connect to IN_REF when not used.
VEE
Power ground for driver outputs
Connect to either power ground or a negative gate drive supply
for positive or negative voltage swing.
4
5, 8
6
IN
Non-inverting input pin
TTL compatible thresholds. Pull up to VCC when not used.
N/C
VCC
Not internally connected
Positive Supply voltage input
Locally decouple to VEE. The decoupling capacitor should be
located close to the chip.
7
OUT
Gate drive output
Capable of sourcing 3 A and sinking 7 A. Voltage swing of this
output is from VEE to VCC.
- - -
Exposed
Pad
Exposed Pad, underside of package
Internally bonded to the die substrate. Connect to VEE ground pin
for low thermal impedance.
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
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6 Specifications
6.1 Absolute Maximum Ratings(1)
MIN
−0.3
−0.3
−0.3
−0.3
MAX
15
UNIT
V
VCC to VEE
VCC to IN_REF
15
V
IN/INB to IN_REF
IN_REF to VEE
15
V
5
V
Maximum junction temperature
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 Handling Ratings
MIN
MAX
UNIT
Tstg
Storage temperature range
Electrostatic discharge
–55
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins(1)
V(ESD)
2
kV
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
125
UNIT
Operating Junction Temperature
−40
°C
6.4 Thermal Information
EMB1412
THERMAL METRIC(1)
VSSOP (DGN)
8 PINS
60(2)
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
4.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The primary goal of the thermal management is to maintain the integrated circuit (IC) junction temperature (TJ) below a specified limit to
ensure reliable long term operation. The maximum TJ of IC components should be estimated in worst case operating conditions. The
junction temperature can be calculated based on the power dissipated on the IC and the junction to ambient thermal resistance RθJA for
the IC package in the application board and environment. The RθJA is not a given constant for the package and depends on the PCB
design and the operating environment.
6.5 Electrical Characteristics
TJ = −40°C to 125°C, VCC = 12 V, INB = IN_REF = VEE = 0 V, No Load on output, unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VCC
VCC Operating Range
VCC – IN_REF and VCC - VEE
VCC – IN_REF
3.5
2.4
14
V
V
UVLO
VCCH
ICC
VCC Under-voltage Lockout (rising)
VCC Under-voltage Hysteresis
VCC Supply Current
3.0
230
1.0
3.5
mV
mA
2.0
CONTROL INPUTS
VIH
Logic High
2.3
V
V
VIL
Logic Low
0.8
2.3
2.0
VthH
VthL
HYS
High Threshold
Low Threshold
Input Hysteresis
1.3
0.8
1.75
1.35
400
V
V
mV
4
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
Electrical Characteristics (continued)
TJ = −40°C to 125°C, VCC = 12 V, INB = IN_REF = VEE = 0 V, No Load on output, unless otherwise specified.
PARAMETER
Input Current Low
Input Current High
TEST CONDITIONS
IN = INB = 0 V
MIN
-1
TYP
0.1
MAX
UNIT
µA
IIL
1
1
IIH
IN = INB = VCC
-1
0.1
µA
OUTPUT DRIVER
ROH
Output Resistance High
IOUT = -10 mA(1)
IOUT = 10 mA(1)
30
1.4
3
50
Ω
Ω
A
A
ROL
Output Resistance Low
Peak Source Current
Peak Sink Current
2.5
ISOURCE
ISINK
OUT = VCC/2, 200 ns pulsed current
OUT = VCC/2, 200 ns pulsed current
7
SWITCHING CHARACTERISTICS
td1
Propagation Delay Time Low to High, CLOAD = 2 nF
IN/ INB rising ( IN to OUT)
25
25
40
40
ns
ns
td2
Propagation Delay Time High to Low, CLOAD = 2 nF
IN / INB falling (IN to OUT)
tr
tf
Rise time
Fall time
CLOAD = 2 nF
CLOAD = 2 nF
14
12
ns
ns
LATCHUP PROTECTION
AEC –Q100, METHOD 004
THERMAL RESISTANCE
TJ = 150°C
500
mA
RθJA
Junction to Ambient,
0 LFPM Air Flow
VSSOP Package
VSSOP Package
60
°C/W
°C/W
RθJC
Junction to Case
4.7
(1) The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and
Bipolar devices.
50%
50%
INB
t
D1
t
D2
OUTPUT
90%
10%
t
t
r
f
Figure 1. (A) Inverting
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
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50%
50%
IN
t
D1
t
D2
90%
OUTPUT
10%
t
f
t
r
Figure 2. (B) Non-Inverting
6
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EMB1412
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
7 Detailed Description
7.1 Overview
The EMB1412 is a high speed, high peak current (7 A) single channel MOSFET driver. The high peak output
current of the EMB1412 will switch power MOSFETs on and off with short rise and fall times, thereby reducing
switching losses considerably. The EMB1412 includes both inverting and non-inverting inputs that give the user
flexibility to drive the MOSFET with either active low or active high logic signals. The driver output stage consists
of a compound structure with MOS and bipolar transistor operating in parallel to optimize current capability over a
wide output voltage and operating temperature range. The bipolar device provides high peak current at the
critical Miller plateau region of the MOSFET VGS, while the MOS device provides rail-to-rail output swing. The
totem pole output drives the MOSFET gate between the gate drive supply voltage VCC and the power ground
potential at the VEE pin.
The control inputs of the driver are high impedance CMOS buffers with TTL compatible threshold voltages. The
negative supply of the input buffer is connected to the input ground pin IN_REF. An internal level shifting circuit
connects the logic input buffers to the totem pole output drivers. The level shift circuit and separate input/output
ground pins provide the option of single supply or split supply configurations. When driving the MOSFET gates
from a single positive supply, the IN_REF and VEE pins are both connected to the power ground.
The isolated input and output stage grounds provide the capability to drive the MOSFET to a negative VGS
voltage for a more robust and reliable off state. In split supply configuration, the IN_REF pin is connected to the
ground of the controller which drives the EMB1412 inputs. The VEE pin is connected to a negative bias supply
that can range from the IN_REF potential to as low as 14 V below the VCC gate drive supply. For reliable
operation, the maximum voltage difference between VCC and IN_REF or between VCC and VEE is 14 V.
The minimum recommended operating voltage between VCC and IN_REF is 3.5 V. An Under-Voltage Lock Out
(UVLO) circuit is included in the EMB1412 which senses the voltage difference between VCC and the input
ground pin, IN_REF. When the VCC to IN_REF voltage difference falls below 2.8 V the driver is disabled and the
output pin is held in the low state. The driver will resume normal operation when the VCC to IN_REF differential
voltage exceeds 3 V.
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SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
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8 Layout
8.1 Layout Guidelines
Attention must be given to board layout when using EMB1412. Some important considerations include:
1. A Low ESR/ESL capacitor must be connected close to the IC and between the VCC and VEE pins to support
high peak currents being drawn from VCC during turn-on of the MOSFET.
2. Proper grounding is crucial. The driver needs a very low impedance path for current return to ground
avoiding inductive loops. Two paths for returning current to ground are a) between EMB1412 IN_REF pin
and the ground of the circuit that controls the driver inputs and b) between EMB1412 VEE pin and the source
of the power MOSFET being driven. Both paths should be as short as possible to reduce inductance and be
as wide as possible to reduce resistance. These ground paths should be distinctly separate to avoid coupling
between the high current output paths and the logic signals that drive the EMB1412. With rise and fall times
in the range of 10 to 30 nsec, care is required to minimize the lengths of current carrying conductors to
reduce their inductance and EMI from the high di/dt transients generated when driving large capacitive loads.
3. If either channel is not being used, the respective input pin (IN or INB) should be connected to either VEE or
VCC to avoid spurious output signals.
8.2 Thermal Performance
The primary goal of the thermal management is to maintain the integrated circuit (IC) junction temperature (TJ)
below a specified limit to ensure reliable long term operation. The maximum TJ of IC components should be
estimated in worst case operating conditions. The junction temperature can be calculated based on the power
dissipated on the IC and the junction to ambient thermal resistance RθJA for the IC package in the application
board and environment. The RθJA is not a given constant for the package and depends on the PCB design and
the operating environment.
8
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Product Folder Links: EMB1412
EMB1412
www.ti.com
SNOSB66B –AUGUST 2011–REVISED NOVEMBER 2014
9 Device and Documentation Support
9.1 Trademarks
All trademarks are the property of their respective owners.
9.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
9.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2011–2014, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Sep-2015
PACKAGING INFORMATION
Orderable Device
EMB1412MY/NOPB
EMB1412MYE/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
MSOP-
PowerPAD
DGN
8
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
SA3B
SA3B
ACTIVE
MSOP-
DGN
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
PowerPAD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Sep-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
1000
250
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
EMB1412MY/NOPB
EMB1412MYE/NOPB
MSOP-
Power
PAD
DGN
DGN
8
8
178.0
178.0
12.4
12.4
5.3
5.3
3.4
3.4
1.4
1.4
8.0
8.0
12.0
12.0
Q1
Q1
MSOP-
Power
PAD
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
EMB1412MY/NOPB
EMB1412MYE/NOPB
MSOP-PowerPAD
MSOP-PowerPAD
DGN
DGN
8
8
1000
250
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DGN0008A
MUY08A (Rev A)
BOTTOM VIEW
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