INA1650 [TI]

双路 SoundPlus™ 高共模抑制 (91dB)、低 THD+N (-120dB) 差分线路接收器;
INA1650
型号: INA1650
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

双路 SoundPlus™ 高共模抑制 (91dB)、低 THD+N (-120dB) 差分线路接收器

文件: 总41页 (文件大小:2688K)
中文:  中文翻译
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INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
INA165x SoundPlus™ 高共模抑制线路接收器  
1 特性  
3 说明  
1
高共模抑制:  
91dB(典型值)  
双通道 INA1650 和单通道 INA1651 (INA165x)  
SoundPlus™音频线路接收器可实现 91dB 的超高共模  
抑制比 (CMRR),同时对于 22dBu 信号电平可在  
1kHz 时保持 –120dB 的超低 THD+N。片上电阻器的  
精密匹配特性为 INA165x 器件提供了出色的 CMRR  
性能。这些电阻器具有远远优于外部组件的匹配特性,  
并且不受印刷电路板 (PCB) 布局所导致的失配问题的  
影响。不同于其他线路接收器产品,INA165x CMRR  
在额定温度范围内能保持特性不变,经生产测试可在各  
种应用中提供始终如一的 性能。  
高输入阻抗:1MΩ 差分  
超低噪声:–104.7dBu,未加权  
超低总谐波失真 + 噪声:  
–120dB THD+N22dBu22kHz 带宽)  
高带宽:2.7MHz  
低静态电流:6mAINA1651,典型值)  
短路保护  
集成电磁干扰 (EMI) 滤波器  
宽电源电压范围:±2.25V ±18V  
采用小型 14 引脚 TSSOP 封装  
INA165x 器件支持 ±2.25V ±18V 的宽电源电压范  
围,电源电流为 10.5mA。除线路接收器通道之  
外,INA165x 还包含一个缓冲的中间电压基准输出,  
因此可将其配置为用于双电源或单电源 应用。中间电  
源输出可用作信号链中其他模拟电路的偏置电压。这些  
器件额定工作温度范围为 –40°C +125°C。  
2 应用  
差分音频接口  
音频输入电路  
线路驱动器  
器件信息(1)  
音频功率放大器  
音频分析仪  
器件型号  
INA1650  
INA1651  
封装  
TSSOP (14)  
TSSOP (14)  
封装尺寸(标称值)  
4.40mm × 5.00mm  
4.40mm × 5.00mm  
高端影音 (A/V) 接收器  
(1) 如需了解所有可用封装,请参阅数据表末尾的封装选项附录。  
INA165x 简化内部原理图  
VCC  
VEE  
IN+ A  
COM A  
INœ A  
CMRR 直方图(5746 通道)  
+
25  
OUT A  
REF A  
œ
20  
15  
10  
5
VCC  
œ
+
VMID(IN)  
VEE  
INA1650 ONLY  
0
REF B  
OUT B  
INœ B  
COM B  
IN+ B  
CMRR (V/V)  
œ
C001  
+
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确  
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。  
English Data Sheet: SBOS818  
 
 
 
 
INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
www.ti.com.cn  
目录  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 5  
6.1 Absolute Maximum Ratings ...................................... 5  
6.2 ESD Ratings.............................................................. 5  
6.3 Recommended Operating Conditions....................... 5  
6.4 Thermal Information.................................................. 5  
6.5 Electrical Characteristics: ........................................ 6  
6.6 Typical Characteristics.............................................. 8  
Detailed Description ............................................ 15  
7.1 Overview ................................................................. 15  
7.2 Functional Block Diagram ....................................... 15  
7.3 Feature Description................................................. 15  
7.4 Device Functional Modes........................................ 17  
8
9
Application and Implementation ........................ 18  
8.1 Application Information............................................ 18  
8.2 Typical Applications ................................................ 22  
Power Supply Recommendations...................... 29  
10 Layout................................................................... 29  
10.1 Layout Guidelines ................................................. 29  
10.2 Layout Examples................................................... 30  
11 器件和文档支持 ..................................................... 32  
11.1 器件支持................................................................ 32  
11.2 文档支持................................................................ 32  
11.3 相关链接................................................................ 32  
11.4 接收文档更新通知 ................................................. 33  
11.5 社区资源................................................................ 33  
11.6 ....................................................................... 33  
11.7 静电放电警告......................................................... 33  
11.8 术语表 ................................................................... 33  
12 机械、封装和可订购信息....................................... 33  
7
4 修订历史记录  
注:之前版本的页码可能与当前版本有所不同。  
Changes from Revision A (September 2018) to Revision B  
Page  
已更改 将 INA1651 器件从产品预览更改为生产数据(正在供货) ........................................................................................ 1  
Changes from Original (September 2018) to Revision A  
Page  
已添加 新的 INA1651 作为预告信....................................................................................................................................... 1  
2
Copyright © 2016–2018, Texas Instruments Incorporated  
 
INA1650, INA1651  
www.ti.com.cn  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
5 Pin Configuration and Functions  
INA1650 PW Package  
14-Pin TSSOP  
Top View  
VCC  
IN+ A  
1
2
3
4
5
6
7
14  
VEE  
13  
12  
11  
10  
9
OUT A  
REF A  
COM A  
INœ A  
VMID(IN)  
VMID(OUT)  
REF B  
INœ B  
COM B  
IN+ B  
8
OUT B  
Not to scale  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
COM A  
COM B  
IN+ A  
IN– A  
IN+ B  
IN– B  
OUT A  
OUT B  
REF A  
REF B  
VCC  
NO.  
3
I
I
Input common, channel A  
Input common, channel B  
Noninverting input, channel A  
Inverting input, channel A  
Noninverting input, channel B  
Inverting input, channel B  
Output, channel A  
6
2
I
4
I
7
I
5
I
13  
8
O
O
I
Output, channel B  
12  
9
Reference input, channel A. This pin must be driven from a low impedance.  
Reference input, channel B. This pin must be driven from a low impedance.  
Positive (highest) power supply  
I
1
VEE  
14  
Negative (lowest) power supply  
Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the  
supply divider circuit.  
VMID(IN)  
11  
10  
I
VMID(OUT)  
O
Buffered output of internal supply divider.  
Copyright © 2016–2018, Texas Instruments Incorporated  
3
INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
www.ti.com.cn  
INA1651 PW Package  
14-Pin TSSOP  
Top View  
VCC  
IN+ A  
COM A  
INœ A  
NC  
1
2
3
4
5
6
7
14  
VEE  
13  
12  
11  
10  
9
OUT A  
REF A  
VMID(IN)  
VMID(OUT)  
NC  
NC  
NC  
8
NC  
Not to scale  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
COM A  
IN+ A  
IN– A  
NC  
NO.  
3
I
Input common, channel A  
Noninverting input, channel A  
Inverting input, channel A  
No internal connection  
No internal connection  
No internal connection  
No internal connection  
No internal connection  
Output, channel A  
2
I
4
I
5
O
I
NC  
6
NC  
7
NC  
8
NC  
9
OUT A  
REF A  
VCC  
VEE  
13  
12  
1
Reference input, channel A. This pin must be driven from a low impedance.  
Positive (highest) power supply  
14  
Negative (lowest) power supply  
Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the  
supply divider circuit.  
VMID(IN)  
11  
10  
I
VMID(OUT)  
O
Buffered output of internal supply divider.  
4
Copyright © 2016–2018, Texas Instruments Incorporated  
INA1650, INA1651  
www.ti.com.cn  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
MAX  
UNIT  
V
Supply voltage, VS = (V+) – (V–)  
40  
Voltage  
Input voltage (Signal inputs, enable, ground)  
Input differential voltage  
Input current (all pins except power-supply pins)  
Output short-circuit(2)  
(V–) – 0.5  
(V+) + 0.5  
(V+) – (V–)  
±10  
mA  
Current  
Continuous  
125  
Operating, TA  
–55  
–65  
Temperature  
Junction, TJ  
150  
°C  
Storage, Tstg  
150  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) Short-circuit to VS / 2 (ground in symmetrical dual supply setups), one amplifier per package.  
6.2 ESD Ratings  
VALUE  
UNIT  
INA1650  
V(ESD)  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)  
±4000  
±1000  
Electrostatic discharge  
V
INA1651  
V(ESD)  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)  
±4000  
±750  
Electrostatic discharge  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
4.5 (±2.25)  
–40  
NOM  
MAX  
36 (±18)  
125  
UNIT  
Supply voltage (V+ – V–)  
Specified temperature  
V
°C  
6.4 Thermal Information  
INA1650  
INA1651  
THERMAL METRIC(1)  
PW (TSSOP)  
14 PINS  
97.0  
PW (TSSOP)  
14 PINS  
99.4  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
22.6  
29.9  
40.4  
42.6  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
0.9  
1.5  
ψJB  
39.6  
42.0  
RθJC(bot)  
N/A  
N/A  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
Copyright © 2016–2018, Texas Instruments Incorporated  
5
INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
www.ti.com.cn  
6.5 Electrical Characteristics:  
at TA = 25°C, VS = ±2.25 V to ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
AUDIO PERFORMANCE  
0.00039%  
–108.1  
VO = 3 VRMS, f = 1kHz, 90-kHz measurement bandwidth,  
VS = ±18 V  
dB  
dB  
dB  
dB  
Total harmonic distortion +  
noise  
THD+N  
IMD  
0.000174%  
–115.2  
VIN = 22 dBu (9.7516 VRMS) , FIN = 1 kHz, VS = ±18 V,  
90-kHz measurement bandwidth  
0.0005%  
–106.1  
SMPTE and DIN two-tone, 4:1 (60 Hz and 7 kHz)  
VO = 3 VRMS, 90-kHz measurement bandwidth  
Intermodulation distortion  
0.00066%  
–103.6  
CCIF twin-tone (19 kHz and 20 kHz),  
VO = 3 VRMS, 90-kHz measurement bandwidth  
AC PERFORMANCE  
BW  
SR  
Small-signal bandwidth  
2.7  
10  
MHz  
V/μs  
MHz  
Slew rate  
Full-power bandwidth(1)  
VO = 1 VP  
1.59  
71°  
54°  
2.2  
CL = 20 pF  
PM  
ts  
Phase margin  
CL = 200 pF  
Settling time  
To 0.01%, Vs = ±18 V, 10-V step  
μs  
ns  
Overload recovery time  
330  
140  
130  
80  
f = 1 kHz, REF and COM pins connected to ground  
f = 1 kHz, REF and COM pins connected to VMID(OUT)  
dB  
Channel separation  
dB  
EMI/RFI filter corner frequency  
MHz  
NOISE  
4.5  
–104.7  
47  
μVRMS  
Output voltage noise  
f = 20 Hz to 20 kHz, no weighting  
dBu  
f = 100 Hz  
f = 1 kHz  
en  
Output voltage noise density(2)  
nV/Hz  
31  
OFFSET VOLTAGE  
±1  
±3  
±4  
7
VOS  
Output offset voltage  
mV  
TA = –40°C to +125°C(2)  
TA = –40°C to +125°C  
dVOS/dT Output offset voltage drift(2)  
2
2
μV/°C  
μV/V  
PSRR  
Power-supply rejection ratio  
GAIN  
Gain  
1
0.04%  
0.05%  
1
V/V  
0.05%  
0.06%  
5
Gain error  
Gain nonlinearity  
TA = –40°C to +125°C(2)  
(2)  
VS = ±18 V, –10 V < VO < 10 V  
ppm  
INPUT VOLTAGE RANGE  
VCM  
Common-mode voltage range  
(V–) + 0.25  
(V+) – 2  
V
(V–) + 0.25 V VCM (V+) – 2 V, REF and COM pins  
connected to ground, VS = ±18 V  
TA = –40°C to +125°C(2)  
85  
82  
82  
76  
91  
89  
86  
84  
84  
dB  
CMRR  
Common-mode rejection ratio  
(V–) + 0.25 V VCM (V+) – 2 V, REF and COM pins  
connected to VMID(OUT), VS = ±18 V  
TA = –40°C to +125°C(2)  
(V–) + 0.25 V VCM (V+) – 2 V, REF and COM pins  
connected to ground, VS = ±18 V, RS mismatch = 20 Ω  
CMRR  
Common-mode rejection ratio  
dB  
(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.  
(2) Specified by design and characterization.  
6
Copyright © 2016–2018, Texas Instruments Incorporated  
INA1650, INA1651  
www.ti.com.cn  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
Electrical Characteristics: (continued)  
at TA = 25°C, VS = ±2.25 V to ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
INPUT IMPEDANCE  
Differential  
850  
1000  
250  
1150  
287.5  
0.25%  
kΩ  
kΩ  
Common-mode  
212.5  
Input resistance mismatch  
0.01%  
SUPPLY DIVIDER CIRCUIT  
Nominal output voltage  
Output voltage offset  
Input impedance  
[ (V+) + (V–) ] / 2  
V
mV  
kΩ  
VMID(IN) = ((V+) + (V–) / 2  
2
250  
0.35  
1.56  
150  
4
VMID(IN) pin, f = 1 kHz  
VMID(OUT) pin  
Output resistance  
Ω
Output voltage noise  
Output capacitive load limit  
20 Hz to 20 kHz, CMID = 1 µF  
Phase margin > 45°, RISO = 0 Ω  
µVRMS  
pF  
OUTPUT  
RL = 2 kΩ  
RL = 600 Ω  
RL = 2 kΩ  
RL = 600 Ω  
350  
1100  
Positive rail  
Negative rail  
VO  
Voltage output swing from rail  
mV  
430  
1300  
ZOUT  
ISC  
Output impedance  
Short-circuit current  
Capacitive load drive  
f 100 kHz, IOUT = 0 A  
< 1  
Ω
VS = ±18 V  
±75  
mA  
pF  
CLOAD  
See 19  
POWER SUPPLY  
4.6  
8
6
6.9  
8
IOUT = 0 A, INA1651  
IOUT = 0 A, INA1650  
TA = –40°C to +125°C(2)  
TA = –40°C to +125°C(2)  
IQ  
Quiescent current  
mA  
10.5  
12  
14  
版权 © 2016–2018, Texas Instruments Incorporated  
7
INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
www.ti.com.cn  
6.6 Typical Characteristics  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
25  
20  
15  
10  
5
25  
20  
15  
10  
5
0
0
CMRR (V/V)  
CMRR (V/V)  
C001  
C001  
5746 Channels  
5746 Channels  
VREF Pins Connected to Ground  
VREF Pins Connected to VMID(OUT)  
1. Common-Mode Rejection Ratio Distribution  
2. Common-Mode Rejection Ratio Distribution  
35  
30  
25  
20  
15  
10  
5
35  
30  
25  
20  
15  
10  
5
0
0
Input Resistance Mismatch (%)  
Gain Error (%)  
C001  
C001  
5746 Channels  
5746 Channels  
3. Distribution of Mismatch in 500-kΩ Input Resistors  
4. Gain Error Distribution  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
0
0
Output Offset Voltage (V)  
Offset Voltage Drift (µV/°C)  
C001  
C001  
5746 Channels  
52 Channels  
5. Offset Voltage Distribution  
6. Offset Voltage Drift Distribution  
8
版权 © 2016–2018, Texas Instruments Incorporated  
INA1650, INA1651  
www.ti.com.cn  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
20  
10  
VS = +/- 18 V  
VS = +/- 5 V  
18  
5
VS = +/- 2.25 V  
16  
14  
0
12  
10  
8
-5  
-10  
-15  
-20  
6
4
2
0
100  
1k  
10k  
100k  
1M  
10M  
10k  
100k  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
C004  
C015  
7. Frequency Response  
8. Maximum Output Voltage vs Frequency  
100  
90  
80  
70  
60  
50  
40  
120  
100  
80  
60  
40  
20  
0
+PSRR  
REF / COM Pins Connected to VMID(OUT)  
REF / COM Pins Connected to Ground  
œPSRR  
10  
100  
1k  
10k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
C004  
C004  
9. Common-Mode Rejection Ratio vs Frequency  
10. Power Supply Rejection Ratio vs Frequency  
0.01  
-80  
1000  
100  
10  
600-Load  
2-kLoad  
0.001  
0.0001  
-100  
-120  
-140  
0.00001  
1
10  
100  
1k  
10k  
100k  
10  
100  
1k  
Frequency (Hz)  
10k  
Frequency (Hz)  
C002  
C001  
3 VRMS, 90-kHz Measurement Bandwidth  
11. Voltage Noise Spectral Density  
12. THD+N vs Frequency  
版权 © 2016–2018, Texas Instruments Incorporated  
9
INA1650, INA1651  
ZHCSFV5B DECEMBER 2016REVISED NOVEMBER 2018  
www.ti.com.cn  
Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
0.1  
-60  
0.1  
-60  
600-Load  
2-kLoad  
-70  
0.01  
-80  
0.01  
-80  
-90  
0.001  
-100  
-110  
-120  
-130  
-140  
0.001  
0.0001  
-100  
-120  
0.0001  
0.00001  
600-Load  
2-kLoad  
0.01  
0.1  
1
10  
10  
100  
1k  
Frequency (Hz)  
10k  
100k  
Output Voltage (VRMS  
)
C003  
C001  
1 kHz, 90-kHz Measurement Bandwidth  
3 VRMS, 500-kHz Measurement Bandwidth  
14. THD+N vs Output Amplitude  
13. THD+N vs Frequency  
0.1  
0.01  
-60  
0.1  
0.01  
-60  
-70  
-70  
-80  
-80  
-90  
-90  
0.001  
-100  
-110  
-120  
-130  
-140  
0.001  
-100  
-110  
-120  
-130  
-140  
0.0001  
0.00001  
0.0001  
0.00001  
600-Load  
2-kLoad  
600-Load  
2-kLoad  
0.01  
0.1  
1
10  
0.01  
0.1  
1
10  
Output Voltage (VRMS  
)
Output Voltage (VRMS  
)
C003  
C003  
SMPTE 4:1 60 Hz and 7 kHz, 90-kHz Measurement Bandwidth  
CCIF 19 kHz and 20 kHz, 90-kHz Measurement Bandwidth  
15. SMPTE Intermodulation Distortion vs Output  
16. CCIF Intermodulation Distortion vs Output Amplitude  
Amplitude  
100  
10  
100  
10  
1
1
0.1  
0.1  
0.01  
0.01  
0.001  
0.0001  
0.001  
0.0001  
0.00001  
1
10  
100  
1k  
10k  
100k  
1M  
10M  
1
10  
100  
1k  
10k  
100k  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
C007  
C007  
CF = 1 µF  
17. Signal Path Output Impedance vs Frequency  
18. Supply Divider Output Impedance vs Frequency  
10  
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Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
-40  
70  
60  
50  
40  
30  
20  
10  
0
REF / COM Pins Grounded  
REF / COM Pins Connected to VMID(OUT)  
Positive Overshoot  
Negative Overshoot  
-60  
-80  
-100  
-120  
-140  
-160  
-180  
1
10  
100  
1000  
10k  
100k  
Frequency (Hz)  
1M  
10M  
Capacitive Load (pF)  
C004  
C007  
100-mV Input Step  
19. Overshoot vs Capacitive Load  
20. Channel Separation vs Frequency  
Time (2.5 µs/div)  
Time (2.5 µs/div)  
C017  
C017  
10-mV Input Step  
10-V Input Step  
21. Small-Signal Step Response  
22. Large-Signal Step Response  
Time (500 ns/div)  
Time (500 ns/div)  
C017  
C017  
10-V Input Step, 0.01% Settling = ± 1 mV  
10-V Input Step, 0.01% Settling = ± 1 mV  
23. Rising-Edge Settling Time  
24. Falling-Edge Settling Time  
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Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
115  
Unit 1  
Unit 3  
Unit 5  
Unit 2  
Unit 4  
110  
105  
100  
95  
90  
Input Signal  
Output Signal  
85  
Time (0.25 ms/div)  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature (°C)  
C001  
C017  
5 Typical Units  
26. CMRR vs Temperature  
25. No Phase Reversal  
1500  
1000  
500  
110  
100  
90  
80  
0
70  
-500  
-1000  
-1500  
60  
Unit 1  
Unit 3  
Unit 5  
Unit 2  
Unit 4  
50  
Isc Sourcing  
Isc Sinking  
40  
-20  
-15  
-10  
-5  
0
5
10  
15  
20  
-50  
-25  
0
25  
50  
75  
100  
125  
VCM (V)  
Temperature (°C)  
C003  
C001  
5 Typical Units  
27. Output Offset Voltage vs Common-Mode Voltage  
28. Short-Circuit Current vs Temperature  
-10  
-11  
-12  
-13  
-14  
-15  
-16  
-17  
-18  
-40 C  
25 C  
18  
17  
16  
15  
14  
85 C  
125 C  
13  
-40 C  
12  
11  
10  
25 C  
85 C  
125 C  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
IO (mA)  
IO (mA)  
C001  
C001  
29. Positive Output Voltage vs Output Current  
30. Negative Output Voltage vs Output Current  
12  
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Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
14  
12  
10  
8
13  
12  
11  
10  
9
Minimum Supply = 4.5 V  
6
4
VS = +/- 18 V  
2
VS = +/- 2.25 V  
8
0
0
25  
50  
75  
100  
125  
œ50  
œ25  
0
10  
20  
30  
40  
Temperature (°C)  
Supply Voltage (V)  
C001  
C001  
32. Power Supply Current vs Temperature  
31. Power Supply Current vs Power Supply Voltage  
20  
5
4
VS = +/- 18 V  
VS = +/- 5 V  
VS = +/- 12 V  
15  
VS = +/- 2.25 V  
3
10  
5
2
1
0
0
œ1  
œ2  
œ3  
œ4  
œ5  
œ5  
œ10  
œ15  
œ20  
0
10  
20  
1
3
5
œ20  
œ10  
œ5  
œ3  
œ1  
Output Voltage (V)  
Output Voltage (V)  
C006  
C006  
REF A/B connected to 0 V  
REF A/B connected to 0 V  
33. Input Common-Mode Voltage vs Output Voltage  
34. Input Common-Mode Voltage vs Output Voltage  
20  
8
VS = +18 V  
18  
7
6
5
4
3
2
VS = +12 V  
16  
14  
12  
10  
8
6
4
1
0
VS = +9 V  
2
VS = +4.5 V  
0
0
5
10  
15  
20  
0
2
4
6
8
10  
Output Voltage (V)  
Output Voltage (V)  
C006  
C006  
REF A/B connected to VMID(OUT)  
35. Input Common-Mode Voltage vs Output Voltage  
REF A/B connected to VMID(OUT)  
36. Input Common-Mode Voltage vs Output Voltage  
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Typical Characteristics (接下页)  
at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)  
20  
18  
16  
14  
12  
10  
8
8
7
6
5
4
3
2
1
0
6
4
VS = +18 V  
VS = +12 V  
VS = +9 V  
2
VS = +4.5 V  
0
0
5
10  
15  
20  
0
2
4
6
8
Output Voltage (V)  
Output Voltage (V)  
C006  
C006  
REF A/B connected to 0 V  
37. Input Common-Mode Voltage vs Output Voltage  
REF A/B connected to 0 V  
38. Input Common-Mode Voltage vs Output Voltage  
14  
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7 Detailed Description  
7.1 Overview  
The INA165x combines high-performance audio operational amplifier cores with high-precision resistor networks  
to provide exceptional audio performance and rejection of noise which may be externally coupled into the audio  
signal path. The INA165x uses an instrumentation amplifier topology with a fixed unity gain to provide high input  
impedance and a high common-mode rejection ratio (CMRR). Unlike other line receiver products that use a  
simple four-resistor difference amplifier topology, the INA165x topology provides excellent CMRR even with  
mismatched source impedances.  
7.2 Functional Block Diagram  
VCC  
VEE  
10 k  
10 kꢀ  
IN+ A  
COM A  
IN- A  
500  
kꢀ  
+
OUT A  
REF A  
œ
500  
kꢀ  
10 kꢀ  
10 kꢀ  
VCC  
500  
kꢀ  
œ
+
VMID(IN)  
500  
kꢀ  
VEE  
VMID(OUT)  
REF B  
INA1650 ONLY  
10 kꢀ  
10 kꢀ  
IN- B  
COM B  
IN+ B  
500  
kꢀ  
œ
OUT B  
+
500  
kꢀ  
10 kꢀ  
10 kꢀ  
Copyright © 2018, Texas Instruments Incorporated  
7.3 Feature Description  
7.3.1 Audio Signal Path  
39 highlights the basic elements present in the audio signal pathway. The primary elements are: input biasing  
resistors, electromagnetic interference (EMI) filtering, input buffers, and a difference amplifier. The primary role of  
an audio line receiver is to convert a differential input signal into a single-ended output signal while rejecting  
noise that is common to both inputs (common-mode noise). The difference amplifier (which consists of an op  
amp and four matched 10-kΩ resistors) accomplishes this task. The basic transfer function of the circuit is shown  
in 公式 1:  
VOUT = V - VIN- + V  
(
)
IN+  
REF  
(1)  
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Feature Description (接下页)  
10 k  
10 kꢀ  
IN+  
REF  
OUT  
500  
kꢀ  
+
COM  
œ
500  
kꢀ  
IN-  
10 kꢀ  
10 kꢀ  
Input  
Biasing  
Resistors  
EMI  
Filtering  
Input  
Buffers  
Difference  
Amplifier  
Copyright © 2016, Texas Instruments Incorporated  
39. INA165x Audio Signal Path (Single Channel Shown)  
The input buffers prevent external resistances (such as those from the PCB, connectors, or cables) from ruining  
the precise matching of the internal 10-kΩ resistors which would degrade the high common-mode rejection of the  
difference amplifier. As is typical of many amplifiers, a small bias current flows into or out of the buffer amplifier  
inputs. This current must flow to a common potential for the buffer to function properly. The input biasing  
resistors provide an internal pathway for this current to the COM pin. The COM pin can connect to ground in a  
dual-supply system or the output of the internal supply divider (VMID(OUT)) in single-supply applications. Finally,  
EMI filtering is added to the input buffers to prevent high-frequency interference signals from propagating through  
the audio signal pathway.  
7.3.2 Supply Divider  
The INA165x integrates a supply-divider circuit which may bias the input common-mode voltage and output  
reference voltage to the halfway point between the applied power supply voltages. The nominal output voltage of  
the supply divider circuit is shown in 公式 2:  
VCC + VEE  
VMID(OUT)  
=
2
(2)  
40 illustrates the internal topology of the supply-divider circuit. The supply divider consists of two 500-kΩ  
resistors connected between the VCC and VEE pins of the INA165x. The noninverting input of a buffer amplifier  
is connected to the midpoint of the voltage divider that is formed by the 500-kΩ resistors. The buffer amplifier  
provides a low-impedance output that is required to bias the REF pins without degrading the CMRR. For dual-  
supply applications where the supply divider circuit may not be used, no connection is required for the VMID(IN) or  
VMID(OUT) pins.  
VCC  
500  
k  
œ
VMID(IN)  
+
500  
kꢀ  
VEE  
VMID(OUT)  
Copyright © 2016, Texas Instruments Incorporated  
40. Internal Supply Divider Circuit  
16  
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Feature Description (接下页)  
7.3.3 Electrical Overstress  
Designers typically ask questions about the capability of an amplifier to withstand electrical overstress. These  
questions typically focus on the device inputs, but can involve the supply voltage pins or the output pin. Each of  
these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of  
the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal  
ESD protection is built into these circuits to protect them from accidental ESD events both before and during  
product assembly. A good understanding of basic ESD circuitry and the relevance of circuitry to an electrical  
overstress event is helpful. 41 illustrates the ESD circuits contained in the INA165x. The ESD protection  
circuitry involves several current-steering diodes that are connected from the input and output pins and routed  
back to the internal power-supply lines. This protection circuitry is intended to remain inactive during normal  
circuit operation. The input pins of the INA165x are protected with internal diodes that are connected to the  
power-supply rails. These diodes clamp the applied signal to prevent the input circuitry from damage. If the input  
signal voltage exceeds the power supplies by more than 0.3 V, limit the input signal current to less than 10 mA to  
protect the internal clamp diodes. A series input resistor can typically limit the current. Some signal sources are  
inherently current-limited and do not require limiting resistors.  
VCC  
VEE  
Power Supply  
ESD Cell  
VCC  
+
IN+  
COM  
IN-  
10 k  
10 kꢀ  
VEE  
REF  
OUT  
œ
VCC  
VEE  
VCC  
+
œ
VEE  
VCC  
VEE  
VCC  
œ
+
10 kꢀ  
10 kꢀ  
VCC  
VEE  
500  
kꢀ  
œ
+
VMID(IN)  
500  
kꢀ  
VEE  
VCC  
VEE  
VMID(OUT)  
Copyright © 2016, Texas Instruments Incorporated  
41. INA165x Internal ESD Protection Circuitry  
(Single Channel and Supply-Divider Shown for Simplicity)  
7.3.4 Thermal Shutdown  
If the junction temperature of the INA165x exceeds approximately 170ºC, a thermal shutdown circuit disables the  
amplifier to protect the device from damage. The amplifier is automatically re-enabled after the junction  
temperature falls below the shutdown threshold temperature. If the condition that caused excessive power  
dissipation is not removed, the amplifier oscillates between a shutdown and enabled state until the output fault is  
corrected.  
7.4 Device Functional Modes  
7.4.1 Single-Supply Operation  
The INA165x can be used on single power supplies ranging from 4.5 V to 36 V. Use the COM and REF pins to  
level shift the internal voltages into a linear operating condition. Ideally, connecting the REF and COM pins to a  
midsupply potential (such as the VMID(OUT) pin) avoids saturating the output of the internal amplifiers.  
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8 Application and Implementation  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
8.1.1 Input Common-Mode Range  
The linear input voltage range of the INA165x input circuitry extends from 350 mV inside the negative supply  
voltage to 2 V below the positive supply, and maintains 85-dB (minimum) common-mode rejection throughout  
this range. The INA165x operates over a wide range of power supplies and VREF configurations; providing a  
comprehensive guide to common-mode range limits for all possible conditions is impractical. The common-mode  
range for most operating conditions is best calculated using the INA common-mode range calculating tool.  
8.1.2 Common-Mode Input Impedance  
The high CMRR of many line receivers can degrade by impedance mismatches in the system. 42 shows a  
common-mode noise source (VCM) connected to both inputs of a single channel of the INA165x. An external  
parasitic resistance (REXT) represents the mismatch in impedances between the common-mode noise source and  
the inputs of the INA165x. This mismatched impedance may be due to PCB layout, connectors, cabling, passive  
component tolerances, or the circuit topology. The presence of REXT in series with the IN+ input degrades the  
overall CMRR of the system because the voltage at IN+ is no longer equal to the voltage at IN–. Therefore, a  
portion of the common-mode noise converts to a differential signal and passes to the output.  
REXT  
10 k  
10 kꢀ  
REF  
OUT  
IN+  
RIN+  
RCOM  
+
œ
COM  
VCM  
RIN-  
IN-  
10 kꢀ  
10 kꢀ  
Copyright © 2016, Texas Instruments Incorporated  
42. A Single Channel of the INA165x Shown With Source Impedance Mismatch (REXT) and Optional  
Resistor (RCOM  
)
While the INA165x is significantly more resistant to these effects than typical line receivers, connecting a resistor  
(RCOM) from the COM pin to the system ground further improves CMRR performance. 43 shows the CMRR of  
the INA165x (typical CMRR of 92 dB) for increasing source impedance mismatches. If the COM pin is connected  
directly to ground (RCOM equal to 0 Ω), a 20-Ω source impedance mismatch degrades the CMRR from 92 dB to  
83.7 dB. However, if RCOM has a value of 1 MΩ, the CMRR only degrades to 89.6 dB, which is an improvement  
of approximately 6 dB.  
18  
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Application Information (接下页)  
100  
95  
90  
85  
80  
75  
70  
65  
0  
250 kꢀ  
500 kꢀ  
1 Mꢀ  
60  
0
20  
40  
60  
80  
100  
Source Impedance Mismatch (O)  
C006  
43. CMRR vs Source Impedance Mismatch for Different RCOM Values  
RCOM does not need to be a high-precision resistor with a very tight tolerance. Low cost 5% or 1% resistors can  
be used with no degradation in overall performance. The addition of RCOM does not increase the noise of the  
audio signal path.  
In single-supply systems where AC coupling is used at the inputs of the INA165x, adding RCOM lengthens the  
start-up time of the circuit. The input AC-coupling capacitors are charged to the midsupply voltage through the  
RCOM resistor, which may take a substantial amount of time if RCOM has a large value (such as 1 MΩ). Do not  
use RCOM in these systems if start-up time is a concern. In dual-supply systems with input AC-coupling  
capacitors, the capacitor voltage does not need to be charged to a midsupply point, since the capacitor voltage  
settles to ground by default. Therefore, RCOM does not increase start-up time in dual-supply systems.  
8.1.3 Start-Up Time in Single-Supply Applications  
The internal supply divider of the INA165x is constructed using two 500-kΩ resistors connected in series between  
the VCC and VEE pins. These resistors are matched on-chip to provide a reference voltage that is exactly one  
half of the power supply voltage. Noise from the power supplies and thermal noise from the resistors degrades  
the overall audio performance of the INA165x if allowed to enter the signal path. Therefore, TI recommends a  
filter capacitor (CF) is connected to the VMID(IN) pin, as shown in 44 The CF capacitor forms a low-pass filter  
with the internal 500-kΩ resistors. Noise above the corner frequency of this filter is passed to ground and is  
removed from the audio signal path. The corner frequency of the filter is shown in 公式 3:  
1
F-3dB  
=
2p250 kW CF  
(3)  
VCC  
VCC  
VCC  
500  
k  
500  
k  
ZD1  
CF  
œ
œ
VMID(IN)  
VMID(IN)  
+
+
500  
kꢀ  
500  
kꢀ  
CF  
VEE  
VEE  
VMID(OUT)  
VMID(OUT)  
Copyright © 2016, Texas Instruments Incorporated  
Copyright © 2016, Texas Instruments Incorporated  
44. Connect a Capacitor (CF) to the VMID(IN) Pin  
45. A Zener Diode (ZD1) Connected to the  
Positive Supply Can Decrease Start-Up Time  
to Reduce Noise from the Voltage Divider  
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Application Information (接下页)  
When power is applied to the INA165x, the filter capacitor (CF) charges through the internal 500-kΩ resistors. If  
the CF capacitor has a large value, the time required for VMID(OUT) to reach the final midsupply voltage may be  
extensive. Adding a zener diode from the VMID(IN) pin to the positive power supply (as shown in 45) reduces  
this time. The zener voltage must be slightly greater than one half of the power supply voltage.  
Using large AC-coupling capacitors increases the start-up time of the line receiver circuit in single-supply  
applications. When power is applied, the AC-coupling capacitors begin to charge to the midsupply voltage  
applied to the COM pin through a current flowing through the input resistors as shown in 46. The INA165x  
functions properly when the input common-mode voltage (and the capacitor voltage) is within the specified  
range. The time required for the input common-mode voltage to reach 98% of the final value is shown in 公式 4:  
T98% = 4R CIN = 4500 kW CIN  
(4)  
CIN  
IN+  
500  
k  
VMID(OUT)  
COM  
VS  
500  
kꢀ  
IN-  
CIN  
Copyright © 2016, Texas Instruments Incorporated  
46. AC-Coupling Capacitors Charge to the Midsupply Voltage Through the Input Resistors  
8.1.4 Input AC Coupling  
The signal path in most audio systems is typically AC-coupled to avoid the propagation of DC voltages, which  
can potentially damage loudspeakers or saturate power amplifiers. The capacitor values must be selected to  
pass the desired bandwidth of audio signals. The high-pass corner frequency is calculated with 公式 5:  
1
1
FC =  
=
CIN  
2∂ p RIN CIN  
2∂ p (2RIN)∂  
2
(5)  
CIN  
IN+  
500  
k  
COM  
VS  
500  
kꢀ  
IN-  
CIN  
Copyright © 2016, Texas Instruments Incorporated  
47. AC-Coupling Capacitors Form a High-Pass Filter With INA165x Input Resistors  
20  
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Application Information (接下页)  
Although the input resistors of the INA165x are matched typically within 0.01%, large capacitors are usually  
mismatched. The mismatch in the values of the AC-coupling capacitors causes the corner frequencies at the two  
signal inputs (IN+ and IN–) to be different, which can degrade CMRR at low frequency. For this reason, TI  
recommends placing the high-pass corner frequency well below the audio bandwidth and to use a resistor in  
series with the COM pin (RCOM), as shown in 42 if possible. See the Common-Mode Input Impedance section  
for more information on placing a resistor in series with the COM pin. 48 shows the effect of a 5% mismatch in  
the values of the input AC-coupling capacitors with and without an RCOM resistor. Comparing CMRR at 100 Hz:  
1-µF AC-coupling capacitors with a 5% mismatch degrade the CMRR to 75 dB, while 10-µF capacitors and a 1-  
MΩ RCOM resistor shows 92 dB of CMRR.  
95  
90  
85  
80  
75  
70  
65  
1 F  
1 F / 1 Mꢁ  
60  
55  
50  
10 F  
10 F / 1 Mꢁ  
10  
100  
1k  
10k  
Frequency (Hz)  
C007  
48. CMRR Degradation Due to a 5% Mismatch in AC-Coupling Capacitors  
8.1.5 Supply Divider Capacitive Loading  
The VMID(OUT) pin of the INA165x is stable with capacitive loads up to 150 pF. An isolation resistor (RISO in 图  
49), must be used if capacitive loads larger than 150 pF are connected to the VMID(OUT) pin. 49 shows the  
recommended configuration of an isolation resistor in series with the capacitive load. The REF pins of the  
INA1650 must connect directly to the VMID(OUT) pin before the isolation resistor. Any resistance placed  
between the VMID(OUT) pin and the reference pins degrades the CMRR of the device. 50 shows the  
recommended value for the isolation resistor for increasing capacitive loads.  
VCC  
500  
k  
œ
VMID(IN)  
+
500  
kꢀ  
CF  
REF A  
RISO  
VEE  
VMID(OUT)  
CLOAD  
REF B  
Copyright © 2016, Texas Instruments Incorporated  
49. Place an Isolation Resistor Between the VMID(OUT) Pin and Large Capacitive Loads  
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Application Information (接下页)  
1000  
60°Phase Margin  
45°Phase Margin  
100  
10  
1
0.01  
0.1  
1
10  
CLOAD (nF)  
100  
1000  
C041  
50. Recommended Isolation Resistor Value vs Capacitive Load  
8.2 Typical Applications  
The low noise and distortion of the INA165x make these devices an excellent choice for a variety of applications  
in professional and consumer audio products. However, these same performance metrics make the INA165x  
useful for industrial, test and measurement, and data-acquisition applications. The examples shown here are  
possible applications where the INA165x provide exceptional performance.  
8.2.1 Line Receiver for Differential Audio Signals in a Split-Supply System  
The INA165x devices are designed to require a minimum number of external components to achieve data sheet-  
level performance in audio line-receiver applications. 51 shows the INA1650 used as a differential audio line  
receiver in split-supply systems that are common in professional audio applications. The line receiver recovers a  
differential audio signal which may have been affected by significant common-mode noise.  
18 V  
-18 V  
C5 1 F  
C7 1 F  
Input Differential  
Audio Signals  
C6 0.1 F  
C8 0.1 F  
C1 10 F  
R3 1 Mꢁ  
R1  
100 kꢁ  
VCC  
1
2
VEE 14  
2
IN+ A  
13  
OUT A  
1
R2  
3
100 kꢁ  
3 COM A  
REF A 12  
XLR Connector  
VMID(IN)  
IN- A  
IN- B  
4
5
6
7
11  
10  
9
C2 10 F  
C3 10 F  
Output Single-Ended  
Audio Signals  
VMID(OUT)  
REF B  
R4  
100 kꢁ  
COM B  
IN+ B  
3
R4 1 Mꢁ  
8
OUT B  
1
R5  
100 kꢁ  
2
INA1650  
XLR Connector  
C4 10 F  
Copyright © 2016, Texas Instruments Incorporated  
51. INA1650 Used as a Line Receiver for Differential Audio Signals in a Split-Supply System  
22  
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Typical Applications (接下页)  
8.2.1.1 Design Requirements  
Power Supply Voltage: ±18 V  
Frequency Response: < 0.1 dB deviation from 20 Hz to 20 kHz  
Common-Mode Rejection Ratio: > 80 dB at 1 kHz  
THD+N: < –100 dB (4-dBu input signal, 1-kHz fundamental, 90-kHz measurement bandwidth)  
8.2.1.2 Detailed Design Procedure  
The passive components shown in 51 are selected using the information given in the Application Information  
and Layout Guidelines sections. All 10-µF input AC-coupling capacitors (C1, C2, C3, and C4) maximize the  
CMRR performance at low frequency, as shown in 48. The high-pass corner frequency for input signals meets  
the design requirement for frequency response, as 公式 6 shows:  
1
1
FC =  
=
= 0.032 Hz  
2pRIN CIN 2p(500 kW)(10 mF)  
(6)  
1-MΩ RCOM resistors (R3 and R4) further improve CMRR performance at low frequency. Resistors R1, R2, R4,  
and R5 provide a discharge pathway for the AC-coupling capacitors in the event that audio equipment with a DC  
offset voltage is connected to the inputs of the circuit. These resistors are optional and may degrade the CMRR  
performance with mismatches in source impedance. Finally, capacitors C5, C6, C7, and C8 provide a low-  
impedance pathway for power supply noise to pass to ground rather than interfering with the audio signal. No  
connection is necessary on the VMID(IN) and VMID(OUT) pins because the supply-divider circuit is not used in this  
particular application.  
8.2.1.3 Application Curves  
52 through 57 illustrate the measured performance of the line receiver circuit. 52 shows the measured  
frequency response. The gain of the circuit is 0 dB as expected with 0.1-dB magnitude variation at 10 Hz. The  
measured CMRR of the circuit (53) at 1 kHz equals 94 dB without any source impedance mismatch. Adding a  
10-Ω source impedance mismatch degrades the CMRR at 1 kHz to 92 dB. The high-frequency degradation of  
CMRR shown in 53 for the 10-Ω source impedance mismatch cases is due to the capacitance of the cables  
used for the measurement. The total harmonic distortion plus noise (THD+N) is plotted over frequency in 54.  
For a 4-dBu (1.23 VRMS) input signal level, the THD+N remains flat at –101.6 dB (0.0008%) over the measured  
frequency range. Increasing the signal level to 22 dBu further decreases the THD+N to –115.2 dB (0.00017%) at  
1 kHz, but the THD+N rises above 7 kHz. Measuring the THD+N vs Output Amplitude (55) at 1 kHz shows a  
constant downward slope until the noise floor of the audio analyzer is reached at 5 VRMS. The constant  
downward slope indicates that noise from the device dominates THD+N at this frequency instead of distortion  
harmonics. 56 and 57 confirm this conclusion. For a 4–dBu signal level, the second harmonic is barely  
visible above the noise floor at –140 dBu. Increasing the signal level to 22 dBu produces distortion harmonics  
above  
the  
noise  
floor.  
The  
largest  
harmonic  
in  
this  
case  
is  
the  
second  
at  
–111.2 dBu, or –133.2 dB relative to the fundamental.  
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Typical Applications (接下页)  
1
0.8  
0.6  
0.4  
0.2  
0
œ40  
œ50  
œ60  
œ70  
œ80  
œ90  
œ100  
No Mismatch  
10-Mismatch, XLR Pin 2  
10-Mismatch, XLR Pin 3  
-0.2  
-0.4  
-0.6  
-0.8  
-1  
10  
10  
0
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
Frequency (Hz)  
C001  
C001  
1-VRMS Common-Mode Signal  
53. Common-Mode Rejection Ratio vs Frequency  
52. Frequency Response  
0.01  
0.001  
-80  
0.1  
-60  
22 dBu (9.75 VRMS)  
4 dBu (1.23 VRMS)  
0.01  
-80  
-100  
-120  
-140  
0.001  
-100  
-120  
-140  
0.0001  
0.00001  
0.0001  
0.00001  
100  
1k  
10k  
0.01  
0.1  
1
10  
Frequency (Hz)  
Output Voltage (VRMS  
)
C001  
C014  
90-kHz Measurement Bandwidth  
22-kHz Measurement Bandwidth  
54. THD+N vs Frequency  
55. THD+N vs Amplitude  
20  
0
40  
20  
0
œ20  
œ20  
œ40  
œ60  
œ80  
œ100  
œ120  
œ140  
œ160  
œ40  
œ60  
œ80  
HD2: -111.2 dBu (-133.2 dBc)  
HD3: -120.1 dBu (-142.1 dBc)  
œ100  
œ120  
œ140  
œ160  
HD4: -130.7 dBu (-152.7 dBc)  
5k  
10k  
15k  
20k  
0
5k  
10k  
15k  
20k  
Frequency (Hz)  
Frequency (Hz)  
C004  
C004  
4–dBu Output Amplitude  
22–dBu Output Amplitude  
56. Output Spectrum  
57. Output Spectrum  
24  
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Typical Applications (接下页)  
8.2.2 Differential Line Receiver for Single-Supply Applications  
The INA1650 can simply operate in single-supply applications by connecting the COM and REF pins to the  
output of the internal supply divider.  
(VMID(OUT). Adding a 1-µF capacitor to the VMID(IN) pin to filters noise from the power supply and the internal  
voltage divider.  
12 V  
C7 1 F  
C6 0.1 F  
Input Differential  
Audio Signals  
C1  
10 F  
VCC  
1
2
14  
13  
VEE  
R1  
100 kꢁ  
2
IN+ A  
OUT A  
C2  
10 F  
1
R2  
100 kꢁ  
3 COM A  
REF A 12  
3
C5 1 F  
Output Single-Ended  
Audio Signals  
VMID(IN)  
IN- A  
IN- B  
4
5
6
7
11  
10  
9
XLR Connector  
VMID(OUT)  
REF B  
R4  
100 kꢁ  
C3  
10 F  
C4  
3
2
COM B  
IN+ B  
1
R5  
100 kꢁ  
8
OUT B  
10 F  
INA1650  
XLR Connector  
Copyright © 2016, Texas Instruments Incorporated  
58. Differential Line Receiver for Single-Supply Applications  
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Typical Applications (接下页)  
8.2.3 Floating Single-Ended Input Line Receiver for Ground Loop Noise Reduction  
Ground loops commonly form in audio systems where the equipment is interconnected with coaxial cables, which  
introduces significant common-mode noise. If the sheath of the coaxial cable is connected to the equipment  
chassis and safety ground, a ground loop forms, which includes the main electrical wiring and the audio signal  
path. The INA165x can break these ground loops by floating the sheath of the coaxial cable through resistors  
(R3 and R4 in 59) so ground noise appears at the inputs of the INA165x as a common-mode signal.  
Capacitors C8 and C9 provide a high-frequency pathway to ground for radio frequency interference (RFI). A  
transient voltage suppressor (TVS) connected between the coaxial sheath and the chassis ground is shown in 图  
59. This TVS protects the inputs of the INA165x in the event of an electrostatic discharge to the signal input.  
12 V  
C7 1 F  
C6 0.1 F  
C1  
10 F  
VCC  
1
2
VEE 14  
13  
RCA Input  
IN+ A  
OUT A  
REF A 12  
R1  
10 kꢁ  
3 COM A  
C2  
10 F  
C5 1 F  
VMID(IN)  
IN- A  
IN- B  
4
5
6
7
11  
10  
9
VMID(OUT)  
REF B  
C3  
10 F  
R2  
10 kꢁ  
COM B  
IN+ B  
R3  
C9  
C8  
R4  
33 ꢁ  
10 nF  
10 nF 33 ꢁ  
8
OUT B  
C4  
10 F  
RCA Input  
INA1650  
TPD2E007  
Copyright © 2016, Texas Instruments Incorporated  
59. Ground Loop Isolation in Single-Ended Systems  
26  
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Typical Applications (接下页)  
8.2.4 Floating Single-Ended Input Line Receiver With Differential Outputs  
The application in 59 can be further extended to include differential outputs, which are necessary for audio  
ADCs and many Class-D amplifier devices. 60 shows the addition of an OPA1688 audio operational amplifier  
to the outputs of the INA1650 that convert the single-ended outputs to differential outputs.  
12 V  
C7 1 F  
R5  
10 kꢁ  
C8 0.1 F  
Differential  
Output  
+12V  
VCC  
C1  
10 F  
1
2
3
4
5
6
7
14  
13  
VEE  
R3 33  
R6  
10 kꢁ  
C11  
10 pF  
RCA Input  
IN+ A  
COM A  
IN- A  
C5 10 nF  
OUT A  
½
OPA1688  
R1  
10 kꢁ  
REF A 12  
C2  
10 F  
C9 1 F  
VMID(IN)  
11  
10  
9
TPD2E007  
IN- B  
VMID(OUT)  
REF B  
C3  
10 F  
R2  
10 kꢁ  
COM B  
IN+ B  
½
OPA1688  
C6 10 nF  
R4 33  
8
OUT B  
R7  
10 kꢁ  
C10  
10 pF  
C4  
10 F  
RCA Input  
INA1650  
Differential  
Output  
R8  
10 kꢁ  
Copyright © 2016, Texas Instruments Incorporated  
60. Single-Ended Line-Receiver Circuit With Differential Outputs  
8.2.5 TRS Audio Interface in Single-Supply Applications  
The INA1650 can be used for auxiliary audio inputs which may use a tip-ring-sleeve (TRS) connector where both  
audio channels share a common ground connection. 61 shows the INA1650 configured as a line receiver for a  
TRS interface to remove common-mode noise on the sleeve connection.  
12 V  
C7 1 F  
C6 0.1 F  
TRS Jack  
VCC  
1
2
3
4
5
6
7
VEE 14  
13  
C1  
10 F  
Ring  
Tip  
Right  
Output  
IN+ A  
COM A  
IN- A  
OUT A  
REF A 12  
R1  
100 kꢁ  
C2  
10 F  
C5 1 F  
VMID(IN)  
11  
10  
9
Sleeve  
IN- B  
VMID(OUT)  
REF B  
C3  
10 F  
R2  
100 kꢁ  
COM B  
IN+ B  
Left  
Output  
8
OUT B  
C4  
10 F  
INA1650  
Copyright © 2016, Texas Instruments Incorporated  
61. TRS Audio Interface in Single-Supply Applications  
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Typical Applications (接下页)  
8.2.6 Differential Line Driver With Single-Ended Input  
The INA1650 can be employed in line-driver applications (62) where the precision matched internal resistor  
networks are useful in converting a single-ended signal to a balanced signal. Resistors R1 and R4 (shown in 图  
62) isolate the large cable capacitance from the outputs of the INA1650 to maintain stability. TI recommends  
AC-coupling capacitors C1 and C2 since the DC voltages of the connected equipment may be unknown.  
Resistors R2 and R3 dissipate any charge collected on the capacitors due to connecting equipment with a DC  
voltage present.  
18 V  
-18 V  
C5 1 F  
C3 1 F  
C6 0.1 F  
C4 0.1 F  
C1  
10 F  
R1  
49.9 ꢁ  
VCC  
1
2
VEE 14  
Differential  
Output Signal  
IN+ A  
13  
OUT A  
R2  
100 kꢁ  
3 COM A  
REF A 12  
Single-Ended  
Input Signal  
2
VMID(IN)  
IN- A  
IN- B  
4
5
6
7
11  
10  
9
XLR Connector  
1
VMID(OUT)  
REF B  
3
R3  
100 kꢁ  
COM B  
IN+ B  
8
OUT B  
R4  
49.9 ꢁ  
C2  
10 F  
INA1650  
Copyright © 2016, Texas Instruments Incorporated  
62. INA1650 Used as a Balanced Audio Line Driver  
28  
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9 Power Supply Recommendations  
The INA165x operates from ±2.25-V to ±18-V supplies while maintaining excellent performance. However, some  
applications do not require equal positive and negative output voltage swing. With the INA165x, power-supply  
voltages do not need to be equal. For example, the positive supply can be set to 25 V with the negative supply at  
–5 V.  
10 Layout  
10.1 Layout Guidelines  
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:  
Connect low-ESR, 1.0-µF and 0.1-µF ceramic bypass capacitors between each supply pin and ground,  
placed as close to the device as possible. Connecting bypass capacitors only from V+ to ground is  
acceptable in single-supply applications. Noise can propagate into analog circuitry through the power pins of  
this device. The bypass capacitors reduce the coupled noise by providing low-impedance pathways to  
ground.  
Connect the device REF pins to a low-impedance, low-noise, system reference point (such as an analog  
ground or the VMID(OUT) pin) with the shortest trace possible.  
Place the external components as close to the device as possible, as shown in 63 and 64.  
Use ground pours and planes to shield input signal traces and minimize additional noise introduced into the  
signal path.  
Keep the length of input traces equal and as short as possible. Route the input traces as a differential pair  
with as minimal spacing between them as possible.  
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www.ti.com.cn  
10.2 Layout Examples  
+V  
-V  
C5  
C6  
C7  
C8  
C1  
R3  
IN+ A  
VCC  
1
2
3
4
5
6
7
VEE 14  
R1  
Input reference /  
shield  
IN+ A  
COM A  
IN- A  
13  
OUT A  
R2  
REF A 12  
IN- A  
VMID(IN)  
11  
10  
9
C2  
C3  
IN- B  
VMID(OUT)  
REF B  
IN+ B  
COM B  
IN+ B  
R4  
R4  
C4  
Input reference /  
8
OUT B  
shield  
R5  
INA1650  
IN- B  
Place bypass  
capacitors as close to  
IC as possible  
+V  
-V  
GND  
C5  
C7  
GND  
GND  
Connect COM pins to  
input signal reference  
C6  
VCC  
C8  
IN+ A  
C1  
R3  
C2  
1
2
3
4
5
6
7
VEE 14  
13  
Input reference /  
shield  
IN+ A  
COM A  
IN- A  
OUT A  
REF A 12  
IN- A  
IN- B  
VMID(IN)  
11  
10  
9
GND  
IN- B  
VMID(OUT)  
C3  
COM B  
IN+ B  
REF B  
OUT B  
Input reference /  
shield  
R4  
C4  
8
INA1650  
IN+ B  
Input pairs routed  
adjacent to each  
other  
Use ground pours for  
shielding the input  
signal pairs  
GND  
Copyright © 2016, Texas Instruments Incorporated  
63. Layout Example for a Dual-Supply Line Receiver  
30  
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Layout Examples (接下页)  
+V  
C7  
C6  
C1  
C2  
VCC  
1
2
3
4
5
6
7
VEE 14  
13  
IN+  
R1  
R4  
IN+ A  
COM A  
IN- A  
OUT A  
REF A 12  
Input reference /  
shield  
R2  
C5  
VMID(IN)  
IN-  
IN-  
11  
10  
9
IN- B  
VMID(OUT)  
REF B  
C3  
C4  
COM B  
IN+ B  
Input reference /  
shield  
8
OUT B  
R5  
INA1650  
IN+  
+V  
GND  
C7  
C6  
GND  
Connect VEE to low-  
impedance ground  
Place VMID(IN) filter  
capacitor as close to  
IC as possible  
IN+  
C1  
VCC  
1
2
3
4
5
6
7
VEE 14  
13  
Input reference /  
shield  
IN+ A  
COM A  
IN- A  
OUT A  
REF A 12  
C2  
C3  
IN-  
IN-  
GND  
VMID(IN)  
11  
10  
9
C5  
IN- B  
VMID(OUT)  
COM B  
IN+ B  
REF B  
OUT B  
Input reference /  
shield  
Use a low-impedance  
connection to  
8
connect reference  
pins to VMID(OUT)  
C4  
IN+  
GND  
Copyright © 2016, Texas Instruments Incorporated  
64. Layout Example for a Single-Supply Line Receiver  
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11 器件和文档支持  
11.1 器件支持  
11.1.1 开发支持  
11.1.1.1 TINA-TI™(免费软件下载)  
TINA™是一款简单、功能强大且易于使用的电路仿真程序,此程序基于 SPICE 引擎。TINA-TI TINA 软件的一  
款免费全功能版本,除了一系列无源和有源模型外,此版本软件还预先载入了一个宏模型库。TINA-TI 提供所有传  
统的 SPICE 直流、瞬态和频域分析,以及其他设计功能。  
TINA-TI 可从 WEBENCH® 设计中心免费下载,它提供全面的后续处理能力,使得用户能够以多种方式形成结果。  
虚拟仪器提供选择输入波形和探测电路节点、电压和波形的功能,从而创建一个动态的快速入门工具。  
这些文件需要安装 TINA 软件(由 DesignSoft™提供)或者 TINA-TI 软件。请从 TINA-TI 文  
件夹 中下载免费的 TINA-TI 软件。  
11.1.1.2 TI 高精度设计  
欲获取 TI 高精度设计,请访问 http://www.ti.com.cn/ww/analog/precision-designs/TI 高精度设计是由 TI 公司高  
精度模拟 应用 专家创建的模拟解决方案,提供了许多实用电路的工作原理、组件选择、仿真、完整印刷电路板  
(PCB) 电路原理图和布局布线、物料清单以及性能测量结果。  
11.2 文档支持  
11.2.1 相关文档  
请参阅如下相关文档:  
《电路板布局布线技巧》  
11.3 相关链接  
1 列出了快速访问链接。类别包括技术文档、支持和社区资源、工具与软件,以及立即订购快速访问。  
1. 相关链接  
器件  
产品文件夹  
请单击此处  
请单击此处  
立即订购  
请单击此处  
请单击此处  
技术文档  
请单击此处  
请单击此处  
工具与软件  
请单击此处  
请单击此处  
支持和社区  
请单击此处  
请单击此处  
INA1650  
INA1651  
32  
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11.4 接收文档更新通知  
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我进行注册,即可每周接收产  
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。  
11.5 社区资源  
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商按照原样提供。这些内容并不构成 TI 技术规范,  
并且不一定反映 TI 的观点;请参阅 TI 《使用条款》。  
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在  
e2e.ti.com 中,您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。  
设计支持  
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。  
11.6 商标  
SoundPlus, E2E are trademarks of Texas Instruments.  
TINA-TI is a trademark of Texas Instruments, Inc and DesignSoft, Inc.  
TINA, DesignSoft are trademarks of DesignSoft, Inc.  
All other trademarks are the property of their respective owners.  
11.7 静电放电警告  
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可  
能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可  
能会导致器件与其发布的规格不相符。  
11.8 术语表  
SLYZ022 TI 术语表。  
这份术语表列出并解释术语、缩写和定义。  
12 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且  
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。  
版权 © 2016–2018, Texas Instruments Incorporated  
33  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
INA1650IPW  
INA1650IPWR  
INA1651IPW  
INA1651IPWR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
PW  
14  
14  
14  
14  
90  
RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
IN1650C  
2000 RoHS & Green  
90 RoHS & Green  
2000 RoHS & Green  
NIPDAU  
NIPDAU  
NIPDAU  
IN1650C  
INA1651  
INA1651  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Feb-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA1650IPWR  
INA1651IPWR  
TSSOP  
TSSOP  
PW  
PW  
14  
14  
2000  
2000  
330.0  
330.0  
12.4  
12.4  
6.9  
6.9  
5.6  
5.6  
1.6  
1.6  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Feb-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
INA1650IPWR  
INA1651IPWR  
TSSOP  
TSSOP  
PW  
PW  
14  
14  
2000  
2000  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Feb-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
INA1650IPW  
INA1651IPW  
PW  
PW  
TSSOP  
TSSOP  
14  
14  
90  
90  
530  
530  
10.2  
10.2  
3600  
3600  
3.5  
3.5  
Pack Materials-Page 3  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
不保证没有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担  
保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。  
这些资源如有变更,恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。  
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成  
本、损失和债务,TI 对此概不负责。  
TI 提供的产品受 TI 的销售条款ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改  
TI 针对 TI 产品发布的适用的担保或担保免责声明。  
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE  
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022,德州仪器 (TI) 公司  

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