INA225AIDGKR [TI]
36-V, Programmable-Gain, Voltage-Output, Bidirectional, Zero-Drift Series,Current-Shunt Monitor;
| 型号： | INA225AIDGKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 36-V, Programmable-Gain, Voltage-Output, Bidirectional, Zero-Drift Series,Current-Shunt Monitor 放大器 PC 光电二极管 |
| 文件： | 总33页 (文件大小：1617K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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INA225
SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
INA225 36-V, Programmable-Gain, Voltage-Output, Bidirectional, Zero-Drift Series,
Current-Shunt Monitor
1 Features
3 Description
The INA225 is
a voltage-output, current-sense
1
•
Wide Common-Mode Range: 0 V to 36 V
Offset Voltage: ±150 μV (Max, All Gains)
Offset Voltage Drift: 0.5 μV/°C (Max)
Gain Accuracy, Over Temperature (Max):
amplifier that senses drops across current-sensing
resistors at common-mode voltages that can vary
from 0 V to 36 V, independent of the supply voltage.
The device is a bidirectional, current-shunt monitor
that allows an external reference to be used to
measure current flowing in both directions across a
current-sensing resistor.
•
•
•
–
–
–
–
25 V/V, 50 V/V: ±0.15%
100 V/V: ±0.2%
200 V/V: ±0.3%
Four discrete gain levels are selectable using the two
gain-select terminals (GS0 and GS1) to program
gains of 25 V/V, 50 V/V, 100 V/V, and 200 V/V. The
low-offset, zero-drift architecture and precision gain
values enable current-sensing with maximum drops
across the shunt as low as 10 mV of full-scale while
maintaining very high accuracy measurements over
the entire operating temperature range.
10-ppm/°C Gain Drift
•
•
250-kHz Bandwidth (Gain = 25 V/V)
Programmable Gains:
–
–
–
–
G1 = 25 V/V
G2 = 50 V/V
G3 = 100 V/V
G4 = 200 V/V
The device operates from a single +2.7-V to +36-V
power supply, drawing a maximum of 350 μA of
supply current. The device is specified over the
extended operating temperature range (–40°C to
+125°C), and is offered in an MSOP-8 package.
•
•
Quiescent Current: 350 μA (Max)
Package: MSOP-8
2 Applications
Device Information
•
•
•
•
•
•
Power Supplies
ORDER NUMBER
PACKAGE
BODY SIZE
Motor Control
INA225AIDGK
MSOP (8)
3,0 mm x 3,0 mm
Computers
Telecom Equipment
Power Management
Test and Measurement
RSHUNT
5-V Supply
Load
CBYPASS
0.1µF
VS
INA225
IN-
-
OUT
REF
ADC
Microcontroller
+
IN+
GPIO
GAIN SELECT
GS0 GS1
GAIN
GND GND
25
50
100
200
GND
VS
VS
GND
VS
VS
GND
GS0
GS1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA225
SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
www.ti.com
Table of Contents
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 16
Applications and Implementation ...................... 19
8.1 Application Information............................................ 19
8.2 Typical Applications ................................................ 19
Power Supply Recommendations...................... 25
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Terminal Configuration and Functions................ 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 Handling Ratings....................................................... 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram ....................................... 13
8
9
10 Layout................................................................... 25
10.1 Layout Guidelines ................................................. 25
10.2 Layout Example .................................................... 25
11 Device and Documentation Support ................. 26
11.1 Related Documentation ....................................... 26
11.2 Trademarks........................................................... 26
11.3 Electrostatic Discharge Caution............................ 26
11.4 Glossary................................................................ 26
7
12 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
Changes from Original (February 2014) to Revision A
Page
•
Made changes to product preview data sheet........................................................................................................................ 1
2
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SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
5 Terminal Configuration and Functions
DGK Package
MSOP-8
(Top View)
IN+
GND
VS
1
2
3
4
8
7
6
5
IN-
REF
GS1
GS0
OUT
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
IN+
NO.
1
Analog input
Analog
Connect to supply side of shunt resistor.
Ground
GND
VS
2
3
Analog
Power supply, 2.7 V to 36 V
OUT
4
Analog output Output voltage
Gain select. Connect to VS or GND.
Table 3 lists terminal settings and the corresponding gain value.
GS0
GS1
5
6
Digital input
Digital input
Gain select. Connect to VS or GND.
Table 3 lists terminal settings and the corresponding gain value.
REF
IN–
7
8
Analog input
Analog input
Reference voltage, 0 V to VS
Connect to load side of shunt resistor.
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6 Specifications
6.1 Absolute Maximum Ratings(1)
Over operating free-air temperature range, unless otherwise noted.
MIN
MAX
+40
UNIT
V
Supply voltage
Differential (VIN+) – (VIN–
Common-mode(3)
)
–40
GND – 0.3
GND – 0.3
GND – 0.3
–55
+40
V
(2)
Analog inputs, VIN+, VIN–
+40
V
REF, GS0, and GS1 inputs
Output
(VS) + 0.3
(VS) + 0.3
+150
V
V
Operating, TA
Junction, TJ
°C
°C
Temperature
+150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– terminals, respectively.
(3) Input voltage at any terminal may exceed the voltage shown if the current at that terminal is limited to 5 mA.
6.2 Handling Ratings
MIN
MAX
+150
4
UNIT
°C
TSTG
Storage temperature range
–65
Human body model (HBM) stress voltage(2)
Charged device model (CDM) stress voltage(3)
kV
(1)
VESD
1
kV
(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 4-kV HBM allows
safe manufacturing with a standard ESD control process.
(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 1-kV CDM allows safe
manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
Over operating free-air temperature range, unless otherwise noted.
MIN
NOM
12
MAX
UNIT
V
VCM
VS
Common-mode input voltage
Operating supply voltage
5
V
TA
Operating free-air temperature
–40
+125
°C
6.4 Thermal Information
INA225
THERMAL METRIC
DGK (MSOP)
UNIT
8 TERMINALS
θJA
Junction-to-ambient thermal resistance
163.6
57.7
84.7
6.5
θJCtop
θJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
83.2
N/A
θJCbot
4
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SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
6.5 Electrical Characteristics
At TA = +25°C, VSENSE = VIN+ – VIN–, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VCM
Common-mode input range
Common-mode rejection
TA = –40°C to +125°C
0
36
V
VIN+ = 0 V to +36 V, VSENSE = 0 mV,
TA = –40°C to +125°C
CMR
95
105
dB
VOS
Offset voltage, RTI(1)
RTI vs temperature
VSENSE = 0 mV
±75
0.2
±150
0.5
μV
dVOS/dT
TA = –40°C to +125°C
μV/°C
VSENSE = 0 mV, VREF = 2.5 V,
VS = 2.7 V to 36 V
PSRR
Power-supply rejection ratio
±0.1
±1
85
μV/V
IB
Input bias current
VSENSE = 0 mV
55
0
72
μA
μA
V
IOS
Input offset current
Reference input range
VSENSE = 0 mV
±0.5
VREF
OUTPUT
G
TA = –40°C to +125°C
VS
Gain
25, 50, 100, 200
±0.05%
V/V
Gain = 25 V/V and 50 V/V, VOUT = 0.5 V to
VS – 0.5 V, TA = –40°C to +125°C
±0.15%
±0.2%
±0.3%
Gain = 100 V/V, VOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
EG
Gain error
±0.1%
±0.1%
3
Gain = 200 V/V, VOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
G = 25 V/V, 50 V/V, 100 V/V,
TA = –40°C to +125°C
10
15
ppm/°C
nF
Gain error vs temperature
G = 200 V/V, TA = –40°C to +125°C
VOUT = 0.5 V to VS – 0.5 V
No sustained oscillation
5
±0.01%
1
Nonlinearity error
Maximum capacitive load
VOLTAGE OUTPUT(2)
Swing to VS power-supply rail RL = 10 kΩ to GND, TA = –40°C to +125°C
VS – 0.05
VGND + 5
VS – 0.2
V
VREF = VS / 2, all gains, RL = 10 kΩ to GND,
TA = –40°C to +125°C
VGND + 10
mV
VREF = GND, gain = 25 V/V, RL = 10 kΩ to GND,
TA = –40°C to +125°C
VGND + 7
VGND + 15
VGND + 30
VGND + 60
mV
mV
mV
mV
VREF = GND, gain = 50 V/V, RL = 10 kΩ to GND,
TA = –40°C to +125°C
Swing to GND(3)
VREF = GND, gain = 100 V/V, RL = 10 kΩ to GND,
TA = –40°C to +125°C
VREF = GND, gain = 200 V/V, RL = 10 kΩ to GND,
TA = –40°C to +125°C
FREQUENCY RESPONSE
Gain = 25 V/V, CLOAD = 10 pF
Gain = 50 V/V, CLOAD = 10 pF
Gain = 100 V/V, CLOAD = 10 pF
Gain = 200 V/V, CLOAD = 10 pF
250
200
125
70
kHz
kHz
kHz
kHz
V/μs
BW
Bandwidth
SR
Slew rate
0.4
NOISE, RTI(1)
Voltage noise density
50
nV/√Hz
(1) RTI = referred-to-input.
(2) See Typical Characteristic curve, Output Voltage Swing vs Output Current (Figure 10).
(3) See Typical Characteristic curve, Unidirectional Output Voltage Swing vs. Temperature (Figure 14)
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Electrical Characteristics (continued)
At TA = +25°C, VSENSE = VIN+ – VIN–, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT
Ci
Input capacitance
3
1
pF
μA
V
Leakage input current
0 ≤ VIN ≤ VS
2
0.6
VS
VIL
VIH
Low-level input logic level
High-level input logic level
0
2
V
POWER SUPPLY
VS
IQ
Operating voltage range
TA = –40°C to +125°C
VSENSE = 0 mV
+2.7
+36
350
375
V
Quiescent current
300
μA
μA
IQ over temperature
TA = –40°C to +125°C
TEMPERATURE RANGE
Specified range
–40
–55
+125
+150
°C
°C
Operating range
6
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SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
6.6 Typical Characteristics
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
175
150
125
100
75
50
25
0
±50
±25
0
25
50
75
100
125
150
Temperature (C)
C002
Offset Voltage (µV)
C001
Figure 1. Input Offset Voltage Production Distribution
Figure 2. Input Offset Voltage vs Temperature
8
7
6
5
4
3
2
±50
±25
0
25
50
75
100
125
150
Common-Mode Rejection Ratio (µV/V)
Temperature (C)
C004
C003
Figure 3. Common-Mode Rejection Production Distribution
Figure 4. Common-Mode Rejection Ratio vs Temperature
Gain Error (%)
Gain Error (%)
C005
C006
Figure 5. Gain Error Production Distribution (Gain = 25 V/V)
Figure 6. Gain Error Production Distribution (Gain = 50 V/V)
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Typical Characteristics (continued)
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
Gain Error (%)
Gain Error (%)
C007
C008
Figure 7. Gain Error Production Distribution
(Gain = 100 V/V)
Figure 8. Gain Error Production Distribution
(Gain = 200 V/V)
0.5
0.4
50
45
40
35
30
25
20
15
25 V/V
50 V/V
100 V/V
200 V/V
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
200 V/V
100 V/V
50 V/V
25 V/V
±50
±25
0
25
50
75
100
125
150
1
10
100
1k
10k
100k
1M
Frequency (Hz)
Temperature (C)
C009
C010
VCM = 0 V
VSENSE = 15 mVPP
Figure 9. Gain Error vs Temperature
Figure 10. Gain vs Frequency
140
120
120
100
80
60
40
20
0
100
80
60
40
20
0
10
100
1,000
10,000
100,000 1,000,000
10
100
1,000
10,000
100,000 1,000,000
Frequency (Hz)
Frequency (Hz)
C011
C012
VCM = 0 V
VREF = 2.5 V
VSENSE = 0 mV, Shorted
VS = 5 V
VREF = 2.5 V
VSENSE = 0 mV, Shorted
VS = 5 V + 250-mV Sine Disturbance
VCM = 1-V Sine Wave
Figure 11. Power-Supply Rejection Ratio vs Frequency
Figure 12. Common-Mode Rejection Ratio vs Frequency
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Typical Characteristics (continued)
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
100
Vs
90
Unidirectional, G = 200
Unidirectional, G = 100
(Vs) -1
80
70
60
50
40
30
20
10
0
(Vs) -2
(Vs) -3
Unidirectional, G = 50
Unidirectional, G = 25
GND +3
GND +2
GND +1
GND
Bidirectional, All Gains
- 40C
25C
125C
±50
±25
0
25
50
75
100
125
150
0
2
4
6
8
10 12 14 16 18 20
Current (mA)
Temperature (C)
C013
C038
Unidirectional, REF = GND
Bidirectional, REF > GND
Figure 13. Output Voltage Swing vs Output Current
Figure 14. Unidirectional Output Voltage Swing vs.
Temperature
140
80
70
60
50
40
30
120
IB+, IB-, VREF = 0V
100
80
60
IB+, IB-, VREF = 2.5V
40
IB+, IB-, VREF=0V
20
10
20
0
0
±20
±10
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
Common-Mode Voltage (V)
Common-Mode Voltage (V)
C014
C015
Figure 15. Input Bias Current vs Common-Mode Voltage
(Supply Voltage = +5 V)
Figure 16. Input Bias Current vs Common-Mode Voltage
(Supply Voltage = 0 V, Shutdown)
85
80
75
70
65
60
55
550
VS = 36V
500
VS = 5V
VS = 2.7V
450
400
350
300
250
200
±50
±25
0
25
50
75
100
125
150
±50
±25
0
25
50
75
100
125
150
Temperature (C)
Temperature (C)
C016
C017
VS = 5 V
VCM = 12 V
Figure 17. Input Bias Current vs Temperature
Figure 18. Quiescent Current vs Temperature
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Typical Characteristics (continued)
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
400
375
350
325
300
275
250
225
200
100
Gain = 100 V/V
Gain = 200 V/V
Gain = 50 V/V
Gain = 25 V/V
200 V/V
100 V/V
50 V/V
25 V/V
10
1
10
100
1k
10k
100k
1M
0
5
10
15
20
25
30
35
40
Frequency (Hz)
Supply Voltage (V)
C018
C019
VS = ± 2.5 V
VREF = 0 V
VSENSE = 0 mV, Shorted
Figure 19. Quiescent Current vs Supply Voltage
Figure 20. Input-Referred Voltage Noise vs Frequency
Time (1 s/div)
Time (25 µs/div)
C020
C021
VS = ± 2.5 V
VCM = 0 V
VSENSE = 0 mV, Shorted
Figure 21. 0.1-Hz to 10-Hz Voltage Noise
(Referred-to-Input)
Figure 22. Step Response
(Gain = 25 V/V, 2-VPP Output Step)
Time (25 µs/div)
Time (25 µs/div)
C022
C023
Figure 23. Step Response
Figure 24. Step Response
(Gain = 50 V/V, 2-VPP Output Step)
(Gain = 100 V/V, 2-VPP Output Step)
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Typical Characteristics (continued)
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
Time (25 µs/div)
Time (5 µs/div)
C024
C025
VDIFF = 20 mV
VOUT at 25-V/V Gain = 500 mV
VOUT at 50-V/V Gain = 1 V
Figure 25. Step Response
(Gain = 200 V/V, 2-VPP Output Step)
Figure 26. Gain Change Output Response
(Gain = 25 V/V to 50 V/V)
Time (5 µs/div)
Time (5 µs/div)
C026
C027
VDIFF = 20 mV
VOUT at 25-V/V Gain = 500 mV
VDIFF = 20 mV
VOUT at 50-V/V Gain = 1 V
VOUT at 100-V/V Gain = 2 V
VOUT at 200-V/V Gain = 4 V
Figure 27. Gain Change Output Response
Figure 28. Gain Change Output Response
(Gain = 25 V/V to 100 V/V)
(Gain = 50 V/V to 200 V/V)
Time (5 µs/div)
Time (25 µs/div)
C028
C029
VDIFF = 20 mV
VOUT at 100-V/V Gain = 2 V
VOUT at 200-V/V Gain = 4 V
Figure 29. Gain Change Output Response
(Gain = 100 V/V to 200 V/V)
Figure 30. Gain Change Output Response From Saturation
(Gain = 50 V/V to 25 V/V)
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Typical Characteristics (continued)
At TA = +25°C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
Time (25 µs/div)
Time (25 µs/div)
C030
C031
Figure 31. Gain Change Output Response From Saturation
(Gain = 100 V/V to 25 V/V)
Figure 32. Gain Change Output Response From Saturation
(Gain = 200 V/V to 50 V/V)
Gain = 25 V/V
Gain = 100 V/V
Gain = 200 V/V
Gain = 50 V/V
Time (25 µs/div)
Time (5 µs/div)
C032
C033
Figure 33. Gain Change Output Response From Saturation
(Gain = 200 V/V to 100 V/V)
Figure 34. Common-Mode Voltage Transient Response
Time (25 µs/div)
C034
Figure 35. Start-Up Response
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SBOS612A –FEBRUARY 2014–REVISED MARCH 2014
7 Detailed Description
7.1 Overview
The INA225 is a 36-V, common-mode, zero-drift topology, current-sensing amplifier. This device features a
significantly higher signal bandwidth than most comparable precision, current-sensing amplifiers, reaching up to
125 kHz at a gain of 100 V/V. A very useful feature present in the device is the built-in programmable gain
selection. To increase design flexibility with the device, a programmable gain feature is added that allows
changing device gain during operation in order to accurately monitor wider dynamic input signal ranges. Four
discrete gain levels (25 V/V, 50 V/V, 100 V/V, and 200 V/V) are available in the device and are selected using
the two gain-select terminals, GS0 and GS1.
7.2 Functional Block Diagram
VS
INA225
-
IN-
OUT
REF
IN+
+
Gain Select
GS0
GS1
GND
7.3 Feature Description
7.3.1 Selecting A Shunt Resistor
The device measures the differential voltage developed across a resistor when current flows through it. This
resistor is commonly referred to as a current-sensing resistor or a current-shunt resistor, with each term
commonly used interchangeably. The flexible design of the device allows a wide range of input signals to be
measured across this current-sensing resistor.
Selecting the value of this current-sensing resistor is based primarily on two factors: the required accuracy of the
current measurement and the allowable power dissipation across the resistor. The larger the voltage developed
across this resistor the more accurate of a measurement that can be made because of the fixed internal amplifier
errors. These fixed internal amplifier errors, which are dominated by the internal offset voltage of the device,
result in a larger measurement uncertainty when the input signal gets smaller. When the input signal gets larger,
the measurement uncertainty is reduced because the fixed errors become a smaller percentage of the signal
being measured.
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Feature Description (continued)
A system design trade-off for improving the measurement accuracy through the use of the larger input signals is
the increase in the power dissipated across the current-sensing resistor. Increasing the value of the current-shunt
resistor increases the differential voltage developed across the resistor when current passes through it. However,
the power that is then dissipated across this component also increases. Decreasing the value of the current-
shunt resistor value reduces the power dissipation requirements of the resistor, but increases the measurement
errors resulting from the decreasing input signal. Finding the optimal value for the shunt resistor requires
factoring both the accuracy requirement of the application and allowable power dissipation into the selection of
the component. An increasing amount of very low ohmic value resistors are becoming available with values
reaching down to 200 μΩ with power dissipations of up to 5 W, thus enabling very large currents to be accurately
monitored using sensing resistors.
The maximum value for the current-sensing resistor that can be chosen is based on the full-scale current to be
measured, the full-scale input range of the circuitry following the device, and the device gain selected. The
minimum value for the current-sensing resistor is typically a design-based decision because maximizing the input
range of the circuitry following the device is commonly preferred. Full-scale output signals that are significantly
less than the full input range of the circuitry following the device output can limit the ability of the system to
exercise the full dynamic range of system control based on the current measurement.
7.3.1.1 Selecting A Current-Sense Resistor Example
The example in Table 1 is based on a set of application characteristics, including a 10-A full-scale current range
and a 4-V full-scale output requirement. The calculations for selecting a current-sensing resistor of an
appropriate value are shown in Table 1.
Table 1. Calculating the Current-Sense Resistor, RSENSE
PARAMETER
Full-scale current
Full-scale output voltage
Gain selected
EQUATION
RESULT
10 A
IMAX
VOUT
4 V
Initial selection based on
default gain setting.
Gain
25 V/V
VDIFF
Ideal maximum differential input voltage
Shunt resistor value
VDiff = VOUT / Gain
160 mV
16 mΩ
1.6 W
RSHUNT
PRSENSE
VOS Error
RSHUNT = VDiff / IMAX
2
Current-sense resistor power dissipation
Offset voltage error
RSENSE x IMAX
(VOS / VDIFF ) x 100
0.094%
7.3.1.2 Optimizing Power Dissipation versus Measurement Accuracy
The example shown in Table 1 results in a maximum current-sensing resistor value of 16 mΩ to develop the
160 mV required to achieve the 4-V full-scale output with the gain set to 25 V/V. The power dissipated across
this 16-mΩ resistor at the 10-A current level is 1.6 W, which is a fairly high power dissipation for this component.
Adjusting the device gain allows alternate current-sense resistor values to be selected to ease the power
dissipation requirement of this component.
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Changing the gain setting from 25 V/V to 100 V/V, as shown in Table 2, decreases the maximum differential
input voltage from 160 mV down to 40 mV, thus requiring only a 4-mΩ current-sensing resistor to achieve the
4-V output at the 10-A current level. The power dissipated across this resistor at the 10-A current level is
400 mW, significantly increasing the availability of component options to select from.
The increase in gain by a factor of four reduces the power dissipation requirement of the current-sensing resistor
by this same factor of four. However, with this smaller full-scale signal, the measurement uncertainty resulting
from the device fixed input offset voltage increases by the same factor of four. The measurement error resulting
from the device input offset voltage is approximately 0.1% at the 160-mV full-scale input signal for the 25-V/V
gain setting. Increasing the gain to 100 V/V and decreasing the full-scale input signal to 40 mV increases the
offset induced measurement error to 0.38%.
Table 2. Accuracy and RSENSE Power Dissipation vs Gain Setting
PARAMETER
EQUATION
RESULT
10 A
IMAX
Full-scale current
VOUT
Full-scale output voltage
Gain selected
4 V
Gain
100 V/V
40 mV
4 mΩ
VDIFF
Ideal maximum differential input voltage
Current-sense resistor value
Current-sense resistor power dissipation
Offset voltage error
VDiff = VOUT / Gain
RSENSE = VDiff / IMAX
RSENSE
PRSENSE
VOS Error
2
RSENSE x IMAX
0.4 W
0.375%
(VOS / VDIFF ) x 100
7.3.2 Programmable Gain Select
The device features a terminal-controlled gain selection in determining the device gain setting. Four discrete gain
options are available (25 V/V, 50 V/V, 100 V/V, and 200 V/V) on the device and are selected based on the
voltage levels applied to the gain-select terminals (GS0 and GS1). These terminals are typically fixed settings for
most applications but the programmable gain feature can be used to adjust the gain setting to enable wider
dynamic input range monitoring as well as to create an automatic gain control (AGC) network.
Table 3 shows the corresponding gain values and gain-select terminal values for the device.
Table 3. Gain Select Settings
GAIN
25 V/V
50 V/V
100 V/V
200 V/V
GS0
GND
GND
VS
GS1
GND
VS
GND
VS
VS
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7.4 Device Functional Modes
7.4.1 Input Filtering
An obvious and straightforward location for filtering is at the device output; however, this location negates the
advantage of the low output impedance of the internal buffer. The input then represents the best location for
implementing external filtering. Figure 36 shows the typical implementation of the input filter for the device.
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1 µF
RS
ꢀ10 ꢀ
RS
ꢀ10 ꢀ
VS
Device
1
CF
¦
=
-3dB
2RSCF
RINT
¦
-3dB
-
Output
OUT
REF
BIAS
+
RINT
GS0
GS1
GND
Figure 36. Input Filter
Care must be taken in the selection of the external filter component values because these components can affect
device measurement accuracy. Placing external resistance in series with the input terminals creates an additional
error so these resistors should be kept as low of a value as possible with a recommended maximum value of
10 Ω or less. Increasing the value of the input filter resistance beyond 10 Ω results in a smaller voltage signal
present at the device input terminals than what is developed across the current-sense shunt resistor.
The internal bias network shown in Figure 36 creates a mismatch in the two input bias current paths when a
differential voltage is applied between the input terminals. Under normal conditions, where no external resistance
is added to the input paths, this mismatch of input bias currents has little effect on device operation or accuracy.
However, when additional external resistance is added (such as for input filtering), the mismatch of input bias
currents creates unequal voltage drops across these external components. The mismatched voltages result in a
signal reaching the input terminals that is lower in value than the signal developed directly across the current-
sensing resistor.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at
the shunt resistor is based both on the external series resistance value (RS) and the internal input resistors
(RINT). The reduction of the shunt voltage reaching the device input terminals appears as a gain error when
comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to
determine the amount of gain error that is introduced by the addition of external series resistance.
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Device Functional Modes (continued)
The amount of error these external filter resistors introduce into the measurement can be calculated using the
simplified gain error factor in Equation 1, where the gain error factor is calculated with Equation 2.
50,000
Gain Error Factor =
(41 x RS) + 50,000
(1250 ´ RINT
(1)
)
Gain Error Factor =
(1250 ´ RS) + (1250 ´ RINT) + (RS ´ RINT
)
where:
•
•
RINT is the internal input impedance, and
RS is the external series resistance.
(2)
For example, using the gain error factor (Equation 1), a 10-Ω series resistance results in a gain error factor of
0.992. The corresponding gain error is then calculated using Equation 3, resulting in a gain error of
approximately 0.81% solely because of the external 10-Ω series resistors. Using 100-Ω filter resistors increases
this gain error to approximately 7.58% from these resistors alone.
Gain Error (%) = 1 ± Gain Error Factor
(3)
7.4.2 Shutting Down the Device
Although the device does not have a shutdown terminal, the low-power consumption allows for the device to be
powered from the output of a logic gate or transistor switch that can turn on and turn off the voltage connected to
the device power-supply terminal.
However, in current-shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the device simplified
schematic in shutdown mode, as shown in Figure 37.
CBYPASS
0.1 µF
Shutdown
Supply
Load
Control
VS
Device
IN-
-
Output
Reference
Voltage
OUT
REF
+
IN+
+
-
GS0 GS1
GND
Figure 37. Shutting Down the Device
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Device Functional Modes (continued)
Note that there is typically a 525-kΩ impedance (from the combination of the 500-kΩ feedback and 25-kΩ input
resistors) from each device input to the REF terminal. The amount of current flowing through these terminals
depends on the respective configuration. For example, if the REF terminal is grounded, calculating the effect of
the 525-kΩ impedance from the shunt to ground is straightforward. However, if the reference or op amp is
powered while the device is shut down, the calculation is direct. Instead of assuming 525 kΩ to ground, assume
525 kΩ to the reference voltage. If the reference or op amp is also shut down, some knowledge of the reference
or op amp output impedance under shutdown conditions is required. For instance, if the reference source
behaves similar to an open circuit when un-powered, little or no current flows through the 525-kΩ path.
7.4.3 Using the Device with Common-Mode Transients Above 36 V
With a small amount of additional circuitry, the device can be used in circuits subject to transients higher than
36 V (such as automotive applications). Use only zener diodes or zener-type transient absorbers (sometimes
referred to as transzorbs); any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors, as shown in Figure 38, as a working impedance for the zener. Keeping these resistors as
small as possible is preferable, most often around 10 Ω. This value limits the impact on accuracy with the
addition of these external components, as described in the Input Filtering section. Larger values can be used if
necessary with the result having an impact on gain error. Because this circuit limits only short-term transients,
many applications are satisfied with a 10-Ω resistor along with conventional zener diodes of the lowest power
rating available. This combination uses the least amount of board space. These diodes can be found in packages
as small as SOT-523 or SOD-523.
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1µF
RPROTECT
ꢀ10 ꢀ
VS
Device
IN-
-
Output
OUT
REF
+
IN+
GS0 GS1
GND
Figure 38. Device Transient Protection
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8 Applications and Implementation
8.1 Application Information
The INA225 measures the voltage developed across a current-sensing resistor when current passes through it.
The ability to drive the reference terminal to adjust the functionality of the output signal offers multiple
configurations discussed throughout this section.
8.2 Typical Applications
8.2.1 Microcontroller-Configured Gain Selection
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1 µF
VS
Device
IN-
-
OUT
ADC
Micro-
controller
+
IN+
GPIO
REF
GS0 GS1
GND
Figure 39. Microcontroller-Configured Gain Selection Schematic
8.2.1.1 Design Requirements
Figure 39 shows the typical implementation of the device interfacing with an analog-to-digital converter (ADC)
and microcontroller.
8.2.1.2 Detailed Design Procedure
In this application, the device gain setting is selected and controlled by the microcontroller to ensure the device
output is within the linear input range of the ADC. Because the output range of the device under a specific gain
setting approaches the linear output range of the INA225 itself or the linear input range of the ADC, the
microcontroller can adjust the device gain setting to ensure the signal remains within both the device and the
ADC linear signal range.
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Typical Applications (continued)
8.2.1.3 Application Curve
Figure 40 illustrates how the microcontroller can monitor the ADC measurements to determine if the device gain
setting should be adjusted to ensure the output of the device remains within the linear output range as well as
the linear input range of the ADC. When the output of the device rises to a level near the desired maximum
voltage level, the microcontroller can change the GPIO settings connected to the G0 and G1 gain-select
terminals to adjust the device gain setting, thus resulting in the output voltage dropping to a lower output range.
When the input current increases, the output voltage increases again to the desired maximum voltage level. The
microcontroller can again change the device gain setting to drop the output voltage back to a lower range.
250
200
150
100
50
5
4
3
2
1
0
Gain
Output Voltage
0
0
1
2
3
4
5
6
7
8
9
10
C035
Load Current (A)
Figure 40. Microcontroller-Configured Gain Selection Response
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Typical Applications (continued)
8.2.2 Unidirectional Operation
2.7-V to 36-V
Supply
Supply
Load
CBYPASS
0.1 µF
VS
Device
IN-
-
Output
OUT
+
IN+
REF
VS
GS0
GS1
GND
Figure 41. Unidirectional Application Schematic
8.2.2.1 Design Requirements
The device can be configured to monitor current flowing in one direction or in both directions, depending on how
the REF terminal is configured. For measuring current in one direction, only the REF terminal is typically
connected to ground as shown in Figure 41. With the REF terminal connected to ground, the output is low with
no differential input signal applied. When the input signal increases, the output voltage at the OUT terminal
increases above ground based on the device gain setting.
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Typical Applications (continued)
8.2.2.2 Detailed Design Procedure
The linear range of the output stage is limited in how close the output voltage can approach ground under zero
input conditions. Resulting from an internal node limitation when the REF terminal is grounded (unidirectional
configuration) the device gain setting determines how close to ground the device output voltage can achieve
when no signal is applied; see Figure 14. To overcome this internal node limitation, a small reference voltage
(approximately 10 mV) can be applied to the REF terminal to bias the output voltage above this voltage level.
The device output swing capability returns to the 10-mV saturation level with this small reference voltage present.
At the lowest gain setting, 25 V/V, the device is capable of accurately measuring input signals that result in
output voltages below this 10-mV saturation level of the output stage. For these gain settings, a reference
voltage can be applied to bias the output voltage above this lower saturation level to allow the device to monitor
these smaller input signals. To avoid common-mode rejection errors, buffer the reference voltage connected to
the REF terminal.
A less frequently-used output biasing method is to connect the REF terminal to the supply voltage, VS. This
method results in the output voltage saturating at 200 mV below the supply voltage when no differential input
signal is present. This method is similar to the output saturated low condition with no input signal when the REF
terminal is connected to ground. The output voltage in this configuration only responds to negative currents that
develop negative differential input voltage relative to the device IN– terminal. Under these conditions, when the
differential input signal increases negatively, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF terminal must not exceed the device supply voltage.
8.2.2.3 Application Curve
An example output response of a unidirectional configuration is shown in Figure 42. With the REF terminal
connected directly to ground, the output voltage is biased to this zero output level. The output rises above the
reference voltage for positive differential input signals but cannot fall below the reference voltage for negative
differential input signals because of the grounded reference voltage.
0V
Output
Vref
Time (500 µs/div)
C036
Figure 42. Unidirectional Application Output Response
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Typical Applications (continued)
8.2.3 Bidirectional Operation
2.7-V to 36-V
Supply
Supply
Load
CBYPASS
0.1µF
VS
Device
IN-
-
Output
Reference
Voltage
OUT
+
IN+
+
-
REF
VS
GS0
GS1
GND
Figure 43. Bidirectional Application Schematic
8.2.3.1 Design Requirements
The device is a bidirectional, current-sense amplifier capable of measuring currents through a resistive shunt in
two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flow-through resistor can change directions.
8.2.3.2 Detailed Design Procedure
The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF terminal,
as shown in Figure 43. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input
level state. The output then responds by increasing above VREF for positive differential signals (relative to the IN–
terminal) and responds by decreasing below VREF for negative differential signals. This reference voltage applied
to the REF terminal can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at
mid-scale for equal range in both directions. In some cases, however, VREF is set at a voltage other than half-
scale when the bidirectional current is non-symmetrical.
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Typical Applications (continued)
8.2.3.3 Application Curve
An example output response of a bidirectional configuration is shown in Figure 44. With the REF terminal
connected to a reference voltage, 2.5 V in this case, the output voltage is biased upwards by this reference level.
The output rises above the reference voltage for positive differential input signals and falls below the reference
voltage for negative differential input signals.
Output
Vref
0V
Time (500 µs/div)
C037
Figure 44. Bidirectional Application Output Response
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9 Power Supply Recommendations
The input circuitry of the device can accurately measure signals on common-mode voltages beyond its power
supply voltage, VS. For example, the voltage applied to the VS power supply terminal can be 5 V, whereas the
load power-supply voltage being monitored (the common-mode voltage) can be as high as +36 V. Note also that
the device can withstand the full –0.3-V to +36-V range at the input terminals, regardless of whether the device
has power applied or not.
Power-supply bypass capacitors are required for stability and should be placed as closely as possible to the
supply and ground terminals of the device. A typical value for this supply bypass capacitor is 0.1 μF. Applications
with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply
noise.
10 Layout
10.1 Layout Guidelines
•
Connect the input terminals to the sensing resistor using a Kelvin or 4-wire connection. This connection
technique ensures that only the current-sensing resistor impedance is detected between the input terminals.
Poor routing of the current-sensing resistor commonly results in additional resistance present between the
input terminals. Given the very low ohmic value of the current resistor, any additional high-current carrying
impedance can cause significant measurement errors.
•
The power-supply bypass capacitor should be placed as closely as possible to the supply and ground
terminals. The recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can
be added to compensate for noisy or high-impedance power supplies.
10.2 Layout Example
VIA to Power or Ground Plane
VIA to Ground Plane
IN+
IN-
REF
GS1
GS0
Supply Bypass
Capacitor
GND
VS
Supply
Voltage
Output Signal Trace
OUT
Figure 45. Recommended Layout
NOTE
The layout shown has REF connected to ground for unidirectional operation. Gain-select
terminals (GS0 and GS1) are also connected to ground, indicating a 25-V/V gain setting.
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11 Device and Documentation Support
11.1 Related Documentation
For related documentation see the following:
•
INA225EVM User's Guide, SBOU140
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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16-Mar-2014
PACKAGING INFORMATION
Orderable Device
INA225AIDGKR
INA225AIDGKT
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
VSSOP
VSSOP
DGK
8
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
B32
B32
ACTIVE
DGK
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Mar-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Mar-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA225AIDGKR
INA225AIDGKT
VSSOP
VSSOP
DGK
DGK
8
8
2500
250
330.0
330.0
12.4
12.4
5.3
5.3
3.4
3.4
1.4
1.4
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Mar-2014
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA225AIDGKR
INA225AIDGKT
VSSOP
VSSOP
DGK
DGK
8
8
2500
250
366.0
366.0
364.0
364.0
50.0
50.0
Pack Materials-Page 2
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