INA301A3QDGKRQ1 [TI]
具有比较器的 AEC-Q100、36V、550kHz、4V/µs 高精度电流感应放大器 | DGK | 8 | -40 to 125;型号: | INA301A3QDGKRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有比较器的 AEC-Q100、36V、550kHz、4V/µs 高精度电流感应放大器 | DGK | 8 | -40 to 125 放大器 光电二极管 比较器 |
文件: | 总34页 (文件大小:2224K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INA301-Q1
ZHCSF49B –APRIL 2016 –REVISED APRIL 2022
INA301-Q1 具有高速过流保护比较器的36V 汽车类高速、零漂移、电压输出
电流分流监视器
1 特性
3 说明
• 符合汽车应用要求
• 具有符合AEC-Q100 标准的下列特性:
– 器件温度等级1:–40°C 至+125°C 的工作环
境温度范围
– 器件HBM ESD 分类等级2
– 器件CDM ESD 分类等级C6
• 提供功能安全
INA301-Q1 由高共模电流感测放大器和高速比较器组
成,通过测量电流感测或分流电阻两侧的电压并将该电
压与定义的阈值限值相比较来提供过流保护。此器件具
有一个可调限制阈值范围,此范围由单个外部限值设定
电阻器设置。该分流监控器能够在 0V 至 36V 的共模
电压范围内测量差分电压信号,与电源电压无关。
开漏报警输出可配置为透明模式(输出状态与输入状态
保持一致)或锁存模式(复位锁存时清除报警输出)。
器件报警响应时间不到 1 µs,能够快速检测过流事
件。
– 有助于进行功能安全系统设计的文档
• 宽共模输入范围:0V 至36V
• 双输出:放大器和比较器输出
• 高精度放大器:
这款器件由 2.7V-5.5V 单电源供电运行,汲取的最大电
源电流为 700 µA。该器件在 -40°C 至 +125°C 的扩展
级温度范围下额定运行,并且采用 8 引脚 VSSOP 封
装。
– 失调电压:35 µV(最大值)
– 失调电压漂移:0.5 µV/°C(最大值)
– 增益误差:0.1%(最大值)
– 增益误差漂移:10 ppm/°C
• 可用放大器增益:
器件信息(1)
– INA301A1-Q1:20 V/V
– INA301A2-Q1:50 V/V
封装尺寸(标称值)
器件型号
INA301-Q1
封装
VSSOP (8)
3.00mm × 3.00mm
– INA301A3-Q1:100 V/V
• 可编程警报阈值,通过单个电阻器设置
• 总警报响应时间:1 µs
(1) 如需了解所有可用封装,请参阅数据表末尾的封装选项附录。
2.7 V to 5.5 V
CBYPASS
0.1 ꢁF
• 透明模式和锁存模式下的开漏输出
• 封装:VSSOP-8
Supply
(0 V to 36 V)
RPULL-UP
10 kꢀ
2 应用
VS
INA301-Q1
Microcontroller
IN+
+
• 电磁阀控制
• 低侧电机监控
• 电子动力转向
• 电动座椅
OUT
ADC
ALERT
INœ
GPIO
GPIO
Load
RESET
LIMIT
• 电动车窗
DAC
GND
RLIMIT
• 车身控制模块
• 电子控制单元
• 过流保护
Copyright © 2016, Texas Instruments Incorporated
典型应用
• 电子保险丝
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SBOS786
INA301-Q1
ZHCSF49B –APRIL 2016 –REVISED APRIL 2022
www.ti.com.cn
Table of Contents
8 Applications and Implementation................................19
8.1 Application Information............................................. 19
8.2 Typical Application.................................................... 23
9 Power Supply Recommendations................................25
10 Layout...........................................................................25
10.1 Layout Guidelines................................................... 25
10.2 Layout Example...................................................... 26
11 Device and Documentation Support..........................27
11.1 Documentation Support.......................................... 27
11.2 接收文档更新通知................................................... 27
11.3 支持资源..................................................................27
11.4 Trademarks............................................................. 27
11.5 Electrostatic Discharge Caution..............................27
11.6 术语表..................................................................... 27
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description......................................................13
7.1 Overview...................................................................13
7.2 Functional Block Diagram.........................................13
7.3 Feature Description...................................................14
7.4 Device Functional Modes..........................................17
Information.................................................................... 27
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision A (June 2016) to Revision B (April 2022)
Page
• 添加了“功能安全”信息.................................................................................................................................... 1
• Changed the Power Supply Recommendations section...................................................................................25
Changes from Revision * (April 2016) to Revision A (June 2016)
Page
• 已从产品预发布更改为量产数据......................................................................................................................... 1
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5 Pin Configuration and Functions
VS
OUT
1
2
3
4
8
7
6
5
IN+
INœ
LIMIT
GND
ALERT
RESET
Not to scale
图5-1. DGK Package 8-Pin VSSOP Top View
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NO.
1
NAME
VS
Analog
Power supply, 2.7 V to 5.5 V
Output voltage
2
OUT
Analog output
Alert threshold limit input; see the 节7.3.2 section for details on setting the limit
threshold.
3
LIMIT
GND
Analog input
4
5
6
7
8
Analog
Ground
RESET
ALERT
IN–
Digital input
Digital output
Analog input
Analog input
Transparent or latch mode selection input
Overlimit alert, active-low, open-drain output
Negative voltage input. Connect to load side of the shunt resistor.
Positive voltage input. Connect to supply side of the shunt resistor.
IN+
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage, VS
6
40
V
(2)
Differential (VIN+) –(VIN–
Common-mode(3)
LIMIT pin
)
–40
V
Analog inputs (IN+, IN–)
40
GND –0.3
GND –0.3
GND –0.3
GND –0.3
GND –0.3
–55
Analog input
(VS) + 0.3
(VS) + 0.3
(VS) + 0.3
6
V
V
Analog output
OUT pin
Digital input
RESET pin
V
Digital output
ALERT pin
V
Operating temperature, TA
Junction temperature, TJ
Storage temperature, Tstg
150
°C
°C
°C
150
150
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN–pins, respectively.
(3) Input voltage can exceed the voltage shown without causing damage to the device if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
12
MAX
UNIT
VCM
VS
Common-mode input voltage
Operating supply voltage
V
V
2.7
5
5.5
TA
Operating free-air temperature
125
°C
–40
6.4 Thermal Information
INA301-Q1
THERMAL METRIC(1)
DGK (VSSOP)
8 PINS
161.5
62.3
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
81.4
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6.8
ψJT
80
ψJB
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ –VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and VLIMIT = 2 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VCM
Common-mode input voltage range
0
0
0
0
36
250
100
50
V
VIN = VIN+ –VIN–, INA301A1-Q1
VIN = VIN+ –VIN–, INA301A2-Q1
VIN = VIN+ –VIN–, INA301A3-Q1
VIN
Differential input voltage range
mV
INA301A1-Q1, VIN+ = 0 V to 36 V,
TA = –40°C to +125°C
100
106
110
110
118
120
INA301A2-Q1, VIN+ = 0 V to 36 V,
TA = –40°C to +125°C
CMR
Common-mode rejection
Offset voltage, RTI(1)
dB
µV
INA301A3-Q1, VIN+ = 0 V to 36 V,
TA = –40°C to +125°C
INA301A1-Q1
±25
±15
±10
0.1
±125
±50
±35
0.5
VOS
INA301A2-Q1
INA301A3-Q1
dVOS/dT
PSRR
Offset voltage drift, RTI(1)
µV/°C
µV/V
TA= –40°C to +125°C
VS = 2.7 V to 5.5 V, VIN+ = 12 V,
TA = –40°C to +125°C
Power-supply rejection ratio
±0.1
±10
IB
Input bias current
Input offset current
IB+, IB–
120
µA
µA
IOS
VSENSE = 0 mV
±0.1
OUTPUT
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
20
50
G
Gain
V/V
100
INA301A1-Q1, VOUT = 0.5 V to VS –0.5
V
±0.03%
±0.05%
±0.1%
±0.15%
INA301A2-Q1, VOUT = 0.5 V to VS –0.5
V
Gain error
±0.11%
±0.2%
10
INA301A3-Q1, VOUT = 0.5 V to VS –0.5
V
3
±0.01%
500
ppm/°C
pF
TA= –40°C to 125°C
Nonlinearity error
VOUT = 0.5 V to VS –0.5 V
No sustained oscillation
Maximum capacitive load
VOLTAGE OUTPUT
Swing to VS power-supply rail
RL = 10 kΩto GND,
TA = –40°C to +125°C
V
VS –0.05
VS –0.1
RL = 10 kΩto GND,
TA = –40°C to +125°C
Swing to GND
VGND + 20
VGND + 30
mV
FREQUENCY RESPONSE
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
550
500
450
4
BW
Bandwidth
kHz
V/µs
SR
Slew rate
NOISE, RTI(1)
Voltage noise density
30
nV/√Hz
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at TA = 25°C, VSENSE = VIN+ –VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and VLIMIT = 2 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
COMPARATOR
Total alert propagation delay
Slew-rate-limited tp
Input overdrive = 1 mV
0.75
1
1
1.5
80.3
80.8
3.5
4
tp
µs
VOUT step = 0.5 V to 4.5 V, VLIMIT = 4 V
TA = 25°C
79.7
79.2
80
ILIMIT
Limit threshold output current
µA
TA = –40°C to +125°C
INA301A1-Q1
1
1
VOS
Comparator offset voltage
INA301A2-Q1
mV
mV
INA301A3-Q1
1.5
20
4.5
INA301A1-Q1
VHYS
Hysteresis
INA301A2-Q1
50
INA301A3-Q1
100
VIH
VIL
High-level input voltage
1.4
0
6
0.4
300
1
V
V
Low-level input voltage
VOL
Alert low-level output voltage
ALERT pin leakage input current
Digital leakage input current
IOL = 3 mA
70
0.1
1
mV
µA
µA
VOH = 3.3 V
0 ≤VIN ≤VS
POWER SUPPLY
VSENSE = 0 mV, TA = 25°C
500
650
700
IQ
Quiescent current
µA
TA = –40°C to +125°C
(1) RTI = referred-to-input.
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6.6 Typical Characteristics
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Input Offset Voltage (mV)
Input Offset Voltage (mV)
图6-1. Input Offset Voltage Distribution (INA301A1-Q1)
图6-2. Input Offset Voltage Distribution (INA301A2-Q1)
60
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
40
20
0
-20
-50
-25
0
25
50
75
Temperature (°C)
100
125
150
Input Offset Voltage (mV)
图6-4. Input Offset Voltage vs. Temperature
图6-3. Input Offset Voltage Distribution (INA301A3-Q1)
CMRR (mV/V)
CMRR (mV/V)
图6-6. Common-Mode Rejection Ratio Distribution (INA301A2-
图6-5. Common-Mode Rejection Ratio Distribution (INA301A1-
Q1)
Q1)
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
3
2.5
2
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
1.5
1
0.5
0
-0.5
-1
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
CMRR (mV/V)
图6-8. Common-Mode Rejection Ratio vs. Temperature
图6-7. Common-Mode Rejection Ratio Distribution (INA301A3-
Q1)
140
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
120
100
80
60
10
100
1k
10k
100k
1M
Frequency (Hz)
.
Gain Error (%)
图6-10. Gain Error Distribution (INA301A1-Q1)
图6-9. Common-Mode Rejection Ratio vs. Frequency
Gain Error (%)
Gain Error (%)
图6-11. Gain Error Distribution (INA301A2-Q1)
图6-12. Gain Error Distribution (INA301A3-Q1)
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
0.5
0.4
0.3
0.2
0.1
0
50
40
30
20
10
0
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
-0.1
-0.2
-0.3
-0.4
-0.5
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
-10
-20
-50
-25
0
25
Temperature (°C)
图6-13. Gain Error vs. Temperature
50
75
100
125
150
1
10
100
1k 10k
Frequency (Hz)
100k
1M
10M
图6-14. Gain vs. Frequency
VS
140
120
100
80
V
S - 1
V
S - 2
GND + 3
GND + 2
GND + 1
GND
60
125ºC
25ºC
-40ºC
40
0
2
4
6
8
10
12
14
20
Output Current (mA)
1
10
100
1k 10k
Frequency (Hz)
100k
1M
10M
.
图6-15. Power-Supply Rejection Ratio vs. Frequency
图6-16. Output Voltage Swing vs. Output Current
250
150
200
150
100
50
120
90
60
30
0
0
-50
0
5
10
15
Common-Mode Voltage (V)
20
25
30
35
40
0
5
10
15
Common-Mode Voltage (V)
20
25
30
35
40
VS = 5 V
VS = 0 V
图6-17. Input Bias Current vs. Common-Mode Voltage
图6-18. Input Bias Current vs. Common-Mode Voltage
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
145
140
135
130
125
120
115
110
105
100
600
550
500
450
400
350
300
-50
-25
0
25
50
75
100
125
150
2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Supply Voltage (V)
Temperature (èC)
图6-19. Input Bias Current vs. Temperature
图6-20. Quiescent Current vs. Supply Voltage
540
520
500
480
460
440
420
35
30
25
20
15
10
5
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
0
-50
-25
0
25
50
75
100
125
150
1
10
100
1k
Frequency (Hz)
10k
100k
1M
Temperature (èC)
图6-21. Quiescent Current vs. Temperature
图6-22. Input-Referred Voltage Noise vs. Frequency
Input
Output
Time (1 s/div)
Time (1 ms/div)
.
4-VPP output step
图6-23. 0.1-Hz to 10-Hz Referred-to-Input Voltage Noise
图6-24. Voltage Output Rising Step Response
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Input
Output
VCM
VOUT
Time (1 ms/div)
Time (2 ms/div)
4-VPP output step
.
图6-25. Voltage Output Falling Step Response
图6-26. Common-Mode Voltage Transient Response
80.8
80.6
80.4
80.2
80
79.8
79.6
79.4
79.2
VSUPPLY
VOUT
Time (5 ms/div)
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
.
图6-28. Limit Current Source vs. Temperature
图6-27. Start-Up Response
VIN * 20 V/V
Alert
VLIMIT
VIN * 50 V/V
Alert
VLIMIT
Time (200 ns/div)
Time (200 ns/div)
图6-29. Total Propagation Delay (INA301A1-Q1)
图6-30. Total Propagation Delay (INA301A2-Q1)
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
1,000
800
600
VIN * 100 V/V
Alert
VLIMIT
400
200
0
-50
-25
0
25
50
75
100
125
150
Time (200 ns/div)
Temperature (èC)
.
VOD = 1 mV
图6-31. Total Propagation Delay (INA301A3-Q1)
图6-32. Comparator Propagation Delay vs. Temperature
120
120
100
80
60
40
20
0
100
INA301A1-Q1
INA301A2-Q1
INA301A3-Q1
80
60
40
20
0
0
0.5
1
1.5
2
2.5
3
3.5
Low-Level Output Current (mA)
4
4.5
5
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
图6-33. Comparator Alert VOL vs. IOL
图6-34. Hysteresis vs. Temperature
Reset
Alert
Time (2 ms/div)
图6-35. Comparator Reset Response
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7 Detailed Description
7.1 Overview
The INA301-Q1 is a 36-V common-mode, zero-drift topology, current-sensing amplifier that can be used in both
low-side and high-side configurations. These specially-designed, current-sensing amplifiers are able to
accurately measure voltages developed across current-sensing resistors (also known as current-shunt resistors)
on common-mode voltages that far exceed the supply voltage powering the device. Current can be measured on
input voltage rails as high as 36 V, and the device can be powered from supply voltages as low as 2.7 V. The
device can also withstand the full 36-V common-mode voltage at the input pins when the supply voltage is
removed without causing damage.
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as
35 μV with a temperature contribution of only 0.5 μV/°C over the full temperature range of –40°C to +125°C.
The low total offset voltage of the INA301-Q1 enables smaller current-sense resistor values to be used, and
allows for a more efficient system operation without sacrificing measurement accuracy resulting from the smaller
input signal.
The INA301-Q1 uses a single external resistor to allow for a simple method of setting the corresponding current
threshold level for the device to use for out-of-range comparison. Combining the precision measurement of the
current-sense amplifier and the onboard comparator enables an all-in-one overcurrent detection device. This
combination creates a highly-accurate solution that is capable of fast detection of out-of-range conditions, and
allows the system to take corrective actions to prevent potential component or system-wide damage.
7.2 Functional Block Diagram
2.7 V to 5.5 V
CBYPASS
0.1 ꢁF
Power Supply
(0 V to 36 V)
VS
INA301-Q1
RPULL-UP
10 kꢀ
IN+
+
OUT
Gain = 20, 50,
100
INœ
Load
ALERT
RESET
+
GND
LIMIT
RSET
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7.3 Feature Description
7.3.1 Alert Output ( ALERT Pin)
The device ALERT pin is an active-low, open-drain output that is designed to be pulled low when the input
conditions are detected to be out-of-range. Add a 10-kΩ pullup resistor from ALERT pin to the supply voltage.
This open-drain pin can be pulled up to a voltage beyond the VS supply voltage, but must not exceed 5.5 V.
图 7-1 shows the alert output response of the internal comparator. When the output voltage of the amplifier is
less than the voltage developed at the LIMIT pin, the comparator output is in the default high state. When the
amplifier output voltage exceeds the threshold voltage set at the LIMIT pin, the comparator output becomes
active and pulls low. This active low output indicates that the measured signal at the amplifier input has
exceeded the programmed threshold level, indicating an overcurrent or out-of-range condition has occurred.
6
VOUT
VLIMIT
ALERT
5
4
3
2
1
0
œ1
Time (5 ms/div)
C001
图7-1. Overcurrent Alert Response
7.3.2 Current-Limit Threshold
The INA301-Q1 determines if an overcurrent event is present by comparing the amplified measured voltage
developed across the current-sensing resistor to the corresponding signal developed at the LIMIT pin. The
threshold voltage for the LIMIT pin is set using a single external resistor, or by connecting an external voltage
source to the LIMIT pin.
7.3.2.1 Resistor-Controlled Current Limit
The typical method for setting the limit threshold voltage is to connect a resistor from the LIMIT pin to ground.
The value of this resistor, RLIMIT, is chosen in order to create a corresponding voltage at the LIMIT pin equivalent
to the output voltage, VOUT, when the maximum desired load current is flowing through the current-sensing
resistor. An internal 80-µA current source is connected to the LIMIT pin to create a corresponding voltage used
to compare to the amplifier output voltage, depending on the value of the RLIMIT resistor.
In the equations from 表 7-1, VTRIP represents the overcurrent threshold that the device is programmed to
monitor, and VLIMIT is the programmed signal set to detect the VTRIP level.
表7-1. Calculating the Threshold-Limit-Setting Resistor, RLIMIT
PARAMETER
EQUATION
ILOAD × RSENSE x Gain
VLIMIT = VTRIP
VTRIP
VLIMIT
VOUT at the desired-current trip value
Threshold limit voltage
ILIMIT × RLIMIT
VLIMIT / ILIMIT
RLIMIT
Threshold limit-setting resistor value
VLIMIT / 80 µA
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7.3.2.1.1 Resistor-Controlled, Current-Limit Example
If the current level indicating an out-of-range condition is present is 20 A, and the current-sense resistor value is
10 mΩ, then the input threshold signal is 200 mV. The INA301A1-Q1 has a gain of 20, therefore, the resulting
output voltage at the 20-A input condition is 4 V. The value for RLIMIT is selected to allow the device to detect to
this 20-A threshold, indicating an overcurrent event occurred. When the INA301-Q1 detects this out-of-range
condition, the ALERT pin asserts and pulls low. For this example, 表 7-2 lists the calculated value of RLIMIT
required to detect a 4-V level as 50 kΩ.
表7-2. Example of Calculating the Limit Threshold Setting Resistor, RLIMIT
PARAMETER
EQUATION
ILOAD × RSENSE x Gain
↓
20 A x 10 mΩx 20 V/V = 4 V
VTRIP
VLIMIT
RLIMIT
VOUT at the desired current trip value
VLIMIT = VTRIP
ILIMIT × RLIMIT
Threshold limit voltage
VLIMIT / ILIMIT
↓
Threshold limit-setting resistor value
4 V / 80 µA = 50 kΩ
7.3.2.2 Voltage-Source-Controlled Current Limit
Another method for setting the limit voltage is to connect the LIMIT pin to a programmable digital-to-analog
converter (DAC) or other external voltage source. The benefit of this method is the ability to adjust the current-
limit threshold to account for different threshold voltages that are used for different system operating conditions.
For example, this method can be used in a system that has one current-limit threshold level that must be
monitored during a power-up sequence, but different threshold levels that must be monitored during other
system operating modes.
In 表 7-3, VTRIP represents the overcurrent threshold that the device is programmed to monitor, and VSOURCE is
the programmed signal set to detect the VTRIP level.
表7-3. Calculating the Limit Threshold Voltage Source, VSOURCE
PARAMETER
VOUT at the desired current trip value
Threshold limit voltage
EQUATION
ILOAD × RSENSE × Gain
VSOURCE = VTRIP
VTRIP
VSOURCE
7.3.3 Hysteresis
The onboard comparator in the INA301-Q1 reduces the possibility of oscillations in the alert output when the
measured signal level is near the overlimit threshold level because of noise. When the output voltage (VOUT
)
exceeds the voltage developed at the LIMIT pin, the ALERT pin is asserted and pulls low. The output voltage
must drop below the LIMIT pin threshold voltage by the gain-dependent hysteresis level for the ALERT pin to
deassert and return to the nominal high state (see 图7-2).
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ALERT
Alert
Output
VOUT
VLIMIT - Hysteresis
VLIMIT
图7-2. Typical Comparator Hysteresis
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7.4 Device Functional Modes
7.4.1 Alert Mode
The device has two output operating modes, transparent and latched, that are selected based on the RESET pin
setting. These modes change how the ALERT pin responds following an alert when the overcurrent condition is
removed.
7.4.1.1 Transparent Output Mode
The device is set to transparent mode when the RESET pin is pulled low, thus allowing the output alert state to
change and follow the input signal with respect to the programmed alert threshold. For example, when the
differential input signal rises above the alert threshold, the ALERT output pin is pulled low. As soon as the
differential input signal drops below the alert threshold, the output returns to the default high-output state. A
common implementation using the device in transparent mode is to connect the ALERT pin to a hardware
interrupt input on a microcontroller. As soon as an overcurrent condition is detected and the ALERT pin is pulled
low, the hardware interrupt input detects the output-state change, and the microcontroller can begin to make
changes to the system operation required to address the overcurrent condition. Under this configuration, the
ALERT pin transition from high to low is captured by the microcontroller so that the output can return to the
default high state when the overcurrent event is removed.
7.4.1.2 Latch Output Mode
Some applications do not have the functionality available to continuously monitor the state of the output ALERT
pin to detect an overcurrent condition as described in the Transparent Output Mode section. A typical example of
this application is a system that is only able to poll the ALERT pin state periodically to determine if the system is
functioning correctly. If the device is set to transparent mode in this type of application, the state change of the
ALERT pin might be missed when ALERT is pulled low to indicate an out-of-range event, if the out-of-range
condition does not appear during one of these periodic polling events. Latch mode is specifically intended to
accommodate these applications.
The INA301-Q1 is placed into the corresponding output modes based on the signal connected to RESET (see 表
7-4). The difference between latch mode and transparent mode is how the ALERT pin responds when an
overcurrent event ends. In transparent mode (RESET = low), when the differential input signal drops below the
limit threshold level after the ALERT pin asserts because of an overcurrent event, the ALERT pin state returns to
the default high setting to indicate that the overcurrent event has ended.
表7-4. Output Mode Settings
OUTPUT MODE
Transparent mode
Latch mode
RESET PIN SETTING
RESET = low
RESET = high
In latch mode (RESET = high), when an overlimit condition is detected and the ALERT pin is pulled low, the
ALERT pin does not return to the default high state when the differential input signal drops below the alert
threshold level. In order to clear the alert, pull the RESET pin low for at least 100 ns. Pulling the RESET pin low
allows the ALERT pin to return to the default high level, provided that the differential input signal has dropped
below the alert threshold. If the input signal is still greater than the threshold limit when the RESET pin is pulled
low, the ALERT pin remains low. When the alert condition is detected by the system controller, the RESET pin
can be set back to high in order to place the device back in latch mode.
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The latch and transparent modes represented in 图 7-3 show that when VIN drops back below the VLIMIT
threshold for the first time, the RESET pin is pulled high. With the RESET pin is pulled high, the device is set to
latch mode, so that the ALERT pin output state does not return high when the input signal drops below the VLIMIT
threshold. Only when the RESET pin is pulled low does the ALERT pin return to the default high level, thus
indicating that the input signal is below the limit threshold. When the input signal drops below the limit threshold
for the second time, the RESET pin is already pulled low. The device is set to transparent mode at this point and
the ALERT pin is pulled back high as soon as the input signal drops below the alert threshold.
VLIMIT
VIN
(VIN+ - VIN-
)
0 V
Latch Mode
RESET
Transparent Mode
Alert Clears
ALERT
Alert Does Not Clear
图7-3. Transparent Mode vs. Latch Mode
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8 Applications and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
8.1 Application Information
The INA301-Q1 enables easy configuration to detect overcurrent conditions in an application. This device is
individually targeted towards unidirectional overcurrent detection of a single threshold. However, this device can
also be paired with additional INA301-Q1 devices and circuitry to create more complex monitoring functional
blocks.
8.1.1 Selecting a Current-Sensing Resistor
The INA301-Q1 measures the differential voltage developed across a resistor when current flows through the
component in order to determine if the current being monitored exceeds a defined limit. This resistor is
commonly referred to as a current-sensing resistor or a current-shunt resistor, with each term commonly used
interchangeably. The flexible design of this device allows for measuring a wide differential input signal range
across the current-sensing resistor.
Selecting the value of this current-sensing resistor is primarily based on two factors: the required accuracy of the
current measurement, and the allowable power dissipation across the current-sensing resistor. Larger voltages
developed across this resistor allow for more accurate measurements to be made. Amplifiers have fixed internal
errors that are largely dominated by the inherent input offset voltage. When the input signal decreases, these
fixed internal amplifier errors become a larger portion of the measurement and increase the uncertainty in the
measurement accuracy. When the input signal increases, the measurement uncertainty is reduced because the
fixed errors are a smaller percentage of the signal being measured. Therefore, the use of larger-value, current-
sensing resistors inherently improves measurement accuracy.
However, a system design trade-off must be evaluated through the use of larger input signals that improve
measurement accuracy. Increasing the current sense resistor value results in an increase in power dissipation
across the current-sensing resistor, and also increases the differential voltage developed across the resistor
when current passes through the component. This increase in voltage across the resistor increases the power
that the resistor must be able to dissipate. Decreasing the value of the current-shunt resistor reduces the power
dissipation requirements of the resistor, but increases the measurement errors resulting from the decreased
input signal. Selecting the optimal value for the shunt resistor requires factoring both the accuracy requirement
for the specific application, and the allowable power dissipation of this component.
Low-ohmic-value resistors enable large currents to be accurately monitored with the INA301-Q1. An increasing
number of very low-ohmic-value resistors are becoming more widely available, with values of 200 μΩand less,
and power dissipations of up to 5 W.
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8.1.1.1 Selecting a Current-Sensing Resistor Example
In this example, the trade-offs involved in selecting a current-sensing resistor are described. This example
requires 2.5% accuracy for detecting a 10-A overcurrent event, with only 250 mW of allowable power dissipation
across the current-sensing resistor at the full-scale current level. Although the maximum power dissipation is
defined as 250 mW, a lower dissipation is preferred in order to improve system efficiency. Some initial
assumptions are made that are used in this example:
• the limit-setting resistor (RLIMIT) is a 1% component
• the maximum tolerance specification for the internal threshold setting current source (0.5%) is used
Given the total error budget of 2.5%, up to 1% of error is available to be attributed to the measurement error of
the device under these conditions.
As shown in 表8-1, the maximum value calculated for the current-sensing resistor with these requirements is 2.5
mΩ. Although this value satisfies the maximum power dissipation requirement of 250 mW, headroom is
available from the 2.5% maximum total overcurrent detection error in order to reduce the value of the current-
sensing resistor, and reduce the power dissipation further. Selecting a 1.5-mΩ, current-sensing resistor value
offers a good tradeoff for reducing the power dissipation in this scenario by approximately 40% while still
remaining within the accuracy region.
表8-1. Calculating the Current-Sensing Resistor, RSENSE
PARAMETER
EQUATION
VALUE
10
UNIT
A
IMAX
Maximum current
PD_MAX
RSENSE_MAX
VOS
Maximum allowable power dissipation
Maximum allowable RSENSE
Offset voltage
250
mW
mΩ
µV
2
PD_MAX / IMAX
2.5
150
VOS_ERROR
EG
Initial offset voltage error
Gain error
(VOS / (RSENSE_MAX × IMAX ) × 100
0.6%
0.25%
0.65%
2.5%
1.5%
1%
2
√(VOS_ERROR 2 + EG
)
ERRORTOTAL
Total measurement error
Allowable current threshold accuracy
Initial threshold error
ERRORINITIAL
ERRORAVAILABLE
VOS_ERROR_MAX
VDIFF_MIN
ILIMIT Tolerance + RLIMIT Tolerance
Maximum allowable measurement error
Maximum allowable offset error
Minimum differential voltage
Minimum sense resistor value
Minimum power dissipation
Maximum Error –ERRORINITIAL
2
√(ERRORAVAILABLE 2 –EG
VOS / VOS_ERROR_MAX (1%)
VDIFF_MIN / IMAX
)
0.97%
15
mV
mΩ
mW
RSENSE_MIN
PD_MIN
1.5
2
RSENSE_MIN × IMAX
150
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8.1.2 Input Filtering
External system noise can significantly affect the ability of a comparator to accurately measure and detect
whether input signals exceed the reference threshold levels and reliably indicate overrange conditions. The most
obvious effect that external noise has on the operation of a comparator is to cause a false-alert condition. If a
comparator detects a large noise transient coupled into the signal, the device can easily interpret this transient
as an overrange condition.
External filtering helps reduce the amount of noise that reaches the comparator, and thus reduce the likelihood
of a false alert from occurring. The tradeoff to adding this noise filter is that the alert response time is increased
because of the input signal being filtered along with the noise. 图 8-1 shows the implementation of an input filter
for the device.
2.7 V to 5.5 V
CBYPASS
0.1 ꢁF
Supply
(0 V to 36 V)
RPULL-UP
10 kꢀ
VS
INA301-Q1
IN+
+
CFILTER
OUT
RFILTER
≤ 10 ꢀ
ALERT
RESET
INœ
Load
LIMIT
GND
RLIMIT
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图8-1. Input Filter
Limiting the input resistance this filter is important because this resistance can have a significant affect on the
input signal that reaches the device input pins because of the device input bias currents. A typical system
implementation involves placing the current-sensing resistor very near the device so that the traces are very
short and the trace impedance is very small. This layout helps reduce the ability of coupling additional noise into
the measurement. Under these conditions, the characteristics of the input bias currents have minimal affect on
device performance.
As illustrated in 图 8-2, the input bias currents increase in opposite directions when the differential input voltage
increases. This increase results from a device design that allows common-mode input voltages to far exceed the
device supply voltage range. With input filter resistors now placed in series with these unequal input bias
currents, there are unequal voltage drops developed across these input resistors. The difference between these
two voltage drops appears as an added signal that, in this case, subtracts from the voltage developed across the
current-sensing resistor, thus reducing the signal that reaches the device input pins. Smaller-value input resistors
reduce this effect of signal attenuation to allow for a more accurate measurement.
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225
200
175
150
125
100
75
50
25
0
0
50
100
150
200
250
Differential Input Voltage (mV)
C002
图8-2. Input Bias Current vs. Differential Input Voltage
For example, with a differential voltage of 10 mV developed across a current-sensing resistor and using 20-Ω
resistors, the differential signal that actually reaches the device is 9.85 mV. A measurement error of 1.5% is
created as a result of these external input filter resistors. Use 10-Ω input filter resistors instead of the 20-Ω
resistors to reduce this added error from 1.5% down to 0.75%.
8.1.3 INA301-Q1 Operation With Common-Mode Voltage Transients Greater Than 36 V
With a small amount of additional circuitry, the INA301-Q1 can be used in circuits subject to transients greater
than 36 V. Use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs). Any
other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a working
impedance for the Zener diode, as shown in 图 8-3. Keep these resistors as small as possible; preferably, 10 Ω
or less. Larger values can be used, but with an additional induced error resulting from less signal reaching the
device input pins. Because this circuit limits only short-term transients, many applications are satisfied with a 10-
Ω resistor along with conventional Zener diodes of the lowest power rating available. This combination uses the
least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523.
2.7 V to 5.5 V
CBYPASS
0.1 ꢁF
Supply
(0 V to 36 V)
RPULL-UP
10kꢀ
VS
INA301-Q1
IN+
+
OUT
RPROTECT
≤ 10 ꢀ
ALERT
RESET
INœ
Load
LIMIT
GND
RLIMIT
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图8-3. Transient Protection
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8.2 Typical Application
Although this device is only able to measure current through a current-sensing resistor flowing in one direction, a
second INA301-Q1 can be used to create a bidirectional monitor (see 图8-4).
CBYPASS
0.1 ꢁF
2.7 V to 5.5 V
RPULL-UP
10 kꢀ
VS
IN+
+
OUT
INœ
OCP+
ALERT
LIMIT
Power Supply
(0 V to 36 V)
GND
2.7 V to 5.5 V
VS
RLIMIT
Current
Output
CBYPASS
0.1 ꢁF
Load
RPULL-UP
10 kꢀ
IN+
+
OUT
INœ
OCPœ
ALERT
LIMIT
GND
RLIMIT
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图8-4. Bidirectional Application
8.2.1 Design Requirements
For this design example, use the parameters listed in 表8-2 as the input parameters.
表8-2. Design Parameters
DESIGN PARAMETERS
EXAMPLE VALUE
Supply voltage
3.3 V
Common-mode voltage
Voltage gain
12 V
100 V/V
5 mΩ
Sense resistance
Source-current swing
Voltage trip points
–2 A to +2 A
–1 A and +1 A
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8.2.2 Detailed Design Procedure
First, reverse the input pins of the second INA301-Q1 across the current-sensing resistor. The second device is
now able to detect current flowing in the other direction relative to the first device.
Then, select limit resistors to set the voltage trip points by using the equations in 表 7-1. For this application
example, these equations give a value of 6.25 kΩfor both limit resistors.
Connect the outputs of each device to an AND gate in order to detect if either of the limit threshold levels are
exceeded. 表 8-3shows that the output of the AND gate is high if neither overcurrent limit thresholds are
exceeded. A low output state of the AND gate indicates that either the positive overcurrent limit or the negative
overcurrent limit are surpassed.
表8-3. Bidirectional Overcurrent Output Status
OCP STATUS
OUTPUT
OCP+
0
0
1
OCP–
No OCP
8.2.3 Application Curve
图 8-5 shows two INA301-Q1 devices being used in a bidirectional configuration and an output control circuit to
detect if one of the two alerts is exceeded.
Positive Limit
0V
Negtive Limit
Time (5 ms/div)
图8-5. Bidirectional Application Curve
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9 Power Supply Recommendations
The device input circuitry accurately measures signals on common-mode voltages beyond the power-supply
voltage, VS. For example, the voltage applied to the VS power-supply pin can be 5 V, whereas the load power-
supply voltage being monitored (VCM) can be as high as 36 V. At power up, for applications where the common-
mode voltage (VCM) slew rate is greater than 6 V/μs with a final common-mode voltage greater than 20 V, TI
recommends that the VS supply be present before VCM. If the use case requires VCM to be present before VS
with VCM under these same slewing conditions, then a 331-Ω resistor must be added between the VS supply
and the VS pin bypass capacitor.
Power-supply bypass capacitors are required for stability and must be placed as close as possible to the supply
and ground pins of the device. A typical value for this supply bypass capacitor is 0.1 µF. Applications with noisy
or high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
During slow power-up events, current flow through the sense resistor or voltage applied to the REF pin can
result in the output voltage momentarily exceeding the voltage at the LIMITx pins, resulting in an erroneous
indication of an out-of-range event on the ALERTx output. When powering the device with a slow ramping power
rail where an input signal is already present, all alert indications should be disregarded until the supply voltage
has reached the final value.
10 Layout
10.1 Layout Guidelines
• Place the power-supply bypass capacitor as close as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 µF. Add more decoupling capacitance to compensate for
noisy or high-impedance power supplies.
• Connect RLIMIT to the ground pin as directly as possible to limit additional capacitance on this node. If
possible, route this connection to the same plane in order to avoid vias to internal planes. If the connection
cannot be routed on the same plane and must pass through vias, make sure that a path is routed from RLIMIT
back to the ground pin, and that RLIMIT is not simply connected directly to a ground plane.
• Pull up the open-drain output pin to the supply voltage rail through a 10-kΩpullup resistor.
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10.2 Layout Example
RSHUNT
Power
Supply
Load
Alert Output
IN+
INœ ALERT RESET
RPULL-UP
INA301-Q1
VIA to
Ground
Plane
VS
OUT
LIMIT GND
VIA to
Ground
Plane
Supply
Voltage
RLIMIT
Output Voltage
CBYPASS
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Connect the limit resistor directly to the GND pin.
图10-1. Recommended Layout
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
INA301EVM User Guide (SBOU154)
11.2 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
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27
Product Folder Links: INA301-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA301A1QDGKRQ1
INA301A1QDGKTQ1
INA301A2QDGKRQ1
INA301A2QDGKTQ1
INA301A3QDGKRQ1
INA301A3QDGKTQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
2500 RoHS & Green
250 RoHS & Green
2500 RoHS & Green
250 RoHS & Green
2500 RoHS & Green
250 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
ZGG6
ZGG6
ZGK6
ZGK6
ZGJ6
ZGJ6
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jan-2022
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA301-Q1 :
Catalog : INA301
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA301A1QDGKRQ1
INA301A1QDGKTQ1
INA301A2QDGKRQ1
INA301A2QDGKTQ1
INA301A3QDGKRQ1
INA301A3QDGKTQ1
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
2500
250
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
5.3
5.3
5.3
5.3
5.3
5.3
3.4
3.4
3.4
3.4
3.4
3.4
1.4
1.4
1.4
1.4
1.4
1.4
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
2500
250
2500
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA301A1QDGKRQ1
INA301A1QDGKTQ1
INA301A2QDGKRQ1
INA301A2QDGKTQ1
INA301A3QDGKRQ1
INA301A3QDGKTQ1
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
2500
250
366.0
366.0
366.0
366.0
366.0
366.0
364.0
364.0
364.0
364.0
364.0
364.0
50.0
50.0
50.0
50.0
50.0
50.0
2500
250
2500
250
Pack Materials-Page 2
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